Graf commitů

84 Commity

Autor SHA1 Zpráva Datum
Prabhanjan Kandula
d863e18638 disp: msm: sde: fix dsc initial line caluclation
Current DSC intial line calculation is giving extra line on top of
recommended value from systems since number of active soft slices
considered is wrong. Fix the number or usage of active soft slices
in an encoder to align dsc initial line with recommended setting.

Change-Id: I321260e22b7824b8c481a55b54831ce9535661cc
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-08-19 11:48:52 -07:00
qctecmdr
7986d0d1b1 Merge "disp: msm: dp: add support for 3.75:1 compression" 2021-08-13 08:58:26 -07:00
Rajkumar Subbiah
eebce2ae4c disp: msm: dp: add support for 3.75:1 compression
Currently the DP driver always uses a compression ratio of 3, if
DSC is enabled. So if the sink supports 30bpp, the compressed
output is set to 10bpp. But since the hardware supports
compressing this to 8bpp, it would require less link bandwidth
than 10bpp compressed output. For compliance testing, the
test equipment limits the link bandwidth based on the most
efficient compression ratio and for some resolutions there
is not enough link bandwidth for 3:1 compression.

This change always sets the compression output to 8bpp to
minimize the link bandwidth utilization.

Change-Id: Ifa6129444c2bab4e9c357ddfe49f76efa5b04be0
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2021-08-05 20:26:34 -04:00
Yashwanth
64b732f335 disp: msm: add qsync refresh rate support per mode
This change adds support for qsync min refresh rate per
timing mode and populates qsync min refresh rate based
on the current fps when qsync is enabled.

Change-Id: I191d1d72e95dd065c8c0b56a6100104c00c6d8f6
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-08-05 15:37:20 +05:30
Amine Najahi
1881acdb2b disp: msm: dsi: publish RFI porch values for rate matching calculation
Currently when RFI is used on a video mode panel the horizontal or
vertical front porch values can be adjusted to maintain a constant FPS.
When this feature is enabled, driver is not propagating the new
htotal or vtotal values to usermode for accurate BW and MDP clock
calculation, which may lead to underrun in some usecase.

This change publishes beforehand all the RFI related timing
such as compensation type, hfp or vfp and clock values for
each mode for accurate BW and clock calculation.

Change-Id: Ib89c5e318fe978b0ae2215dedc430e057a9a81b9
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-07-29 10:35:27 -04:00
qctecmdr
1b9345b3af Merge "disp: msm: sde: add support for digital dimming" 2021-06-02 17:20:03 -07:00
qctecmdr
3f9b08b09e Merge "disp: msm: dsi: add parsing for RSC solver disable property" 2021-05-28 13:41:24 -07:00
Ping Li
9a17c5783b disp: msm: sde: add support for digital dimming
Add a new connector property to allow DC dimming feature to set
dimming backlight LUT. This change also adds a connector event
for client to register for backlight info needed for digital dimming
feature, including OS brightness, OS brightness_max, panel_backlight,
panel_backlight_max, and scale factors from ABA and LTM features.

Change-Id: I78f713fb2b965ca24effd973b4dfa9ff07a852f8
Signed-off-by: Ping Li <pingli@codeaurora.org>
2021-05-25 16:16:18 -07:00
Yashwanth
7e03fb61fd disp: msm: add support for seamless dsc switch
This change adds logic to determine dsc switch based on
the connector property "CONNECTOR_PROP_DSC_MODE" and
performs seamless DSC switch if there is any change in
DSC configuration. The connector property is populated
in msm_sub_mode based on which suitable mode is selected.

Change-Id: Ifc4931f16dfb814781bc1d72b103e09103e6bfee
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-20 21:34:27 -07:00
Satya Rama Aditya Pinapala
134e62f655 disp: msm: dsi: add parsing for RSC solver disable property
For higher refresh, to provide higher transfer time we need to disable
RSC solver in MDP. This can be configured through the panel timing node
devicetree property. This change adds the parsing of the devicetree
property.

Change-Id: I9e708325da35086d2f955cbcc80bb164ccb116cd
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-05-20 12:24:05 -07:00
Yu Wu
55340a43c3 disp: msm: add physical address info when dumping display registers
In dumping display registers, physical address will be appended after
each block name. This is to support register compare between kernel
and UEFI.

Change-Id: Ic20d3e2bd4c95aa7c71c4b646a149f7e83ad731a
Signed-off-by: Yu Wu <zwy@codeaurora.org>
2021-05-06 02:59:16 -07:00
qctecmdr
1d8a30b659 Merge "disp: msm: sde: frame data feature" 2021-04-07 18:40:26 -07:00
Nilaan Gunabalachandran
c5835a215e disp: msm: sde: frame data feature
Add support to send a data packet of info, written to
predefined buffers, providing information about each submitted frame.
Add required UAPI definitions for frame data buffers and event
notification.
Add support to read ubwc statistics from hw, based on defined rois.

Change-Id: I51f279de98ae4e2a02b0df6943d334764011d5db
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-04-06 08:49:49 -04:00
Steve Cohen
e5fa459062 disp: msm: restrict AVR_STEP based on panel requirement
Some panels require a fixed step rate for a particular mode.
This change allows DSI panels to specify a single supported
step rate for each nominal fps rate which SDE will enforce
during atomic check of AVR parameters.

Change-Id: I049415449bc88ccd396fced16d4534251eac3a06
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-04-04 18:45:40 -04:00
Steve Cohen
cf86c94f8e disp: msm: sde: add support for AVR_STEP feature
Add AVR step support so SW can trigger a late frame and instead
of immediately triggering, HW will perform the update at the
start of the next step interval. This allows for a fixed SW
vsync timeline to be maintained in userland, eliminating the
usual drift from the actual HW vsync caused by a late frame.

This change adds AVR_STEP support via a DRM property.

Change-Id: I4cf8a296989805f134c2165a3bed0b050bb09c96
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-04-04 18:40:57 -04:00
qctecmdr
749c899317 Merge "disp: msm: add cwb dither support" 2021-04-02 20:58:22 -07:00
Rob Clark
245ac819b6 drm/msm: remove msm_gem_free_work
Now that we don't need struct_mutex in the free path, we can get rid of
the asynchronous free all together.

Change-Id: I82406450e3a5d0d49d3fb753c621f55e8f4af088
Signed-off-by: Rob Clark <robdclark@chromium.org>
Git-commit: c951a9b284b907604759628d273901064c60d09f
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-03-29 13:17:21 -07:00
Rob Clark
fd50a1ec69 drm/msm: Add priv->mm_lock to protect active/inactive lists
Rather than relying on the big dev->struct_mutex hammer, introduce a
more specific lock for protecting the bo lists.

Change-Id: I4c876a1c3ae51ff62372703a99a8daff0c4a7950
Signed-off-by: Rob Clark <robdclark@chromium.org>
Git-commit: d984457b31c4c53d2af374d5e78b3eb64debd483
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[samtran@codeaurora.org: avoid changes related to debugfs and shrinker]
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-03-29 13:16:53 -07:00
Kristian H. Kristensen
a145e793b2 drm/msm: Implement .gem_free_object_unlocked
We use a llist and a worker to delay the object cleanup. This avoids
taking mmap_sem and struct mutex in the wrong order when calling
drm_gem_object_put-unlocked() from drm_gem_mmap().

Fixes lockdep problem with copy_from_user() in msm_ioctl_gem_submit().

Change-Id: Idfe54ae8108158b69f3835f26991642d1e21f8ee
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Git-commit: 48e7f18392c66f9b69ebac11c54f1a2e033ced54
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[samtran@codeaurora.org: resolve trivial merge conflict]
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-03-29 10:47:03 -07:00
Yuchao Ma
1b0bd83473 disp: msm: add cwb dither support
Add cwb dither support.
Catalog: Read dtsi value of cwb dither in pp parse part.
Wb: Install blob property for cwb dither.
Wb hw: Adds a new wb ops function to program cwb dither hardware.
CRTC: To ensure that userspace can check whether cwb dither is supported,
added "has_cwb_dither" to sde kms info.
PingPong: In order to reuse dither's map array, move dither_depth_map array
to pp header file.

Change-Id: I77e6a052a00b7c649452103145e5d7b4c8deb3a2
Signed-off-by: Yuchao Ma <yuchaom@codeaurora.org>
2021-03-25 10:45:29 +08:00
Amine Najahi
c5f2bd7401 disp: msm: sde: add multi-mode RFI support
Currently, RFI feature only supports panel that contains
a single timing node. This limits the feature availability
for panel with multiple modes or with DFPS support.

This change adds support for RFI on panels that contains
multiple timing nodes.

Change-Id: I3a7aadf7b6da3518350b2eb815602b13b5c259f5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-03-24 06:32:45 -07:00
Amine Najahi
d4def5bd8c disp: msm: sde: add new interface for RFI feature
Add a new connector range property and a new entry to the panel
capability blob to publish the list of supported RFI frequencies.
In addition, add the required functions to set, validate and update
DSI bit clock rate value to trigger an internal seamless mode switch
and reconfigure DSI clock and PLL.

Change-Id: I7d19cc369f8c5528709f2f20a51ef02180ebdea4
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-03-24 06:32:17 -07:00
Tatenda Chipeperekwa
c6257272d4 disp: msm: fix compilation errors for dlkm compilation
Fix dlkm compilation errors that are due to the use of -Werror
flags used by the build system.

Change-Id: I5e1e9bc63c1361d73e4930aab123212717872ecb
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2021-03-22 15:25:36 -07:00
Jayaprakash Madisetty
1b460b9200 disp: msm: sde: install retire fence offset property
Add changes to install retire fence offset property
and this configurable offset property can be used
to create speculative retire fences.

Change-Id: I0b5bf9bab5bfb811ddbc7a3e8813a3e801272d41
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
2021-03-02 12:54:39 +05:30
Gopikrishnaiah Anandan
e7c7283510 disp: msm: sde: add support for noise layer
DPU has added support for noise injection into the layer stack. Change
adds support for noise layer programming and exposes the hardware block
to the user space modules.

Change-Id: Id176eea54fcdcd5d399457b14133a1ccde07299f
2021-02-23 15:56:36 -08:00
Christopher Braga
9a5a42c453 msm: drm: sde: Add support for FP16 via AHB programming
Introduce support for the FP16 format and FP16 color processing
blocks. This includes support for FP16, FP16 UBWC, and inline
rotation on tiled FP16 pixel data.

Change-Id: I06a70cab5447140598682f687129d4f8662524b2
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-02-11 12:31:22 -08:00
Lei Chen
ab3f86f918 disp: msm: use connector properties to expose and set panel mode
Expose panel mode from kernel to SDM with SDE connector property
CONNECTOR_PROP_MODE_INFO and set panel mode from SDM to kernel
with SDE connector property CONNECTOR_PROP_SET_PANEL_MODE for
avoiding private change in upstream code in QGKI kernel.

Change-Id: I0629dad9399967cc1118ac02ce30597076ca367d
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2021-01-13 23:40:22 +08:00
orion brody
d00d481360 disp: msm: move from drm_mode to msm_mode
Move away from the private and private_flags fields from drm_mode,
as it is being deprecated in latest kernel version. Instead, Add
msm_display_mode as a wrapper to be used in downstream to store these
parameters. Also, store msm_mode in connector_state to be accessed
in commit path.

Change-Id: Ia5bdebe75f00aa15fb7db4dc3a0d50c30894a95c
Signed-off-by: Orion Brody <obrody@codeaurora.org>
2021-01-04 13:18:36 -08:00
Samantha Tran
790eda032e disp: msm: drmP.h removed, add new headers
Commit ("drm: delete drmP.h + drm_os_linux.h") removes the
drmP header file. This changes updates the msm driver
by adding the individually required header files.

Change-Id: I360aa028c2ce75317d33da988b36164041177014
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-17 09:50:47 -05:00
Samantha Tran
640ada10b5 disp: msm: updates to msm_drv
Commit c368ec194dd0 ("drm/client: Rename _force to _locked"),
commit 4bdc0d676a64 ("remove ioremap_nocache and devm_ioremap_nocache") and
commit 595abbaff5db ("y2038: remove ktime to/from timespec/timeval
conversion") renames modeset_commit_force, renames devm_ioremap_nocache and
removes the usage of timespec. This changes updates the msm driver with
the relevant changes.

Change-Id: Ib7372b8b4e51cdf75771e5069be189be76c32ed4
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-16 17:28:03 -08:00
Samantha Tran
0c08cb1fb5 disp: msm: update parameters for drm_bridge_attach
Commit a25b988ff83f ("drm/bridge: Extend bridge API to
disable connector creation") and commit ee68c743f8d0 ("drm: Stop
including drm_bridge.h from drm_crtc.h) add additional input flags.
This change adds fixes to the drm bridge attach API and includes
relevant drm_bridge header files.

Change-Id: I85e84eaff7df2995243896108a217fae81716b63
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-16 17:27:46 -08:00
Abhijit Kulkarni
2457f38adc disp: msm: sde: fix ich reset override logic
This change fixes the detection logic for overriding the ich
reset in both single and dual dsc case. In the previous logic
ich reset override was not getting triggered when partial update
on single dsc was enabled. This override is required to change the
default Hw behavior of changing the ich reset position.

ICH reset needs to be overridden in dual dsc merge case when
partial update disables the dsc merge and no. of slices per
encoder drops to 1. Similarly for single dsc case partial update
case when DSC encoder configuration changes from 2 slices to
single slice this override is required.

Change-Id: I435dc7ff10c9fb0edb8e40e6701608aa22136981
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-11-03 10:10:35 -08:00
Raviteja Tamatam
e5ff0b8f30 disp: msm: sde: add support for qsync min fps list
In current implementation qsync min fps is single value.
It is same for all the list of supported dfps list.
Added support for new dt entry dsi-supported-qsync-min-fps-list
corresponding to the fps supported in the dfps list
dsi-supported-dfps-list.

Change-Id: Ifd5309c2f51865a3c0d9fadb65cbcd291b6ef42b
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-10-15 12:32:25 +05:30
Yashwanth
2683324973 disp: msm: register rotator platform driver after genpd init
Due to power-domain, if rotator driver is registered early,
probe might get deferred several times and get stuck
indefinitely. So, this change adds driver registration
after genpd init to handle such cases.

Change-Id: I8dcb640d0ab0cdf0818cbce1b1fb460c28d8b9e7
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-09-25 21:16:42 +05:30
qctecmdr
13154febbc Merge "disp: msm: check max FPS of DFPS to update UIDLE configurations" 2020-09-18 16:36:35 -07:00
Lei Chen
c44e0b42df disp: msm: check max FPS of DFPS to update UIDLE configurations
It is not applicable for all DFPS cases to update UIDLE state
according to current frame rate. If DFPS changes frame rate
through vertical front porch values, the SDE clocks and transfer
time will not get changed accordingly, and it always get fixed
at max frame rate configuration of DFPS.
Add this change to check max FPS of DFPS instead of current
frame rate for UIDLE update, if DFPS is enabled with VFP.

Change-Id: I7634bce6a9eb1af212ba19a267735be08b20ae1f
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2020-09-15 09:51:30 +08:00
qctecmdr
b0775fe9da Merge "disp: msm: add allowed_mode_switch blob property" 2020-09-12 00:11:57 -07:00
Satya Rama Aditya Pinapala
03f9c40e7d disp: msm: add allowed_mode_switch blob property
The change adds a new mode property allowed_mode_switch. The new
property is a 32bit bitmask that indicates the modes each mode
can switch to. This change is required to pass the driver mode
switching capabilities, so that user mode can reject any mode switch
that is not supported by the driver.

Change-Id: I76d1733a07a6d57487ba9f461055270d7e60e060
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-09-04 17:58:46 -07:00
Gopikrishnaiah Anandan
10e00393d8 drm: msm: add dspp caps blob to crtc
All sde crtc's are virtual when they are created. Resources for the crtc
is allocated when crtc is enabled. All crtc's will not have same
capabilities because some of the dspp blocks have additional hardware
blocks. Change exposes additional dspp capabilities dynamically when
crtc is allocated the dspp hardware block.

Change-Id: I93e76a1335574e4ca30d9419ef6cc6e8149e2c3c
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-08-31 14:37:30 -07:00
qctecmdr
de155b0582 Merge "disp: msm: sde: right only pu support" 2020-07-24 14:10:39 -07:00
qctecmdr
5cd8505102 Merge "disp: remove kernel mapping of writeback framebuffer" 2020-07-24 02:22:42 -07:00
Abhijit Kulkarni
4e37cc3f17 disp: msm: sde: right only pu support
This change add right only pu support by allowing the dsc to be
flushed when one of the dsc is getting disabled. Since the crtc
swaps the mixers in case of right only partial update, this change
fixes the active display mask passed to encoder so that always the
left only dsc gets programmed. This change also fixes layer mixer
configuration where only one layer mixer is driving the partial
update, the other mixer's configuration is disabled.

Change-Id: I2dd2e9a347797bfe07c90e0ca7f999d151fba933
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-07-23 14:40:03 -07:00
Jeykumar Sankaran
99df0d5052 disp: msm: add support for vm event register framework
Besides SDE, other subdrivers may be interested in participating in
the VM switch. This change provides framework for display dependent
drivers like DSI, DP and RSCC to register for various VM switch
event hooks.

The following hooks to provided through msm_vm_ops:
post_hw_acquire: invoked before the first frame push after gaining
                 HW access.
pre_hw_release: invoked after the last frame commit before releasing
                the HW.
check:       check with vm clients for their readiness for HW
             releasing.

Change-Id: I616db04e979f78f76f6f97ee3b068dd348339ab6
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-07-08 23:14:31 -07:00
Narendra Muppalla
472784dfdd disp: remove kernel mapping of writeback framebuffer
This change removes the fb_kmap debugfs node along with kernel
mapping of writeback framebuffer. It also replaces dma_buf_kmap
calls with dma_buf_vmap.

Change-Id: I2fbee7fa5922071f6805d8e6df540ce87056bc0b
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-07-07 14:22:14 -07:00
Jeykumar Sankaran
8b032e5e46 disp: sde: add CRTC property for VM requests
Add a CRTC property to request the VM to acquire/release
HW resources.

Display driver in trusted VM boots up without HW ownership. Set
the default value of the property as RELEASED to handle resource
assignments.

Change-Id: Iea651a2fea902d95d4b954052af4ef016af15a91
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-19 17:46:43 -07:00
qctecmdr
8975496690 Merge "disp: msm: sde: adjust DSC encoders to support all 4LM topologies" 2020-06-09 23:42:41 -07:00
Amine Najahi
ed868466f5 disp: msm: dp: Extend mode filtering to support 8K
Currently DP driver determines if a mode is DSC capable
based on a DTSI entry and the required number of DSC
to support it. This approach does not scale when there
is an overlap in DSC requirement between DSI displays
and external DP display, thus causing one of the display to
report modes that cannot be supported.

This change compares the resources reserved for DP driver
calculated at initialization time and the currently available
ones to determine the correct number of resources that DP driver
can use. It also adds DSC and topology filtering logic and moves
DSC hardware specific from DP driver to SDE driver.

Change-Id: I8e601de33422b7c6d786826f7bfe152c4af8a6b5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-06-09 09:17:38 -04:00
Dhaval Patel
83860f0642 disp: msm: pass free dsc and lm availability info to dp
Primary and secondary dsi displays are built-in displays
and they are supported during all concurrency usecases
without resource allocation failure. DP mode filter
logic should provide supported mode information based
on free mdp resources after dsi resource assignment.

Change-Id: I3a9637a91ea1ffcc31997e25caff7f13605283ac
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-07 22:57:26 -07:00
Amine Najahi
b121756b5d disp: msm: sde: adjust DSC encoders to support all 4LM topologies
Add support for all 4LM topologies in new DCE encoder framework.
This change also aligns with the new way of checking topology
information.

Change-Id: I5358d60634070bdb26059056db884ad4161c073e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-05-28 19:25:09 -07:00
Alisha Thapaliya
e2f98dc79b Revert "disp: msm: sde: adjust DSC encoders to support all 4LM topologies"
This  reverts commit 6a50aedbfa.

Change-Id: I3570b18728cfad2843ca7f3a7d0276cda32c9492
2020-05-14 11:51:15 -07:00