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disp: msm: dsi: only check clock lane ulps status for DPHY

Sfoglia il codice sorgente 
Clock lane can enter ino ULPS mode only in DPHY mode. For
CPHY, did not need to check the clock lane status for ULPS.

Change-Id: Iceddd8064ec75ce26613469cfb1bde36e883f865
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
This commit is contained in:
Yuan Zhao
2021-06-24 14:55:37 +08:00
parent 1074406893
commit ffd7e1d4b1
4 ha cambiato i file con 21 aggiunte e 18 eliminazioni
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6
msm/dsi/dsi_phy.c
Vedi File

@@ -811,7 +811,8 @@ static int dsi_phy_enable_ulps(struct msm_dsi_phy *phy,
u32 ulps_lanes;
lanes = config->common_config.data_lanes;
lanes |= DSI_CLOCK_LANE;
if (!dsi_is_type_cphy(&config->common_config))
lanes |= DSI_CLOCK_LANE;
/*
* If DSI clamps are enabled, it means that the DSI lanes are
@@ -846,7 +847,8 @@ static int dsi_phy_disable_ulps(struct msm_dsi_phy *phy,
u32 ulps_lanes, lanes = 0;
lanes = config->common_config.data_lanes;
lanes |= DSI_CLOCK_LANE;
if (!dsi_is_type_cphy(&config->common_config))
lanes |= DSI_CLOCK_LANE;
ulps_lanes = phy->hw.ops.ulps_ops.get_lanes_in_ulps(&phy->hw);