qcacmn: Fix hal/wifi3.0/be documentation
The kernel-doc script identified some documentation issues in the hal/wifi3.0/be folder, so fix them. Change-Id: I9730c36e4d36dbe0ae551067c5c500441f07569f CRs-Fixed: 3400933
This commit is contained in:

committed by
Madan Koyyalamudi

parent
7453254a0c
commit
f518df0727
@@ -60,7 +60,8 @@ enum hal_tx_mcast_ctrl {
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HAL_TX_MCAST_CTRL_NO_SPECIAL,
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};
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/* enum hal_tx_notify_frame_type - TX notify frame type
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/**
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* enum hal_tx_notify_frame_type - TX notify frame type
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* @NO_TX_NOTIFY: Not a notify frame
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* @TX_HARD_NOTIFY: Hard notify TX frame
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* @TX_SOFT_NOTIFY_E: Soft Notify Tx frame
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@@ -78,7 +79,7 @@ enum hal_tx_notify_frame_type {
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* ---------------------------------------------------------------------------
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*/
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/**
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* struct hal_tx_bank_config - SW config bank params
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* union hal_tx_bank_config - SW config bank params
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* @epd: EPD indication flag
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* @encap_type: encapsulation type
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* @encrypt_type: encrypt type
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@@ -91,6 +92,8 @@ enum hal_tx_notify_frame_type {
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* @vdev_id_check_en: vdev id check
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* @pmac_id: mac id
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* @mcast_pkt_ctrl: mulitcast packet control
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* @dscp_tid_map_id: DSCP to TID map id
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* @reserved: unused bits
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* @val: value representing bank config
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*/
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union hal_tx_bank_config {
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@@ -114,14 +117,15 @@ union hal_tx_bank_config {
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};
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/**
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* struct hal_tx_cmn_config_ppe - SW config exception related parameters
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* @drop_prec_err - Exception drop_prec errors.
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* @fake_mac_hdr - Exception fake mac header.
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* @cpu_code_inv - Exception cpu code invalid.
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* @data_buff_err - Exception buffer length/offset erorors.
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* @l3_l4_err - Exception m3_l4 checksum errors
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* @data_offset_max - Maximum data offset allowed.
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* @data_len_max - Maximum data length allowed.
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* union hal_tx_cmn_config_ppe - SW config exception related parameters
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* @drop_prec_err: Exception drop_prec errors.
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* @fake_mac_hdr: Exception fake mac header.
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* @cpu_code_inv: Exception cpu code invalid.
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* @data_buff_err: Exception buffer length/offset erorors.
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* @l3_l4_err: Exception m3_l4 checksum errors
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* @data_offset_max: Maximum data offset allowed.
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* @data_len_max: Maximum data length allowed.
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* @val: aggregate 32-bit value
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*/
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union hal_tx_cmn_config_ppe {
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struct {
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@@ -137,15 +141,16 @@ union hal_tx_cmn_config_ppe {
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};
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/**
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* hal_tx_ppe_vp_config - SW config PPE VP table
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* @vp_num - Virtual port number
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* @pmac_id - Lmac ID
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* union hal_tx_ppe_vp_config - SW config PPE VP table
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* @vp_num: Virtual port number
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* @pmac_id: Lmac ID
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* @bank_id: Bank ID corresponding to this I/F.
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* @vdev_id: VDEV ID of the I/F.
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* @search_idx_reg_num: Register number of this SI.
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* @use_ppe_int_pri: Use the PPE INT_PRI to TID table
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* @to_fw: Use FW
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* @drop_prec_enable: Enable precedence drop.
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* @val: aggregate 32-bit value
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*/
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union hal_tx_ppe_vp_config {
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struct {
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@@ -162,9 +167,10 @@ union hal_tx_ppe_vp_config {
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};
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/**
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* hal_tx_cmn_ppe_idx_map_config: Use ppe index mapping table
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* union hal_tx_ppe_idx_map_config - Use ppe index mapping table
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* @search_idx: Search index
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* @cache_set: Cache set number
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* @val: aggregate 32-bit value
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*/
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union hal_tx_ppe_idx_map_config {
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struct {
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@@ -175,7 +181,7 @@ union hal_tx_ppe_idx_map_config {
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};
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/**
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* hal_tx_ppe_pri2tid_map0_config : Configure ppe INT_PRI to tid map
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* union hal_tx_ppe_pri2tid_map0_config - Configure ppe INT_PRI to tid map
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* @int_pri0: INT_PRI_0
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* @int_pri1: INT_PRI_1
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* @int_pri2: INT_PRI_2
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@@ -186,6 +192,7 @@ union hal_tx_ppe_idx_map_config {
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* @int_pri7: INT_PRI_7
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* @int_pri8: INT_PRI_8
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* @int_pri9: INT_PRI_9
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* @val: aggregate 32-bit value
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*/
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union hal_tx_ppe_pri2tid_map0_config {
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struct {
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@@ -204,13 +211,14 @@ union hal_tx_ppe_pri2tid_map0_config {
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};
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/**
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* hal_tx_ppe_pri2tid_map1_config : Configure ppe INT_PRI to tid map
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* @int_pri0: INT_PRI_10
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* @int_pri1: INT_PRI_11
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* @int_pri2: INT_PRI_12
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* @int_pri3: INT_PRI_13
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* @int_pri4: INT_PRI_14
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* @int_pri5: INT_PRI_15
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* union hal_tx_ppe_pri2tid_map1_config - Configure ppe INT_PRI to tid map
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* @int_pri10: INT_PRI_10
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* @int_pri11: INT_PRI_11
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* @int_pri12: INT_PRI_12
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* @int_pri13: INT_PRI_13
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* @int_pri14: INT_PRI_14
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* @int_pri15: INT_PRI_15
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* @val: aggregate 32-bit value
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*/
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union hal_tx_ppe_pri2tid_map1_config {
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struct {
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@@ -235,7 +243,7 @@ union hal_tx_ppe_pri2tid_map1_config {
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*/
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/**
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* hal_tx_desc_set_tx_notify_frame - Set TX notify_frame field in Tx desc
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* hal_tx_desc_set_tx_notify_frame() - Set TX notify_frame field in Tx desc
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* @desc: Handle to Tx Descriptor
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* @val: Value to be set
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*
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@@ -249,7 +257,7 @@ static inline void hal_tx_desc_set_tx_notify_frame(void *desc,
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}
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/**
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* hal_tx_desc_set_flow_override_enable - Set flow_override_enable field
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* hal_tx_desc_set_flow_override_enable() - Set flow_override_enable field
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* @desc: Handle to Tx Descriptor
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* @val: Value to be set
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*
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@@ -263,7 +271,7 @@ static inline void hal_tx_desc_set_flow_override_enable(void *desc,
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}
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/**
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* hal_tx_desc_set_flow_override - Set flow_override field in TX desc
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* hal_tx_desc_set_flow_override() - Set flow_override field in TX desc
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* @desc: Handle to Tx Descriptor
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* @val: Value to be set
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*
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@@ -277,7 +285,7 @@ static inline void hal_tx_desc_set_flow_override(void *desc,
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}
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/**
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* hal_tx_desc_set_who_classify_info_sel - Set who_classify_info_sel field
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* hal_tx_desc_set_who_classify_info_sel() - Set who_classify_info_sel field
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* @desc: Handle to Tx Descriptor
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* @val: Value to be set
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*
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@@ -291,7 +299,7 @@ static inline void hal_tx_desc_set_who_classify_info_sel(void *desc,
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}
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/**
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* hal_tx_desc_set_buf_length - Set Data length in bytes in Tx Descriptor
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* hal_tx_desc_set_buf_length() - Set Data length in bytes in Tx Descriptor
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* @desc: Handle to Tx Descriptor
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* @data_length: MSDU length in case of direct descriptor.
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* Length of link extension descriptor in case of Link extension
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@@ -306,7 +314,7 @@ static inline void hal_tx_desc_set_buf_length(void *desc,
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}
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/**
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* hal_tx_desc_set_buf_offset - Sets Packet Offset field in Tx descriptor
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* hal_tx_desc_set_buf_offset() - Sets Packet Offset field in Tx descriptor
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* @desc: Handle to Tx Descriptor
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* @offset: Packet offset from Metadata in case of direct buffer descriptor.
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*
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@@ -320,8 +328,8 @@ static inline void hal_tx_desc_set_buf_offset(void *desc,
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}
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/**
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* hal_tx_desc_set_l4_checksum_en - Set TCP/IP checksum enable flags
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* Tx Descriptor for MSDU_buffer type
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* hal_tx_desc_set_l4_checksum_en() - Set TCP/IP checksum enable flags
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* Tx Descriptor for MSDU_buffer type
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* @desc: Handle to Tx Descriptor
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* @en: UDP/TCP over ipv4/ipv6 checksum enable flags (5 bits)
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*
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@@ -338,10 +346,10 @@ static inline void hal_tx_desc_set_l4_checksum_en(void *desc,
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}
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/**
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* hal_tx_desc_set_l3_checksum_en - Set IPv4 checksum enable flag in
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* Tx Descriptor for MSDU_buffer type
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* hal_tx_desc_set_l3_checksum_en() - Set IPv4 checksum enable flag in
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* Tx Descriptor for MSDU_buffer type
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* @desc: Handle to Tx Descriptor
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* @checksum_en_flags: ipv4 checksum enable flags
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* @en: ipv4 checksum enable flags
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*
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* Return: void
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*/
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@@ -353,8 +361,8 @@ static inline void hal_tx_desc_set_l3_checksum_en(void *desc,
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}
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/**
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* hal_tx_desc_set_fw_metadata- Sets the metadata that is part of TCL descriptor
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* @desc:Handle to Tx Descriptor
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* hal_tx_desc_set_fw_metadata() - Sets the metadata that is part of TCL descriptor
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* @desc: Handle to Tx Descriptor
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* @metadata: Metadata to be sent to Firmware
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*
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* Return: void
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@@ -367,8 +375,8 @@ static inline void hal_tx_desc_set_fw_metadata(void *desc,
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}
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/**
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* hal_tx_desc_set_to_fw - Set To_FW bit in Tx Descriptor.
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* @desc:Handle to Tx Descriptor
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* hal_tx_desc_set_to_fw() - Set To_FW bit in Tx Descriptor.
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* @desc: Handle to Tx Descriptor
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* @to_fw: if set, Forward packet to FW along with classification result
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*
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* Return: void
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@@ -380,8 +388,8 @@ static inline void hal_tx_desc_set_to_fw(void *desc, uint8_t to_fw)
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}
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/**
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* hal_tx_desc_set_hlos_tid - Set the TID value (override DSCP/PCP fields in
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* frame) to be used for Tx Frame
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* hal_tx_desc_set_hlos_tid() - Set the TID value (override DSCP/PCP fields in
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* frame) to be used for Tx Frame
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* @desc: Handle to Tx Descriptor
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* @hlos_tid: HLOS TID
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*
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@@ -398,9 +406,10 @@ static inline void hal_tx_desc_set_hlos_tid(void *desc,
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}
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/**
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* hal_tx_desc_sync - Commit the descriptor to Hardware
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* @hal_tx_des_cached: Cached descriptor that software maintains
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* hal_tx_desc_sync() - Commit the descriptor to Hardware
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* @hal_tx_desc_cached: Cached descriptor that software maintains
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* @hw_desc: Hardware descriptor to be updated
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* @num_bytes: descriptor size
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*/
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static inline void hal_tx_desc_sync(void *hal_tx_desc_cached,
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void *hw_desc, uint8_t num_bytes)
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@@ -409,8 +418,8 @@ static inline void hal_tx_desc_sync(void *hal_tx_desc_cached,
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}
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/**
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* hal_tx_desc_set_vdev_id - set vdev id to the descriptor to Hardware
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* @hal_tx_des_cached: Cached descriptor that software maintains
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* hal_tx_desc_set_vdev_id() - set vdev id to the descriptor to Hardware
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* @desc: Cached descriptor that software maintains
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* @vdev_id: vdev id
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*/
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static inline void hal_tx_desc_set_vdev_id(void *desc, uint8_t vdev_id)
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@@ -420,8 +429,8 @@ static inline void hal_tx_desc_set_vdev_id(void *desc, uint8_t vdev_id)
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}
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/**
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* hal_tx_desc_set_bank_id - set bank id to the descriptor to Hardware
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* @hal_tx_des_cached: Cached descriptor that software maintains
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* hal_tx_desc_set_bank_id() - set bank id to the descriptor to Hardware
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* @desc: Cached descriptor that software maintains
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* @bank_id: bank id
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*/
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static inline void hal_tx_desc_set_bank_id(void *desc, uint8_t bank_id)
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@@ -431,9 +440,9 @@ static inline void hal_tx_desc_set_bank_id(void *desc, uint8_t bank_id)
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}
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/**
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* hal_tx_desc_set_tcl_cmd_type - set tcl command type to the descriptor
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* to Hardware
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* @hal_tx_des_cached: Cached descriptor that software maintains
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* hal_tx_desc_set_tcl_cmd_type() - set tcl command type to the descriptor
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* to Hardware
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* @desc: Cached descriptor that software maintains
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* @tcl_cmd_type: tcl command type
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*/
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static inline void
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@@ -444,9 +453,9 @@ hal_tx_desc_set_tcl_cmd_type(void *desc, uint8_t tcl_cmd_type)
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}
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/**
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* hal_tx_desc_set_lmac_id_be - set lmac id to the descriptor to Hardware
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* hal_tx_desc_set_lmac_id_be() - set lmac id to the descriptor to Hardware
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* @hal_soc_hdl: hal soc handle
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* @hal_tx_des_cached: Cached descriptor that software maintains
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* @desc: Cached descriptor that software maintains
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* @lmac_id: lmac id
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*/
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static inline void
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@@ -458,10 +467,10 @@ hal_tx_desc_set_lmac_id_be(hal_soc_handle_t hal_soc_hdl, void *desc,
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}
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/**
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* hal_tx_desc_set_search_index_be - set search index to the
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* descriptor to Hardware
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* hal_tx_desc_set_search_index_be() - set search index to the
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* descriptor to Hardware
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* @hal_soc_hdl: hal soc handle
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* @hal_tx_des_cached: Cached descriptor that software maintains
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* @desc: Cached descriptor that software maintains
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* @search_index: search index
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*/
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static inline void
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@@ -473,10 +482,10 @@ hal_tx_desc_set_search_index_be(hal_soc_handle_t hal_soc_hdl, void *desc,
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}
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/**
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* hal_tx_desc_set_cache_set_num - set cache set num to the
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* descriptor to Hardware
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* hal_tx_desc_set_cache_set_num() - set cache set num to the
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* descriptor to Hardware
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* @hal_soc_hdl: hal soc handle
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* @hal_tx_des_cached: Cached descriptor that software maintains
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* @desc: Cached descriptor that software maintains
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* @cache_num: cache number
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*/
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static inline void
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@@ -488,11 +497,11 @@ hal_tx_desc_set_cache_set_num(hal_soc_handle_t hal_soc_hdl, void *desc,
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}
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/**
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* hal_tx_desc_set_lookup_override_num - set lookup override num
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* to the descriptor to Hardware
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* hal_tx_desc_set_index_lookup_override() - set lookup override num to the
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* descriptor to Hardware
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* @hal_soc_hdl: hal soc handle
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* @hal_tx_des_cached: Cached descriptor that software maintains
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* @cache_num: set numbernumber
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* @desc: Cached descriptor that software maintains
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* @num: set number
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*/
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static inline void
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hal_tx_desc_set_index_lookup_override(hal_soc_handle_t hal_soc_hdl,
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@@ -629,6 +638,7 @@ static inline uint64_t hal_tx_comp_get_desc_va(void *hal_desc)
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/**
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* hal_tx_get_num_tcl_banks() - Get number of banks for target
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* @hal_soc_hdl: HAL soc handle
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*
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* Return: None
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*/
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@@ -649,8 +659,8 @@ hal_tx_get_num_tcl_banks(hal_soc_handle_t hal_soc_hdl)
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/**
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* hal_tx_populate_bank_register() - populate the bank register with
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* the software configs.
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* @soc: HAL soc handle
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* the software configs.
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* @hal_soc_hdl: HAL soc handle
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* @config: bank config
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* @bank_id: bank id to be configured
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*
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@@ -679,7 +689,7 @@ hal_tx_populate_bank_register(hal_soc_handle_t hal_soc_hdl,
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/**
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* hal_tx_config_rbm_mapping_be() - Update return buffer manager ring id
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* @hal_soc: HAL SoC context
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* @hal_soc_hdl: HAL SoC context
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* @hal_ring_hdl: Source ring pointer
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* @rbm_id: return buffer manager ring id
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*
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@@ -705,13 +715,14 @@ hal_tx_config_rbm_mapping_be(hal_soc_handle_t hal_soc_hdl,
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#endif
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/**
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* hal_tx_desc_set_buf_addr_be - Fill Buffer Address information in Tx Desc
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* hal_tx_desc_set_buf_addr_be() - Fill Buffer Address information in Tx Desc
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* @hal_soc_hdl: HAL SoC context
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* @desc: Handle to Tx Descriptor
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* @paddr: Physical Address
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* @pool_id: Return Buffer Manager ID
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* @rbm_id: Return Buffer Manager ID
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* @desc_id: Descriptor ID
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* @type: 0 - Address points to a MSDU buffer
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* 1 - Address points to MSDU extension descriptor
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* 1 - Address points to MSDU extension descriptor
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*
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* Return: void
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*/
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@@ -780,8 +791,8 @@ hal_tx_desc_set_buf_addr_be(hal_soc_handle_t hal_soc_hdl, void *desc,
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#endif
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/**
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* hal_tx_vdev_mismatch_routing_set - set vdev mismatch exception routing
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* @hal_soc: HAL SoC context
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* hal_tx_vdev_mismatch_routing_set() - set vdev mismatch exception routing
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* @hal_soc_hdl: HAL SoC context
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* @config: HAL_TX_VDEV_MISMATCH_TQM_NOTIFY - route via TQM
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* HAL_TX_VDEV_MISMATCH_FW_NOTIFY - route via FW
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*
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@@ -805,8 +816,8 @@ hal_tx_vdev_mismatch_routing_set(hal_soc_handle_t hal_soc_hdl,
|
||||
#endif
|
||||
|
||||
/**
|
||||
* hal_tx_mcast_mlo_reinject_routing_set - set MLO multicast reinject routing
|
||||
* @hal_soc: HAL SoC context
|
||||
* hal_tx_mcast_mlo_reinject_routing_set() - set MLO multicast reinject routing
|
||||
* @hal_soc_hdl: HAL SoC context
|
||||
* @config: HAL_TX_MCAST_MLO_REINJECT_FW_NOTIFY - route via FW
|
||||
* HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY - route via TQM
|
||||
*
|
||||
@@ -848,8 +859,8 @@ void hal_reo_config_reo2ppe_dest_info(hal_soc_handle_t hal_soc_hdl)
|
||||
}
|
||||
|
||||
/**
|
||||
* hal_tx_get_num_ppe_vp_tbl_entries() - Get the total number of VP table
|
||||
* @hal_soc: HAL SoC Context
|
||||
* hal_tx_get_num_ppe_vp_tbl_entries() - Get the total number of VP table entries
|
||||
* @hal_soc_hdl: HAL SoC Context
|
||||
*
|
||||
* Return: Total number of entries.
|
||||
*/
|
||||
@@ -862,8 +873,9 @@ uint32_t hal_tx_get_num_ppe_vp_tbl_entries(hal_soc_handle_t hal_soc_hdl)
|
||||
}
|
||||
|
||||
/**
|
||||
* hal_tx_get_num_ppe_vp_search_idx_tbl_entries() - Get the total number of search idx registers
|
||||
* @hal_soc: HAL SoC Context
|
||||
* hal_tx_get_num_ppe_vp_search_idx_tbl_entries() - Get the total number of
|
||||
* search idx registers
|
||||
* @hal_soc_hdl: HAL SoC Context
|
||||
*
|
||||
* Return: Total number of entries.
|
||||
*/
|
||||
@@ -877,7 +889,7 @@ uint32_t hal_tx_get_num_ppe_vp_search_idx_tbl_entries(hal_soc_handle_t hal_soc_h
|
||||
|
||||
/**
|
||||
* hal_tx_set_ppe_cmn_cfg()- Set the PPE common config
|
||||
* @hal_soc: HAL SoC context
|
||||
* @hal_soc_hdl: HAL SoC context
|
||||
* @cmn_cfg: HAL PPE VP common config
|
||||
*
|
||||
* Return: void
|
||||
@@ -892,8 +904,8 @@ hal_tx_set_ppe_cmn_cfg(hal_soc_handle_t hal_soc_hdl,
|
||||
}
|
||||
|
||||
/**
|
||||
* hal_tx_populate_ppe_vp_entry - Populate ppe VP entry
|
||||
* @hal_soc: HAL SoC context
|
||||
* hal_tx_populate_ppe_vp_entry() - Populate ppe VP entry
|
||||
* @hal_soc_hdl: HAL SoC context
|
||||
* @vp_cfg: HAL PPE VP config
|
||||
* @ppe_vp_idx: PPE VP index
|
||||
*
|
||||
@@ -910,8 +922,8 @@ hal_tx_populate_ppe_vp_entry(hal_soc_handle_t hal_soc_hdl,
|
||||
}
|
||||
|
||||
/**
|
||||
* hal_ppeds_cfg_ast_override_map_reg - Set ppe index mapping table value
|
||||
* @hal_soc: HAL SoC context
|
||||
* hal_ppeds_cfg_ast_override_map_reg() - Set ppe index mapping table value
|
||||
* @hal_soc_hdl: HAL SoC context
|
||||
* @reg_idx: index into the table
|
||||
* @overide_map: HAL PPE INDEX MAPPING config
|
||||
*
|
||||
@@ -930,9 +942,10 @@ hal_ppeds_cfg_ast_override_map_reg(hal_soc_handle_t hal_soc_hdl,
|
||||
}
|
||||
|
||||
/**
|
||||
* hal_tx_set_int_pri2id - Set the prit2tid table.
|
||||
* @hal_soc: HAL SoC context
|
||||
* @pri2tid: Reference to SW INT_PRI to TID table
|
||||
* hal_tx_set_int_pri2tid() - Set the pri2tid table.
|
||||
* @hal_soc_hdl: HAL SoC context
|
||||
* @val: value to set
|
||||
* @map_no: index in SW INT_PRI to TID table
|
||||
*
|
||||
* Return: void
|
||||
*/
|
||||
@@ -946,8 +959,8 @@ hal_tx_set_int_pri2tid(hal_soc_handle_t hal_soc_hdl,
|
||||
}
|
||||
|
||||
/**
|
||||
* hal_tx_update_int_pri2id - Populate the prit2tid table.
|
||||
* @hal_soc: HAL SoC context
|
||||
* hal_tx_update_int_pri2tid() - Populate the pri2tid table.
|
||||
* @hal_soc_hdl: HAL SoC context
|
||||
* @pri: INT_PRI value
|
||||
* @tid: Wi-Fi TID
|
||||
*
|
||||
@@ -963,7 +976,7 @@ hal_tx_update_int_pri2tid(hal_soc_handle_t hal_soc_hdl,
|
||||
}
|
||||
|
||||
/**
|
||||
* hal_tx_dump_ppe_vp_entry - Dump the PPE VP entry
|
||||
* hal_tx_dump_ppe_vp_entry() - Dump the PPE VP entry
|
||||
* @hal_soc_hdl: HAL SoC context
|
||||
*
|
||||
* Return: void
|
||||
@@ -977,9 +990,10 @@ hal_tx_dump_ppe_vp_entry(hal_soc_handle_t hal_soc_hdl)
|
||||
}
|
||||
|
||||
/**
|
||||
* hal_tx_enable_pri2tid_map- Enable the priority to tid mapping
|
||||
* hal_tx_enable_pri2tid_map() - Enable the priority to tid mapping
|
||||
* @hal_soc_hdl: HAL SoC context
|
||||
* @val: True/False value
|
||||
* @ppe_vp_idx: map index
|
||||
*
|
||||
* Return: void
|
||||
*/
|
||||
|
Reference in New Issue
Block a user