qcacmn: Use ioremap() instead of ioremap_nocache()
As part of compiling wifi driver in kernel version 5.15, the kernel API ioremap_nocache() is no longer supported in kernel version 5.15. Kernel API ioremap_nocache() is being replaced with ioremap() in kernel version 5.6 So, bringing ioremap_nocache() API under kernel version check. Change-Id: I139556e55f8c20093137960f116b3fc067a1829f CRs-Fixed: 3357183
This commit is contained in:

committed by
Madan Koyyalamudi

parent
8f331d9d7e
commit
f066d5ca6a
@@ -567,7 +567,7 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
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tgt_info->target_type == TARGET_TYPE_QCA5332) {
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tgt_info->target_type == TARGET_TYPE_QCA5332) {
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struct hif_softc *scn = HIF_GET_SOFTC(sc);
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struct hif_softc *scn = HIF_GET_SOFTC(sc);
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sc->mem_ce = ioremap_nocache(HOST_CE_ADDRESS, HOST_CE_SIZE);
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sc->mem_ce = qdf_ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE);
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if (IS_ERR(sc->mem_ce)) {
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if (IS_ERR(sc->mem_ce)) {
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hif_err("CE: ioremap failed");
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hif_err("CE: ioremap failed");
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return QDF_STATUS_E_IO;
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return QDF_STATUS_E_IO;
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@@ -582,8 +582,7 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
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* In QCA5332 CMEM region is outside WCSS block.
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* In QCA5332 CMEM region is outside WCSS block.
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* Allocate separate I/O remap to access CMEM address.
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* Allocate separate I/O remap to access CMEM address.
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*/
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*/
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sc->mem_cmem = ioremap_nocache(HOST_CMEM_ADDRESS,
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sc->mem_cmem = qdf_ioremap(HOST_CMEM_ADDRESS, HOST_CMEM_SIZE);
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HOST_CMEM_SIZE);
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if (IS_ERR(sc->mem_cmem)) {
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if (IS_ERR(sc->mem_cmem)) {
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hif_err("CE: ioremap failed");
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hif_err("CE: ioremap failed");
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return QDF_STATUS_E_IO;
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return QDF_STATUS_E_IO;
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@@ -593,7 +592,7 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
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/*
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/*
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* PMM SCRATCH Register for QCA5332
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* PMM SCRATCH Register for QCA5332
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*/
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*/
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sc->mem_pmm_base = ioremap_nocache(PMM_SCRATCH_BASE,
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sc->mem_pmm_base = qdf_ioremap(PMM_SCRATCH_BASE,
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PMM_SCRATCH_SIZE);
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PMM_SCRATCH_SIZE);
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if (IS_ERR(sc->mem_pmm_base)) {
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if (IS_ERR(sc->mem_pmm_base)) {
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hif_err("CE: ioremap failed");
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hif_err("CE: ioremap failed");
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@@ -1318,6 +1318,9 @@ void qdf_mem_tx_desc_cnt_update(qdf_atomic_t pending_tx_descs,
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*/
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*/
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#define qdf_mem_valloc(size) __qdf_mem_valloc(size, __func__, __LINE__)
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#define qdf_mem_valloc(size) __qdf_mem_valloc(size, __func__, __LINE__)
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#define qdf_ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE) \
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__qdf_ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE)
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#if IS_ENABLED(CONFIG_ARM_SMMU) && defined(ENABLE_SMMU_S1_TRANSLATION)
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#if IS_ENABLED(CONFIG_ARM_SMMU) && defined(ENABLE_SMMU_S1_TRANSLATION)
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/*
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/*
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* typedef qdf_iommu_domain_t: Platform independent iommu domain
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* typedef qdf_iommu_domain_t: Platform independent iommu domain
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@@ -1,6 +1,6 @@
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/*
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/*
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* Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* any purpose with or without fee is hereby granted, provided that the
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@@ -221,6 +221,14 @@ void __qdf_kmem_cache_free(qdf_kmem_cache_t cache, void *node);
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#define __qdf_mempool_elem_size(_pool) ((_pool)->elem_size)
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#define __qdf_mempool_elem_size(_pool) ((_pool)->elem_size)
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#endif
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#endif
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0))
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#define __qdf_ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE) \
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ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE)
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#else
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#define __qdf_ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE) \
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ioremap_nocache(HOST_CE_ADDRESS, HOST_CE_SIZE)
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#endif
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/**
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/**
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* __qdf_mem_smmu_s1_enabled() - Return SMMU stage 1 translation enable status
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* __qdf_mem_smmu_s1_enabled() - Return SMMU stage 1 translation enable status
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* @osdev parent device instance
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* @osdev parent device instance
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