diff --git a/hif/src/snoc/if_ahb.c b/hif/src/snoc/if_ahb.c
index ed7ab0f4cc..67113bb1ce 100644
--- a/hif/src/snoc/if_ahb.c
+++ b/hif/src/snoc/if_ahb.c
@@ -567,7 +567,7 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
 	    tgt_info->target_type == TARGET_TYPE_QCA5332) {
 		struct hif_softc *scn = HIF_GET_SOFTC(sc);
 
-		sc->mem_ce = ioremap_nocache(HOST_CE_ADDRESS, HOST_CE_SIZE);
+		sc->mem_ce = qdf_ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE);
 		if (IS_ERR(sc->mem_ce)) {
 			hif_err("CE: ioremap failed");
 			return QDF_STATUS_E_IO;
@@ -582,8 +582,7 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
 		 * In QCA5332 CMEM region is outside WCSS block.
 		 * Allocate separate I/O remap to access CMEM address.
 		 */
-		sc->mem_cmem = ioremap_nocache(HOST_CMEM_ADDRESS,
-					       HOST_CMEM_SIZE);
+		sc->mem_cmem = qdf_ioremap(HOST_CMEM_ADDRESS, HOST_CMEM_SIZE);
 		if (IS_ERR(sc->mem_cmem)) {
 			hif_err("CE: ioremap failed");
 			return QDF_STATUS_E_IO;
@@ -593,7 +592,7 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
 		/*
 		 * PMM SCRATCH Register for QCA5332
 		 */
-		sc->mem_pmm_base = ioremap_nocache(PMM_SCRATCH_BASE,
+		sc->mem_pmm_base = qdf_ioremap(PMM_SCRATCH_BASE,
 						   PMM_SCRATCH_SIZE);
 		if (IS_ERR(sc->mem_pmm_base)) {
 			hif_err("CE: ioremap failed");
diff --git a/qdf/inc/qdf_mem.h b/qdf/inc/qdf_mem.h
index bc06ad2f01..b0cc57abd0 100644
--- a/qdf/inc/qdf_mem.h
+++ b/qdf/inc/qdf_mem.h
@@ -1318,6 +1318,9 @@ void qdf_mem_tx_desc_cnt_update(qdf_atomic_t pending_tx_descs,
  */
 #define qdf_mem_valloc(size) __qdf_mem_valloc(size, __func__, __LINE__)
 
+#define qdf_ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE) \
+			__qdf_ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE)
+
 #if IS_ENABLED(CONFIG_ARM_SMMU) && defined(ENABLE_SMMU_S1_TRANSLATION)
 /*
  * typedef qdf_iommu_domain_t: Platform independent iommu domain
diff --git a/qdf/linux/src/i_qdf_mem.h b/qdf/linux/src/i_qdf_mem.h
index e342db4ac8..94ce4e32b3 100644
--- a/qdf/linux/src/i_qdf_mem.h
+++ b/qdf/linux/src/i_qdf_mem.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -221,6 +221,14 @@ void __qdf_kmem_cache_free(qdf_kmem_cache_t cache, void *node);
 #define __qdf_mempool_elem_size(_pool) ((_pool)->elem_size)
 #endif
 
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0))
+#define __qdf_ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE) \
+		   ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE)
+#else
+#define __qdf_ioremap(HOST_CE_ADDRESS, HOST_CE_SIZE) \
+		   ioremap_nocache(HOST_CE_ADDRESS, HOST_CE_SIZE)
+#endif
+
 /**
  * __qdf_mem_smmu_s1_enabled() - Return SMMU stage 1 translation enable status
  * @osdev parent device instance