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Merge a883a8f321596232635603c7d396a9dd47bf2987 on remote branch

Change-Id: I7f8c32ad85fba8a8633c7b254787493477da6df3
Linux Build Service Account 1 năm trước cách đây
mục cha
commit
ed21b03539

+ 17 - 3
cnss2/main.c

@@ -699,6 +699,20 @@ int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
 }
 EXPORT_SYMBOL(cnss_wlan_disable);
 
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
+int cnss_iommu_map(struct iommu_domain *domain,
+		   unsigned long iova, phys_addr_t paddr, size_t size, int prot)
+{
+	return iommu_map(domain, iova, paddr, size, prot);
+}
+#else
+int cnss_iommu_map(struct iommu_domain *domain,
+		   unsigned long iova, phys_addr_t paddr, size_t size, int prot)
+{
+	return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
+}
+#endif
+
 int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
 			dma_addr_t iova, size_t size)
 {
@@ -718,9 +732,9 @@ int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
 	iova -= page_offset;
 	paddr -= page_offset;
 
-	return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
-			 roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
-			 IOMMU_CACHE);
+	return cnss_iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
+			      roundup(size, PAGE_SIZE), IOMMU_READ |
+			      IOMMU_WRITE | IOMMU_CACHE);
 }
 EXPORT_SYMBOL(cnss_audio_smmu_map);
 

+ 2 - 0
cnss2/main.h

@@ -746,4 +746,6 @@ int cnss_dev_specific_power_on(struct cnss_plat_data *plat_priv);
 void cnss_recovery_handler(struct cnss_plat_data *plat_priv);
 size_t cnss_get_platform_name(struct cnss_plat_data *plat_priv,
 			      char *buf, const size_t buf_len);
+int cnss_iommu_map(struct iommu_domain *domain, unsigned long iova,
+		   phys_addr_t paddr, size_t size, int prot);
 #endif /* _CNSS_MAIN_H */

+ 36 - 18
cnss2/pci.c

@@ -16,7 +16,6 @@
 #include <linux/suspend.h>
 #include <linux/version.h>
 #include <linux/sched.h>
-
 #include "main.h"
 #include "bus.h"
 #include "debug.h"
@@ -427,7 +426,9 @@ static const struct mhi_controller_config cnss_mhi_config_genoa = {
 		CNSS_MHI_SATELLITE_EVT_COUNT,
 	.event_cfg = cnss_mhi_events,
 	.m2_no_db = true,
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
 	.bhie_offset = 0x0324,
+#endif
 };
 
 static const struct mhi_controller_config cnss_mhi_config_no_satellite = {
@@ -1567,7 +1568,7 @@ void cnss_pci_handle_linkdown(struct cnss_pci_data *pci_priv)
 	}
 
 	if (pci_dev->device == QCA6174_DEVICE_ID)
-		disable_irq(pci_dev->irq);
+		disable_irq_nosync(pci_dev->irq);
 
 	/* Notify bus related event. Now for all supported chips.
 	 * Here PCIe LINK_DOWN notification taken care.
@@ -3988,7 +3989,9 @@ static int cnss_pci_resume(struct device *dev)
 		goto out;
 
 	if (!pci_priv->disable_pc) {
+		mutex_lock(&pci_priv->bus_lock);
 		ret = cnss_pci_resume_bus(pci_priv);
+		mutex_unlock(&pci_priv->bus_lock);
 		if (ret)
 			goto out;
 	}
@@ -5153,8 +5156,8 @@ int cnss_smmu_map(struct device *dev,
 
 	cnss_pr_dbg("IOMMU map: iova %lx, len %zu\n", iova, len);
 
-	ret = iommu_map(pci_priv->iommu_domain, iova,
-			rounddown(paddr, PAGE_SIZE), len, flag);
+	ret = cnss_iommu_map(pci_priv->iommu_domain, iova,
+			     rounddown(paddr, PAGE_SIZE), len, flag);
 	if (ret) {
 		cnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
 		return ret;
@@ -6351,7 +6354,8 @@ static char *cnss_mhi_notify_status_to_str(enum mhi_callback status)
 		return "FATAL_ERROR";
 	case MHI_CB_EE_MISSION_MODE:
 		return "MISSION_MODE";
-#if IS_ENABLED(CONFIG_MHI_BUS_MISC)
+#if IS_ENABLED(CONFIG_MHI_BUS_MISC) && \
+(LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
 	case MHI_CB_FALLBACK_IMG:
 		return "FW_FALLBACK";
 #endif
@@ -6479,7 +6483,8 @@ static void cnss_mhi_notify_status(struct mhi_controller *mhi_ctrl,
 		cnss_pci_update_status(pci_priv, CNSS_FW_DOWN);
 		cnss_reason = CNSS_REASON_RDDM;
 		break;
-#if IS_ENABLED(CONFIG_MHI_BUS_MISC)
+#if IS_ENABLED(CONFIG_MHI_BUS_MISC) && \
+(LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
 	case MHI_CB_FALLBACK_IMG:
 		/* for kiwi_v2 binary fallback is used, skip path fallback here */
 		if (!(pci_priv->device_id == KIWI_DEVICE_ID &&
@@ -6489,6 +6494,7 @@ static void cnss_mhi_notify_status(struct mhi_controller *mhi_ctrl,
 		}
 		return;
 #endif
+
 	default:
 		cnss_pr_err("Unsupported MHI status cb reason: %d\n", reason);
 		return;
@@ -6664,7 +6670,8 @@ static int cnss_pci_register_mhi(struct cnss_pci_data *pci_priv)
 	mhi_ctrl->cntrl_dev = &pci_dev->dev;
 
 	mhi_ctrl->fw_image = plat_priv->firmware_name;
-#if IS_ENABLED(CONFIG_MHI_BUS_MISC)
+#if IS_ENABLED(CONFIG_MHI_BUS_MISC) && \
+(LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
 	mhi_ctrl->fallback_fw_image = plat_priv->fw_fallback_name;
 #endif
 
@@ -7046,6 +7053,24 @@ static bool cnss_should_suspend_pwroff(struct pci_dev *pci_dev)
 }
 #endif
 
+static int cnss_pci_set_gen2_speed(struct cnss_plat_data *plat_priv, u32 rc_num)
+{
+	int ret;
+
+	/* Always set initial target PCIe link speed to Gen2 for QCA6490 device
+	 * since there may be link issues if it boots up with Gen3 link speed.
+	 * Device is able to change it later at any time. It will be rejected
+	 * if requested speed is higher than the one specified in PCIe DT.
+	 */
+	ret = cnss_pci_set_max_link_speed(plat_priv->bus_priv, rc_num,
+					  PCI_EXP_LNKSTA_CLS_5_0GB);
+	if (ret && ret != -EPROBE_DEFER)
+		cnss_pr_err("Failed to set max PCIe RC%x link speed to Gen2, err = %d\n",
+				rc_num, ret);
+
+	return ret;
+}
+
 #ifdef CONFIG_CNSS2_ENUM_WITH_LOW_SPEED
 static void
 cnss_pci_downgrade_rc_speed(struct cnss_plat_data *plat_priv, u32 rc_num)
@@ -7066,7 +7091,9 @@ cnss_pci_restore_rc_speed(struct cnss_pci_data *pci_priv)
 	struct cnss_plat_data *plat_priv = pci_priv->plat_priv;
 
 	/* if not Genoa, do not restore rc speed */
-	if (pci_priv->device_id != QCN7605_DEVICE_ID) {
+	if (pci_priv->device_id == QCA6490_DEVICE_ID) {
+		cnss_pci_set_gen2_speed(plat_priv, plat_priv->rc_num);
+	} else if (pci_priv->device_id != QCN7605_DEVICE_ID) {
 		/* The request 0 will reset maximum GEN speed to default */
 		ret = cnss_pci_set_max_link_speed(pci_priv, plat_priv->rc_num, 0);
 		if (ret)
@@ -7362,17 +7389,8 @@ static int cnss_pci_enumerate(struct cnss_plat_data *plat_priv, u32 rc_num)
 {
 	int ret, retry = 0;
 
-	/* Always set initial target PCIe link speed to Gen2 for QCA6490 device
-	 * since there may be link issues if it boots up with Gen3 link speed.
-	 * Device is able to change it later at any time. It will be rejected
-	 * if requested speed is higher than the one specified in PCIe DT.
-	 */
 	if (plat_priv->device_id == QCA6490_DEVICE_ID) {
-		ret = cnss_pci_set_max_link_speed(plat_priv->bus_priv, rc_num,
-						  PCI_EXP_LNKSTA_CLS_5_0GB);
-		if (ret && ret != -EPROBE_DEFER)
-			cnss_pr_err("Failed to set max PCIe RC%x link speed to Gen2, err = %d\n",
-				    rc_num, ret);
+		cnss_pci_set_gen2_speed(plat_priv, rc_num);
 	} else {
 		cnss_pci_downgrade_rc_speed(plat_priv, rc_num);
 	}

+ 5 - 0
cnss2/pci.h

@@ -20,6 +20,11 @@
 #include <linux/of_reserved_mem.h>
 #include <linux/pci.h>
 #include <linux/sched_clock.h>
+#include <linux/version.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
+#include <linux/sched/clock.h>
+#endif
+
 
 #include "main.h"
 

+ 12 - 0
cnss2/sun_consolidate_defconfig

@@ -0,0 +1,12 @@
+CONFIG_CNSS2=m
+CONFIG_CNSS_OUT_OF_TREE=y
+CONFIG_CNSS2_QMI=y
+CONFIG_CNSS_QMI_SVC=m
+CONFIG_BUS_AUTO_SUSPEND=y
+CONFIG_CNSS2_SSR_DRIVER_DUMP=y
+CONFIG_CNSS_HW_SECURE_DISABLE=y
+CONFIG_CNSS_HW_SECURE_SMEM=y
+CONFIG_CNSS2_SMMU_DB_SUPPORT=y
+CONFIG_CNSS_PLAT_IPC_QMI_SVC=m
+CONFIG_WCNSS_MEM_PRE_ALLOC=m
+CONFIG_CNSS2_DEBUG=y

+ 11 - 0
cnss2/sun_gki_defconfig

@@ -0,0 +1,11 @@
+CONFIG_CNSS2=m
+CONFIG_CNSS_OUT_OF_TREE=y
+CONFIG_CNSS2_QMI=y
+CONFIG_CNSS_QMI_SVC=m
+CONFIG_BUS_AUTO_SUSPEND=y
+CONFIG_CNSS2_SSR_DRIVER_DUMP=y
+CONFIG_CNSS_HW_SECURE_DISABLE=y
+CONFIG_CNSS_HW_SECURE_SMEM=y
+CONFIG_CNSS2_SMMU_DB_SUPPORT=y
+CONFIG_CNSS_PLAT_IPC_QMI_SVC=m
+CONFIG_WCNSS_MEM_PRE_ALLOC=m

+ 24 - 2
cnss_genl/cnss_nl.c

@@ -1,5 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0-only
-/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. */
+/*
+ * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
 
 #include <net/genetlink.h>
 #ifdef CONFIG_CNSS_OUT_OF_TREE
@@ -9,6 +12,7 @@
 #endif
 #include <linux/module.h>
 #include <linux/of.h>
+#include <linux/version.h>
 
 #define CLD80211_GENL_NAME "cld80211"
 
@@ -66,7 +70,9 @@ static const struct nla_policy cld80211_policy[CLD80211_ATTR_MAX + 1] = {
 	[CLD80211_ATTR_CMD_TAG_DATA] = { .type = NLA_NESTED },
 };
 
-static int cld80211_pre_doit(const struct genl_ops *ops, struct sk_buff *skb,
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
+static int cld80211_pre_doit(const struct genl_split_ops *ops,
+			     struct sk_buff *skb,
 			     struct genl_info *info)
 {
 	u8 cmd_id = ops->cmd;
@@ -81,7 +87,23 @@ static int cld80211_pre_doit(const struct genl_ops *ops, struct sk_buff *skb,
 
 	return 0;
 }
+#else
+static int cld80211_pre_doit(const struct genl_ops *ops, struct sk_buff *skb,
+			     struct genl_info *info)
+{
+	u8 cmd_id = ops->cmd;
+	struct cld80211_nl_data *nl = get_local_ctx();
+
+	if (cmd_id < 1 || cmd_id > CLD80211_MAX_COMMANDS) {
+		pr_err("CLD80211: Command Not supported: %u\n", cmd_id);
+		return -EOPNOTSUPP;
+	}
+	info->user_ptr[0] = nl->cld_ops[cmd_id - 1].cb;
+	info->user_ptr[1] = nl->cld_ops[cmd_id - 1].cb_ctx;
 
+	return 0;
+}
+#endif
 /* The netlink family */
 static struct genl_family cld80211_fam __ro_after_init = {
 	.name = CLD80211_GENL_NAME,

+ 2 - 0
cnss_genl/sun_consolidate_defconfig

@@ -0,0 +1,2 @@
+CONFIG_CNSS_GENL=m
+CONFIG_CNSS_OUT_OF_TREE=y

+ 2 - 0
cnss_genl/sun_gki_defconfig

@@ -0,0 +1,2 @@
+CONFIG_CNSS_GENL=m
+CONFIG_CNSS_OUT_OF_TREE=y

+ 2 - 0
cnss_prealloc/sun_consolidate_defconfig

@@ -0,0 +1,2 @@
+CONFIG_WCNSS_MEM_PRE_ALLOC=m
+CONFIG_CNSS_OUT_OF_TREE=y

+ 2 - 0
cnss_prealloc/sun_gki_defconfig

@@ -0,0 +1,2 @@
+CONFIG_WCNSS_MEM_PRE_ALLOC=m
+CONFIG_CNSS_OUT_OF_TREE=y

+ 4 - 0
cnss_utils/sun_consolidate_defconfig

@@ -0,0 +1,4 @@
+CONFIG_CNSS_UTILS=m
+CONFIG_CNSS_QMI_SVC=m
+CONFIG_CNSS_PLAT_IPC_QMI_SVC=m
+CONFIG_CNSS_OUT_OF_TREE=y

+ 4 - 0
cnss_utils/sun_gki_defconfig

@@ -0,0 +1,4 @@
+CONFIG_CNSS_UTILS=m
+CONFIG_CNSS_QMI_SVC=m
+CONFIG_CNSS_PLAT_IPC_QMI_SVC=m
+CONFIG_CNSS_OUT_OF_TREE=y

+ 0 - 1
icnss2/pineapple_consolidate_defconfig

@@ -2,6 +2,5 @@ CONFIG_ICNSS2=m
 CONFIG_ICNSS2_DEBUG=y
 CONFIG_ICNSS2_QMI=y
 CONFIG_CNSS_QMI_SVC=m
-CONFIG_CNSS_QCA6750=y
 CONFIG_CNSS_OUT_OF_TREE=y
 CONFIG_WCNSS_MEM_PRE_ALLOC=m

+ 0 - 1
icnss2/pineapple_gki_defconfig

@@ -1,6 +1,5 @@
 CONFIG_ICNSS2=m
 CONFIG_ICNSS2_QMI=y
 CONFIG_CNSS_QMI_SVC=m
-CONFIG_CNSS_QCA6750=y
 CONFIG_CNSS_OUT_OF_TREE=y
 CONFIG_WCNSS_MEM_PRE_ALLOC=m

+ 3 - 3
icnss2/qmi.c

@@ -1123,7 +1123,7 @@ int icnss_wlfw_bdf_dnld_send_sync(struct icnss_priv *priv, u32 bdf_type)
 	if (ret)
 		goto err_req_fw;
 
-	ret = request_firmware(&fw_entry, filename, &priv->pdev->dev);
+	ret = firmware_request_nowarn(&fw_entry, filename, &priv->pdev->dev);
 	if (ret) {
 		icnss_pr_err("Failed to load %s: %s ret:%d\n",
 			     icnss_bdf_type_to_str(bdf_type), filename, ret);
@@ -1361,8 +1361,8 @@ int icnss_wlfw_qdss_dnld_send_sync(struct icnss_priv *priv)
 	}
 
 	icnss_add_fw_prefix_name(priv, filename, QDSS_TRACE_CONFIG_FILE);
-	ret = request_firmware(&fw_entry, filename,
-			       &priv->pdev->dev);
+	ret = firmware_request_nowarn(&fw_entry, filename,
+				      &priv->pdev->dev);
 	if (ret) {
 		icnss_pr_err("Failed to load QDSS: %s ret:%d\n",
 			     filename, ret);

+ 2 - 2
wlan_platform_modules.bzl

@@ -9,8 +9,8 @@ _default_module_enablement_list = [
     "wlan_firmware_service"
 ]
 
-_cnss2_enabled_target = ["pineapple"]
-_icnss2_enabled_target = ["blair"]
+_cnss2_enabled_target = ["pineapple", "sun"]
+_icnss2_enabled_target = ["blair", "pineapple"]
 
 def _get_module_list(target, variant):
     tv = "{}_{}".format(target, variant)