disp: msm: dsi: avoid sharing ctrl hw ops across versions
Avoid sharing and have dedicated dsi HW ctrl ops across versions even if they are identical. It helps to stub out a specific version of ops if needed. Change-Id: Ic14c206b526ebe03dd5f47f62701820e7e542670 Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
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@@ -102,11 +102,11 @@ static void dsi_catalog_cmn_init(struct dsi_ctrl_hw *ctrl,
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case DSI_CTRL_VERSION_2_5:
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ctrl->ops.phy_reset_config = dsi_ctrl_hw_22_phy_reset_config;
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ctrl->ops.config_clk_gating = dsi_ctrl_hw_22_config_clk_gating;
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ctrl->ops.setup_lane_map = dsi_ctrl_hw_20_setup_lane_map;
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ctrl->ops.setup_lane_map = dsi_ctrl_hw_22_setup_lane_map;
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ctrl->ops.wait_for_lane_idle =
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dsi_ctrl_hw_20_wait_for_lane_idle;
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dsi_ctrl_hw_22_wait_for_lane_idle;
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ctrl->ops.reg_dump_to_buffer =
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dsi_ctrl_hw_20_reg_dump_to_buffer;
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dsi_ctrl_hw_22_reg_dump_to_buffer;
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ctrl->ops.ulps_ops.ulps_request = dsi_ctrl_hw_cmn_ulps_request;
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ctrl->ops.ulps_ops.ulps_exit = dsi_ctrl_hw_cmn_ulps_exit;
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ctrl->ops.ulps_ops.get_lanes_in_ulps =
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@@ -243,6 +243,12 @@ void dsi_ctrl_hw_kickoff_non_embedded_mode(struct dsi_ctrl_hw *ctrl,
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u32 flags);
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/* Definitions specific to 2.2 DSI controller hardware */
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void dsi_ctrl_hw_22_setup_lane_map(struct dsi_ctrl_hw *ctrl,
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struct dsi_lane_map *lane_map);
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int dsi_ctrl_hw_22_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl, u32 lanes);
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ssize_t dsi_ctrl_hw_22_reg_dump_to_buffer(struct dsi_ctrl_hw *ctrl,
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char *buf, u32 size);
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void dsi_ctrl_hw_22_config_clk_gating(struct dsi_ctrl_hw *ctrl, bool enable,
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enum dsi_clk_gate_type clk_selection);
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@@ -1,8 +1,8 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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*/
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#include <linux/iopoll.h>
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#include "dsi_ctrl_hw.h"
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#include "dsi_ctrl_reg.h"
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#include "dsi_hw.h"
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@@ -13,6 +13,61 @@
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/* register to configure DMA scheduling */
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#define DSI_DMA_SCHEDULE_CTRL 0x100
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void dsi_ctrl_hw_22_setup_lane_map(struct dsi_ctrl_hw *ctrl,
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struct dsi_lane_map *lane_map)
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{
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u32 reg_value = lane_map->lane_map_v2[DSI_LOGICAL_LANE_0] |
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(lane_map->lane_map_v2[DSI_LOGICAL_LANE_1] << 4) |
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(lane_map->lane_map_v2[DSI_LOGICAL_LANE_2] << 8) |
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(lane_map->lane_map_v2[DSI_LOGICAL_LANE_3] << 12);
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DSI_W32(ctrl, DSI_LANE_SWAP_CTRL, reg_value);
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DSI_CTRL_HW_DBG(ctrl, "[DSI_%d] Lane swap setup complete\n",
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ctrl->index);
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}
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int dsi_ctrl_hw_22_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl,
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u32 lanes)
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{
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int rc = 0, val = 0;
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u32 fifo_empty_mask = 0;
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u32 const sleep_us = 10;
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u32 const timeout_us = 100;
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if (lanes & DSI_DATA_LANE_0)
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fifo_empty_mask |= (BIT(12) | BIT(16));
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if (lanes & DSI_DATA_LANE_1)
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fifo_empty_mask |= BIT(20);
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if (lanes & DSI_DATA_LANE_2)
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fifo_empty_mask |= BIT(24);
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if (lanes & DSI_DATA_LANE_3)
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fifo_empty_mask |= BIT(28);
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DSI_CTRL_HW_DBG(ctrl, "%s: polling for fifo empty, mask=0x%08x\n",
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__func__, fifo_empty_mask);
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rc = readl_poll_timeout(ctrl->base + DSI_FIFO_STATUS, val,
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(val & fifo_empty_mask), sleep_us, timeout_us);
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if (rc) {
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DSI_CTRL_HW_ERR(ctrl,
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"%s: fifo not empty, FIFO_STATUS=0x%08x\n",
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__func__, val);
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goto error;
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}
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error:
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return rc;
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}
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ssize_t dsi_ctrl_hw_22_reg_dump_to_buffer(struct dsi_ctrl_hw *ctrl,
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char *buf,
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u32 size)
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{
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return size;
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}
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/**
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* dsi_ctrl_hw_22_phy_reset_config() - to configure clamp control during ulps
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* @ctrl: Pointer to the controller host hardware.
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