diff --git a/msm/dsi/dsi_catalog.c b/msm/dsi/dsi_catalog.c
index fc686bd3b9..9bf5aca097 100644
--- a/msm/dsi/dsi_catalog.c
+++ b/msm/dsi/dsi_catalog.c
@@ -102,11 +102,11 @@ static void dsi_catalog_cmn_init(struct dsi_ctrl_hw *ctrl,
 	case DSI_CTRL_VERSION_2_5:
 		ctrl->ops.phy_reset_config = dsi_ctrl_hw_22_phy_reset_config;
 		ctrl->ops.config_clk_gating = dsi_ctrl_hw_22_config_clk_gating;
-		ctrl->ops.setup_lane_map = dsi_ctrl_hw_20_setup_lane_map;
+		ctrl->ops.setup_lane_map = dsi_ctrl_hw_22_setup_lane_map;
 		ctrl->ops.wait_for_lane_idle =
-			dsi_ctrl_hw_20_wait_for_lane_idle;
+			dsi_ctrl_hw_22_wait_for_lane_idle;
 		ctrl->ops.reg_dump_to_buffer =
-			dsi_ctrl_hw_20_reg_dump_to_buffer;
+			dsi_ctrl_hw_22_reg_dump_to_buffer;
 		ctrl->ops.ulps_ops.ulps_request = dsi_ctrl_hw_cmn_ulps_request;
 		ctrl->ops.ulps_ops.ulps_exit = dsi_ctrl_hw_cmn_ulps_exit;
 		ctrl->ops.ulps_ops.get_lanes_in_ulps =
diff --git a/msm/dsi/dsi_catalog.h b/msm/dsi/dsi_catalog.h
index cfd864bb59..d16d885616 100644
--- a/msm/dsi/dsi_catalog.h
+++ b/msm/dsi/dsi_catalog.h
@@ -243,6 +243,12 @@ void dsi_ctrl_hw_kickoff_non_embedded_mode(struct dsi_ctrl_hw *ctrl,
 					u32 flags);
 
 /* Definitions specific to 2.2 DSI controller hardware */
+void dsi_ctrl_hw_22_setup_lane_map(struct dsi_ctrl_hw *ctrl,
+		       struct dsi_lane_map *lane_map);
+int dsi_ctrl_hw_22_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl, u32 lanes);
+ssize_t dsi_ctrl_hw_22_reg_dump_to_buffer(struct dsi_ctrl_hw *ctrl,
+					  char *buf, u32 size);
+
 void dsi_ctrl_hw_22_config_clk_gating(struct dsi_ctrl_hw *ctrl, bool enable,
 		enum dsi_clk_gate_type clk_selection);
 
diff --git a/msm/dsi/dsi_ctrl_hw_2_2.c b/msm/dsi/dsi_ctrl_hw_2_2.c
index 0c6d3404a2..6d5dff5e7f 100644
--- a/msm/dsi/dsi_ctrl_hw_2_2.c
+++ b/msm/dsi/dsi_ctrl_hw_2_2.c
@@ -1,8 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
  */
-
+#include <linux/iopoll.h>
 #include "dsi_ctrl_hw.h"
 #include "dsi_ctrl_reg.h"
 #include "dsi_hw.h"
@@ -13,6 +13,61 @@
 /* register to configure DMA scheduling */
 #define DSI_DMA_SCHEDULE_CTRL 0x100
 
+void dsi_ctrl_hw_22_setup_lane_map(struct dsi_ctrl_hw *ctrl,
+		       struct dsi_lane_map *lane_map)
+{
+	u32 reg_value = lane_map->lane_map_v2[DSI_LOGICAL_LANE_0] |
+			(lane_map->lane_map_v2[DSI_LOGICAL_LANE_1] << 4) |
+			(lane_map->lane_map_v2[DSI_LOGICAL_LANE_2] << 8) |
+			(lane_map->lane_map_v2[DSI_LOGICAL_LANE_3] << 12);
+
+	DSI_W32(ctrl, DSI_LANE_SWAP_CTRL, reg_value);
+
+	DSI_CTRL_HW_DBG(ctrl, "[DSI_%d] Lane swap setup complete\n",
+			ctrl->index);
+}
+
+int dsi_ctrl_hw_22_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl,
+		u32 lanes)
+{
+	int rc = 0, val = 0;
+	u32 fifo_empty_mask = 0;
+	u32 const sleep_us = 10;
+	u32 const timeout_us = 100;
+
+	if (lanes & DSI_DATA_LANE_0)
+		fifo_empty_mask |= (BIT(12) | BIT(16));
+
+	if (lanes & DSI_DATA_LANE_1)
+		fifo_empty_mask |= BIT(20);
+
+	if (lanes & DSI_DATA_LANE_2)
+		fifo_empty_mask |= BIT(24);
+
+	if (lanes & DSI_DATA_LANE_3)
+		fifo_empty_mask |= BIT(28);
+
+	DSI_CTRL_HW_DBG(ctrl, "%s: polling for fifo empty, mask=0x%08x\n",
+		__func__, fifo_empty_mask);
+	rc = readl_poll_timeout(ctrl->base + DSI_FIFO_STATUS, val,
+			(val & fifo_empty_mask), sleep_us, timeout_us);
+	if (rc) {
+		DSI_CTRL_HW_ERR(ctrl,
+				"%s: fifo not empty, FIFO_STATUS=0x%08x\n",
+				__func__, val);
+		goto error;
+	}
+error:
+	return rc;
+}
+
+ssize_t dsi_ctrl_hw_22_reg_dump_to_buffer(struct dsi_ctrl_hw *ctrl,
+					  char *buf,
+					  u32 size)
+{
+	return size;
+}
+
 /**
  * dsi_ctrl_hw_22_phy_reset_config() - to configure clamp control during ulps
  * @ctrl:          Pointer to the controller host hardware.