samsung-sm8650/android_kernel_samsung_sm8650-modules
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asoc: codecs: Add Comp Off Pa Gain usecase

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If not using compander, allow for user to set pa gain
using DRE_CTL_1 register.

Change-Id: I45af5a64a5630ff1cd8410a66ed55914efb5a529
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
这个提交包含在：
Matthew Rice
2021-12-16 10:43:01 -08:00
提交者 Gerrit - the friendly Code Review server
父节点 311264875e
当前提交 e41373e842
共修改 1 个文件，包含 16 行新增和 13 行删除
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29
asoc/codecs/wsa884x/wsa884x.c
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@@ -683,13 +683,20 @@ static int wsa884x_set_gain_parameters(struct snd_soc_component *component)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(GAIN_RAMPING_MIN, MIN_GAIN, wsa884x->min_gain));
if (wsa884x->comp_enable)
if (wsa884x->comp_enable) {
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(DRE_CTL_0, OFFSET,
wsa884x->comp_offset));
else
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(DRE_CTL_1, CSR_GAIN_EN, 0x00));
} else {
wsa884x->pa_aux_gain = pa_aux_no_comp[wsa884x->system_gain];
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(DRE_CTL_1, CSR_GAIN_EN, 0x01));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(DRE_CTL_1, CSR_GAIN, wsa884x->pa_gain));
}
return 0;
}
@@ -739,9 +746,10 @@ static int wsa_dev_mode_put(struct snd_kcontrol *kcontrol,
}
static const char * const wsa_pa_gain_text[] = {
"G_18_DB", "G_16P5_DB", "G_15_DB", "G_13P5_DB", "G_12_DB", "G_10P5_DB",
"G_9_DB", "G_7P5_DB", "G_6_DB", "G_4P5_DB", "G_3_DB", "G_1P5_DB",
"G_0_DB"
"G_21_DB", "G_19P5_DB" "G_18_DB", "G_16P5_DB", "G_15_DB", "G_13P5_DB",
"G_12_DB", "G_10P5_DB", "G_9_DB", "G_7P5_DB", "G_6_DB", "G_4P5_DB",
"G_3_DB", "G_1P5_DB", "G_0_DB", "G_M1P5_DB", "G_M3_DB", "G_M4P5_DB"
"G_M6_DB", "G_M7P5_DB", "G_M9_DB"
};
static const struct soc_enum wsa_pa_gain_enum =
@@ -1231,7 +1239,7 @@ static const struct snd_kcontrol_new wsa884x_snd_controls[] = {
wsa884x_get_cps, wsa884x_set_cps),
SOC_SINGLE_EXT("External VDD_SPK", SND_SOC_NOPM, 0, 1, 0,
wsa884x_get_ext_vdd_spk, wsa884x_put_ext_vdd_spk),
wsa884x_get_ext_vdd_spk, wsa884x_put_ext_vdd_spk),
};
static const struct snd_kcontrol_new swr_dac_port[] = {
@@ -1276,6 +1284,8 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
if (wsa884x->dev_mode == RECEIVER)
ch_rate[num_port] = SWR_CLK_RATE_4P8MHZ;
++num_port;
if (wsa884x->comp_enable) {
@@ -1382,7 +1392,6 @@ static int wsa884x_spkr_event(struct snd_soc_dapm_widget *w,
wcd_enable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PA_ON_ERR);
wcd_enable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO);
/* Only written when there is a SPKR<->RECV switch */
wsa884x_set_gain_parameters(component);
if (wsa884x->dev_mode == SPEAKER) {
snd_soc_component_update_bits(component,
@@ -1797,12 +1806,6 @@ static int wsa884x_event_notify(struct notifier_block *nb,
REG_FIELD_VALUE(PA_FSM_EN, GLOBAL_PA_EN, 0x01));
wcd_enable_irq(&wsa884x->irq_info,
WSA884X_IRQ_INT_PDM_WD);
/* Added delay as per HW sequence */
usleep_range(3000, 3100);
snd_soc_component_update_bits(wsa884x->component,
REG_FIELD_VALUE(DRE_CTL_1, CSR_GAIN_EN, 0x00));
/* Added delay as per HW sequence */
usleep_range(5000, 5050);
}
break;
case BOLERO_SLV_EVT_PA_ON_POST_FSCLK_ADIE_LB: