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Merge "lpass-cdc: apply digital unmute after PA is enabled"

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This commit is contained in:
qctecmdr
2022-07-12 16:14:47 -07:00
committed by Gerrit - the friendly Code Review server
parent aee4a55108 35ae7a451e
commit dd26499468
2 changed files with 203 additions and 152 deletions
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177
asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c
View File

@@ -201,6 +201,7 @@ static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, in
struct lpass_cdc_wsa_macro_swr_ctrl_data { struct lpass_cdc_wsa_macro_swr_ctrl_data {
struct platform_device *wsa_swr_pdev; struct platform_device *wsa_swr_pdev;
}; };
static int lpass_cdc_wsa_macro_enable_vi_decimator(struct snd_soc_component *component);
#define LPASS_CDC_WSA_MACRO_SET_VOLUME_TLV(xname, xreg, xmin, xmax, tlv_array) \ #define LPASS_CDC_WSA_MACRO_SET_VOLUME_TLV(xname, xreg, xmin, xmax, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
@@ -871,6 +872,26 @@ static int lpass_cdc_wsa_macro_get_channel_map(struct snd_soc_dai *dai,
return 0; return 0;
} }
static void lpass_cdc_wsa_unmute_interpolator(struct snd_soc_dai *dai)
{
struct snd_soc_component *component = dai->component;
uint16_t j = 0, reg = 0, mix_reg = 0;
switch (dai->id) {
case LPASS_CDC_WSA_MACRO_AIF1_PB:
case LPASS_CDC_WSA_MACRO_AIF_MIX1_PB:
for (j = 0; j < NUM_INTERPOLATORS; ++j) {
reg = LPASS_CDC_WSA_RX0_RX_PATH_CTL +
(j * LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET);
mix_reg = LPASS_CDC_WSA_RX0_RX_PATH_MIX_CTL +
(j * LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET);
snd_soc_component_update_bits(component, reg, 0x10, 0x00);
snd_soc_component_update_bits(component, mix_reg, 0x10, 0x00);
}
}
}
static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream) static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
{ {
struct snd_soc_component *component = dai->component; struct snd_soc_component *component = dai->component;
@@ -917,6 +938,8 @@ static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, in
} }
} }
lpass_cdc_wsa_pa_on(wsa_dev, adie_lb); lpass_cdc_wsa_pa_on(wsa_dev, adie_lb);
lpass_cdc_wsa_unmute_interpolator(dai);
lpass_cdc_wsa_macro_enable_vi_decimator(component);
break; break;
default: default:
break; break;
@@ -1081,12 +1104,8 @@ static int lpass_cdc_wsa_macro_event_handler(struct snd_soc_component *component
return 0; return 0;
} }
static int lpass_cdc_wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, static int lpass_cdc_wsa_macro_enable_vi_decimator(struct snd_soc_component *component)
struct snd_kcontrol *kcontrol,
int event)
{ {
struct snd_soc_component *component =
snd_soc_dapm_to_component(w->dapm);
struct device *wsa_dev = NULL; struct device *wsa_dev = NULL;
struct lpass_cdc_wsa_macro_priv *wsa_priv = NULL; struct lpass_cdc_wsa_macro_priv *wsa_priv = NULL;
u8 val = 0x0; u8 val = 0x0;
@@ -1094,6 +1113,8 @@ static int lpass_cdc_wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w,
if (!lpass_cdc_wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__)) if (!lpass_cdc_wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__))
return -EINVAL; return -EINVAL;
usleep_range(5000, 5500);
dev_dbg(wsa_dev, "%s: wsa_priv->pcm_rate_vi %d\n", __func__, wsa_priv->pcm_rate_vi);
switch (wsa_priv->pcm_rate_vi) { switch (wsa_priv->pcm_rate_vi) {
case 48000: case 48000:
val = 0x04; val = 0x04;
@@ -1107,67 +1128,80 @@ static int lpass_cdc_wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w,
break; break;
} }
if (test_bit(LPASS_CDC_WSA_MACRO_TX0,
&wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) {
dev_dbg(wsa_dev, "%s: spkr1 enabled\n", __func__);
/* Enable V&I sensing */
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
if (test_bit(LPASS_CDC_WSA_MACRO_TX1,
&wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) {
dev_dbg(wsa_dev, "%s: spkr2 enabled\n", __func__);
/* Enable V&I sensing */
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
return 0;
}
static int lpass_cdc_wsa_macro_disable_vi_feedback(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol,
int event)
{
struct snd_soc_component *component =
snd_soc_dapm_to_component(w->dapm);
struct device *wsa_dev = NULL;
struct lpass_cdc_wsa_macro_priv *wsa_priv = NULL;
if (!lpass_cdc_wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__))
return -EINVAL;
switch (event) { switch (event) {
case SND_SOC_DAPM_POST_PMU:
if (test_bit(LPASS_CDC_WSA_MACRO_TX0,
&wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) {
dev_dbg(wsa_dev, "%s: spkr1 enabled\n", __func__);
/* Enable V&I sensing */
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
if (test_bit(LPASS_CDC_WSA_MACRO_TX1,
&wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) {
dev_dbg(wsa_dev, "%s: spkr2 enabled\n", __func__);
/* Enable V&I sensing */
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
break;
case SND_SOC_DAPM_POST_PMD: case SND_SOC_DAPM_POST_PMD:
if (test_bit(LPASS_CDC_WSA_MACRO_TX0, if (test_bit(LPASS_CDC_WSA_MACRO_TX0,
&wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) { &wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) {
@@ -1849,20 +1883,15 @@ static int lpass_cdc_wsa_macro_spk_boost_event(struct snd_soc_dapm_widget *w,
struct snd_soc_component *component = struct snd_soc_component *component =
snd_soc_dapm_to_component(w->dapm); snd_soc_dapm_to_component(w->dapm);
u16 boost_path_ctl, boost_path_cfg1; u16 boost_path_ctl, boost_path_cfg1;
u16 reg, reg_mix;
dev_dbg(component->dev, "%s %s %d\n", __func__, w->name, event); dev_dbg(component->dev, "%s %s %d\n", __func__, w->name, event);
if (!strcmp(w->name, "WSA_RX INT0 CHAIN")) { if (!strcmp(w->name, "WSA_RX INT0 CHAIN")) {
boost_path_ctl = LPASS_CDC_WSA_BOOST0_BOOST_PATH_CTL; boost_path_ctl = LPASS_CDC_WSA_BOOST0_BOOST_PATH_CTL;
boost_path_cfg1 = LPASS_CDC_WSA_RX0_RX_PATH_CFG1; boost_path_cfg1 = LPASS_CDC_WSA_RX0_RX_PATH_CFG1;
reg = LPASS_CDC_WSA_RX0_RX_PATH_CTL;
reg_mix = LPASS_CDC_WSA_RX0_RX_PATH_MIX_CTL;
} else if (!strcmp(w->name, "WSA_RX INT1 CHAIN")) { } else if (!strcmp(w->name, "WSA_RX INT1 CHAIN")) {
boost_path_ctl = LPASS_CDC_WSA_BOOST1_BOOST_PATH_CTL; boost_path_ctl = LPASS_CDC_WSA_BOOST1_BOOST_PATH_CTL;
boost_path_cfg1 = LPASS_CDC_WSA_RX1_RX_PATH_CFG1; boost_path_cfg1 = LPASS_CDC_WSA_RX1_RX_PATH_CFG1;
reg = LPASS_CDC_WSA_RX1_RX_PATH_CTL;
reg_mix = LPASS_CDC_WSA_RX1_RX_PATH_MIX_CTL;
} else { } else {
dev_err_ratelimited(component->dev, "%s: unknown widget: %s\n", dev_err_ratelimited(component->dev, "%s: unknown widget: %s\n",
__func__, w->name); __func__, w->name);
@@ -1875,12 +1904,8 @@ static int lpass_cdc_wsa_macro_spk_boost_event(struct snd_soc_dapm_widget *w,
0x01, 0x01); 0x01, 0x01);
snd_soc_component_update_bits(component, boost_path_ctl, snd_soc_component_update_bits(component, boost_path_ctl,
0x10, 0x10); 0x10, 0x10);
if ((snd_soc_component_read(component, reg_mix)) & 0x10)
snd_soc_component_update_bits(component, reg_mix,
0x10, 0x00);
break; break;
case SND_SOC_DAPM_POST_PMU: case SND_SOC_DAPM_POST_PMU:
snd_soc_component_update_bits(component, reg, 0x10, 0x00);
break; break;
case SND_SOC_DAPM_POST_PMD: case SND_SOC_DAPM_POST_PMD:
snd_soc_component_update_bits(component, boost_path_ctl, snd_soc_component_update_bits(component, boost_path_ctl,
@@ -2854,8 +2879,8 @@ static const struct snd_soc_dapm_widget lpass_cdc_wsa_macro_dapm_widgets[] = {
SND_SOC_DAPM_AIF_OUT_E("WSA AIF_VI", "WSA_AIF_VI Capture", 0, SND_SOC_DAPM_AIF_OUT_E("WSA AIF_VI", "WSA_AIF_VI Capture", 0,
SND_SOC_NOPM, LPASS_CDC_WSA_MACRO_AIF_VI, 0, SND_SOC_NOPM, LPASS_CDC_WSA_MACRO_AIF_VI, 0,
lpass_cdc_wsa_macro_enable_vi_feedback, lpass_cdc_wsa_macro_disable_vi_feedback,
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_AIF_OUT("WSA AIF_ECHO", "WSA_AIF_ECHO Capture", 0, SND_SOC_DAPM_AIF_OUT("WSA AIF_ECHO", "WSA_AIF_ECHO Capture", 0,
SND_SOC_NOPM, 0, 0), SND_SOC_NOPM, 0, 0),

178
asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c
View File

@@ -201,6 +201,7 @@ static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, i
struct lpass_cdc_wsa2_macro_swr_ctrl_data { struct lpass_cdc_wsa2_macro_swr_ctrl_data {
struct platform_device *wsa2_swr_pdev; struct platform_device *wsa2_swr_pdev;
}; };
static int lpass_cdc_wsa2_macro_enable_vi_decimator(struct snd_soc_component *component);
#define LPASS_CDC_WSA2_MACRO_SET_VOLUME_TLV(xname, xreg, xmin, xmax, tlv_array) \ #define LPASS_CDC_WSA2_MACRO_SET_VOLUME_TLV(xname, xreg, xmin, xmax, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
@@ -875,6 +876,26 @@ static int lpass_cdc_wsa2_macro_get_channel_map(struct snd_soc_dai *dai,
return 0; return 0;
} }
static void lpass_cdc_wsa2_unmute_interpolator(struct snd_soc_dai *dai)
{
struct snd_soc_component *component = dai->component;
uint16_t j = 0, reg = 0, mix_reg = 0;
switch (dai->id) {
case LPASS_CDC_WSA2_MACRO_AIF1_PB:
case LPASS_CDC_WSA2_MACRO_AIF_MIX1_PB:
for (j = 0; j < NUM_INTERPOLATORS; ++j) {
reg = LPASS_CDC_WSA2_RX0_RX_PATH_CTL +
(j * LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET);
mix_reg = LPASS_CDC_WSA2_RX0_RX_PATH_MIX_CTL +
(j * LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET);
snd_soc_component_update_bits(component, reg, 0x10, 0x00);
snd_soc_component_update_bits(component, mix_reg, 0x10, 0x00);
}
}
}
static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream) static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
{ {
struct snd_soc_component *component = dai->component; struct snd_soc_component *component = dai->component;
@@ -921,6 +942,8 @@ static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, i
} }
} }
lpass_cdc_wsa_pa_on(wsa2_dev, adie_lb); lpass_cdc_wsa_pa_on(wsa2_dev, adie_lb);
lpass_cdc_wsa2_unmute_interpolator(dai);
lpass_cdc_wsa2_macro_enable_vi_decimator(component);
break; break;
default: default:
break; break;
@@ -1085,12 +1108,8 @@ static int lpass_cdc_wsa2_macro_event_handler(struct snd_soc_component *componen
return 0; return 0;
} }
static int lpass_cdc_wsa2_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, static int lpass_cdc_wsa2_macro_enable_vi_decimator(struct snd_soc_component *component)
struct snd_kcontrol *kcontrol,
int event)
{ {
struct snd_soc_component *component =
snd_soc_dapm_to_component(w->dapm);
struct device *wsa2_dev = NULL; struct device *wsa2_dev = NULL;
struct lpass_cdc_wsa2_macro_priv *wsa2_priv = NULL; struct lpass_cdc_wsa2_macro_priv *wsa2_priv = NULL;
u8 val = 0x0; u8 val = 0x0;
@@ -1098,6 +1117,8 @@ static int lpass_cdc_wsa2_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w
if (!lpass_cdc_wsa2_macro_get_data(component, &wsa2_dev, &wsa2_priv, __func__)) if (!lpass_cdc_wsa2_macro_get_data(component, &wsa2_dev, &wsa2_priv, __func__))
return -EINVAL; return -EINVAL;
usleep_range(5000, 5500);
dev_dbg(wsa2_dev, "%s: wsa2_priv->pcm_rate_vi %d\n", __func__, wsa2_priv->pcm_rate_vi);
switch (wsa2_priv->pcm_rate_vi) { switch (wsa2_priv->pcm_rate_vi) {
case 48000: case 48000:
val = 0x04; val = 0x04;
@@ -1111,67 +1132,81 @@ static int lpass_cdc_wsa2_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w
break; break;
} }
if (test_bit(LPASS_CDC_WSA2_MACRO_TX0,
&wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) {
dev_dbg(wsa2_dev, "%s: spkr1 enabled\n", __func__);
/* Enable V&I sensing */
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
if (test_bit(LPASS_CDC_WSA2_MACRO_TX1,
&wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) {
dev_dbg(wsa2_dev, "%s: spkr2 enabled\n", __func__);
/* Enable V&I sensing */
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
return 0;
}
static int lpass_cdc_wsa2_macro_disable_vi_feedback(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol,
int event)
{
struct snd_soc_component *component =
snd_soc_dapm_to_component(w->dapm);
struct device *wsa2_dev = NULL;
struct lpass_cdc_wsa2_macro_priv *wsa2_priv = NULL;
if (!lpass_cdc_wsa2_macro_get_data(component, &wsa2_dev, &wsa2_priv, __func__))
return -EINVAL;
switch (event) { switch (event) {
case SND_SOC_DAPM_POST_PMU:
if (test_bit(LPASS_CDC_WSA2_MACRO_TX0,
&wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) {
dev_dbg(wsa2_dev, "%s: spkr1 enabled\n", __func__);
/* Enable V&I sensing */
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
if (test_bit(LPASS_CDC_WSA2_MACRO_TX1,
&wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) {
dev_dbg(wsa2_dev, "%s: spkr2 enabled\n", __func__);
/* Enable V&I sensing */
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
0x20, 0x20);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
0x0F, val);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
0x10, 0x10);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
break;
case SND_SOC_DAPM_POST_PMD: case SND_SOC_DAPM_POST_PMD:
if (test_bit(LPASS_CDC_WSA2_MACRO_TX0, if (test_bit(LPASS_CDC_WSA2_MACRO_TX0,
&wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) { &wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) {
@@ -1847,20 +1882,15 @@ static int lpass_cdc_wsa2_macro_spk_boost_event(struct snd_soc_dapm_widget *w,
struct snd_soc_component *component = struct snd_soc_component *component =
snd_soc_dapm_to_component(w->dapm); snd_soc_dapm_to_component(w->dapm);
u16 boost_path_ctl, boost_path_cfg1; u16 boost_path_ctl, boost_path_cfg1;
u16 reg, reg_mix;
dev_dbg(component->dev, "%s %s %d\n", __func__, w->name, event); dev_dbg(component->dev, "%s %s %d\n", __func__, w->name, event);
if (!strcmp(w->name, "WSA2_RX INT0 CHAIN")) { if (!strcmp(w->name, "WSA2_RX INT0 CHAIN")) {
boost_path_ctl = LPASS_CDC_WSA2_BOOST0_BOOST_PATH_CTL; boost_path_ctl = LPASS_CDC_WSA2_BOOST0_BOOST_PATH_CTL;
boost_path_cfg1 = LPASS_CDC_WSA2_RX0_RX_PATH_CFG1; boost_path_cfg1 = LPASS_CDC_WSA2_RX0_RX_PATH_CFG1;
reg = LPASS_CDC_WSA2_RX0_RX_PATH_CTL;
reg_mix = LPASS_CDC_WSA2_RX0_RX_PATH_MIX_CTL;
} else if (!strcmp(w->name, "WSA2_RX INT1 CHAIN")) { } else if (!strcmp(w->name, "WSA2_RX INT1 CHAIN")) {
boost_path_ctl = LPASS_CDC_WSA2_BOOST1_BOOST_PATH_CTL; boost_path_ctl = LPASS_CDC_WSA2_BOOST1_BOOST_PATH_CTL;
boost_path_cfg1 = LPASS_CDC_WSA2_RX1_RX_PATH_CFG1; boost_path_cfg1 = LPASS_CDC_WSA2_RX1_RX_PATH_CFG1;
reg = LPASS_CDC_WSA2_RX1_RX_PATH_CTL;
reg_mix = LPASS_CDC_WSA2_RX1_RX_PATH_MIX_CTL;
} else { } else {
dev_err_ratelimited(component->dev, "%s: unknown widget: %s\n", dev_err_ratelimited(component->dev, "%s: unknown widget: %s\n",
__func__, w->name); __func__, w->name);
@@ -1873,12 +1903,8 @@ static int lpass_cdc_wsa2_macro_spk_boost_event(struct snd_soc_dapm_widget *w,
0x01, 0x01); 0x01, 0x01);
snd_soc_component_update_bits(component, boost_path_ctl, snd_soc_component_update_bits(component, boost_path_ctl,
0x10, 0x10); 0x10, 0x10);
if ((snd_soc_component_read(component, reg_mix)) & 0x10)
snd_soc_component_update_bits(component, reg_mix,
0x10, 0x00);
break; break;
case SND_SOC_DAPM_POST_PMU: case SND_SOC_DAPM_POST_PMU:
snd_soc_component_update_bits(component, reg, 0x10, 0x00);
break; break;
case SND_SOC_DAPM_POST_PMD: case SND_SOC_DAPM_POST_PMD:
snd_soc_component_update_bits(component, boost_path_ctl, snd_soc_component_update_bits(component, boost_path_ctl,
@@ -2851,8 +2877,8 @@ static const struct snd_soc_dapm_widget lpass_cdc_wsa2_macro_dapm_widgets[] = {
SND_SOC_DAPM_AIF_OUT_E("WSA2 AIF_VI", "WSA2_AIF_VI Capture", 0, SND_SOC_DAPM_AIF_OUT_E("WSA2 AIF_VI", "WSA2_AIF_VI Capture", 0,
SND_SOC_NOPM, LPASS_CDC_WSA2_MACRO_AIF_VI, 0, SND_SOC_NOPM, LPASS_CDC_WSA2_MACRO_AIF_VI, 0,
lpass_cdc_wsa2_macro_enable_vi_feedback, lpass_cdc_wsa2_macro_disable_vi_feedback,
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_AIF_OUT("WSA2 AIF_ECHO", "WSA2_AIF_ECHO Capture", 0, SND_SOC_DAPM_AIF_OUT("WSA2 AIF_ECHO", "WSA2_AIF_ECHO Capture", 0,
SND_SOC_NOPM, 0, 0), SND_SOC_NOPM, 0, 0),