From e275af39792027c917c90a603d995ccbe0fd6488 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Fri, 1 Jul 2022 18:04:58 +0530 Subject: [PATCH 1/2] asoc: lpass-cdc: fix the vi enable sequence Enable the VI decimator at the end of Rx and VI enable sequence. Change-Id: I12045c903b29d4cc830dbbfd242d805a629c0efd Signed-off-by: Vangala, Amarnath --- asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c | 147 +++++++++--------- asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c | 148 ++++++++++--------- 2 files changed, 161 insertions(+), 134 deletions(-) diff --git a/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c b/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c index 21893eaf05..a74eb953a4 100644 --- a/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c +++ b/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c @@ -201,6 +201,7 @@ static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, in struct lpass_cdc_wsa_macro_swr_ctrl_data { struct platform_device *wsa_swr_pdev; }; +static int lpass_cdc_wsa_macro_enable_vi_decimator(struct snd_soc_component *component); #define LPASS_CDC_WSA_MACRO_SET_VOLUME_TLV(xname, xreg, xmin, xmax, tlv_array) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ @@ -904,6 +905,7 @@ static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, in } } lpass_cdc_wsa_pa_on(wsa_dev, adie_lb); + lpass_cdc_wsa_macro_enable_vi_decimator(component); break; default: break; @@ -1066,12 +1068,8 @@ static int lpass_cdc_wsa_macro_event_handler(struct snd_soc_component *component return 0; } -static int lpass_cdc_wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event) +static int lpass_cdc_wsa_macro_enable_vi_decimator(struct snd_soc_component *component) { - struct snd_soc_component *component = - snd_soc_dapm_to_component(w->dapm); struct device *wsa_dev = NULL; struct lpass_cdc_wsa_macro_priv *wsa_priv = NULL; u8 val = 0x0; @@ -1079,6 +1077,8 @@ static int lpass_cdc_wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, if (!lpass_cdc_wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__)) return -EINVAL; + usleep_range(5000, 5500); + dev_dbg(wsa_dev, "%s: wsa_priv->pcm_rate_vi %d\n", __func__, wsa_priv->pcm_rate_vi); switch (wsa_priv->pcm_rate_vi) { case 48000: val = 0x04; @@ -1092,67 +1092,80 @@ static int lpass_cdc_wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, break; } + if (test_bit(LPASS_CDC_WSA_MACRO_TX0, + &wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) { + dev_dbg(wsa_dev, "%s: spkr1 enabled\n", __func__); + /* Enable V&I sensing */ + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL, + 0x20, 0x20); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL, + 0x20, 0x20); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL, + 0x0F, val); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL, + 0x0F, val); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL, + 0x10, 0x10); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL, + 0x10, 0x10); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL, + 0x20, 0x00); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL, + 0x20, 0x00); + } + if (test_bit(LPASS_CDC_WSA_MACRO_TX1, + &wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) { + dev_dbg(wsa_dev, "%s: spkr2 enabled\n", __func__); + /* Enable V&I sensing */ + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL, + 0x20, 0x20); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL, + 0x20, 0x20); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL, + 0x0F, val); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL, + 0x0F, val); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL, + 0x10, 0x10); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL, + 0x10, 0x10); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL, + 0x20, 0x00); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL, + 0x20, 0x00); + } + return 0; +} + +static int lpass_cdc_wsa_macro_disable_vi_feedback(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct device *wsa_dev = NULL; + struct lpass_cdc_wsa_macro_priv *wsa_priv = NULL; + + if (!lpass_cdc_wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__)) + return -EINVAL; + switch (event) { - case SND_SOC_DAPM_POST_PMU: - if (test_bit(LPASS_CDC_WSA_MACRO_TX0, - &wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) { - dev_dbg(wsa_dev, "%s: spkr1 enabled\n", __func__); - /* Enable V&I sensing */ - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL, - 0x20, 0x20); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL, - 0x20, 0x20); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL, - 0x0F, val); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL, - 0x0F, val); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL, - 0x10, 0x10); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL, - 0x10, 0x10); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL, - 0x20, 0x00); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL, - 0x20, 0x00); - } - if (test_bit(LPASS_CDC_WSA_MACRO_TX1, - &wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) { - dev_dbg(wsa_dev, "%s: spkr2 enabled\n", __func__); - /* Enable V&I sensing */ - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL, - 0x20, 0x20); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL, - 0x20, 0x20); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL, - 0x0F, val); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL, - 0x0F, val); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL, - 0x10, 0x10); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL, - 0x10, 0x10); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL, - 0x20, 0x00); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL, - 0x20, 0x00); - } - break; case SND_SOC_DAPM_POST_PMD: if (test_bit(LPASS_CDC_WSA_MACRO_TX0, &wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) { @@ -2833,8 +2846,8 @@ static const struct snd_soc_dapm_widget lpass_cdc_wsa_macro_dapm_widgets[] = { SND_SOC_DAPM_AIF_OUT_E("WSA AIF_VI", "WSA_AIF_VI Capture", 0, SND_SOC_NOPM, LPASS_CDC_WSA_MACRO_AIF_VI, 0, - lpass_cdc_wsa_macro_enable_vi_feedback, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + lpass_cdc_wsa_macro_disable_vi_feedback, + SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_AIF_OUT("WSA AIF_ECHO", "WSA_AIF_ECHO Capture", 0, SND_SOC_NOPM, 0, 0), diff --git a/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c b/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c index 7061333609..016cb71449 100644 --- a/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c +++ b/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c @@ -201,6 +201,7 @@ static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, i struct lpass_cdc_wsa2_macro_swr_ctrl_data { struct platform_device *wsa2_swr_pdev; }; +static int lpass_cdc_wsa2_macro_enable_vi_decimator(struct snd_soc_component *component); #define LPASS_CDC_WSA2_MACRO_SET_VOLUME_TLV(xname, xreg, xmin, xmax, tlv_array) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ @@ -903,6 +904,7 @@ static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, i } } lpass_cdc_wsa_pa_on(wsa2_dev, adie_lb); + lpass_cdc_wsa2_macro_enable_vi_decimator(component); break; default: break; @@ -1065,12 +1067,8 @@ static int lpass_cdc_wsa2_macro_event_handler(struct snd_soc_component *componen return 0; } -static int lpass_cdc_wsa2_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event) +static int lpass_cdc_wsa2_macro_enable_vi_decimator(struct snd_soc_component *component) { - struct snd_soc_component *component = - snd_soc_dapm_to_component(w->dapm); struct device *wsa2_dev = NULL; struct lpass_cdc_wsa2_macro_priv *wsa2_priv = NULL; u8 val = 0x0; @@ -1078,6 +1076,8 @@ static int lpass_cdc_wsa2_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w if (!lpass_cdc_wsa2_macro_get_data(component, &wsa2_dev, &wsa2_priv, __func__)) return -EINVAL; + usleep_range(5000, 5500); + dev_dbg(wsa2_dev, "%s: wsa2_priv->pcm_rate_vi %d\n", __func__, wsa2_priv->pcm_rate_vi); switch (wsa2_priv->pcm_rate_vi) { case 48000: val = 0x04; @@ -1091,67 +1091,81 @@ static int lpass_cdc_wsa2_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w break; } + if (test_bit(LPASS_CDC_WSA2_MACRO_TX0, + &wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) { + dev_dbg(wsa2_dev, "%s: spkr1 enabled\n", __func__); + /* Enable V&I sensing */ + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL, + 0x20, 0x20); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL, + 0x20, 0x20); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL, + 0x0F, val); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL, + 0x0F, val); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL, + 0x10, 0x10); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL, + 0x10, 0x10); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL, + 0x20, 0x00); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL, + 0x20, 0x00); + } + + if (test_bit(LPASS_CDC_WSA2_MACRO_TX1, + &wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) { + dev_dbg(wsa2_dev, "%s: spkr2 enabled\n", __func__); + /* Enable V&I sensing */ + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL, + 0x20, 0x20); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL, + 0x20, 0x20); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL, + 0x0F, val); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL, + 0x0F, val); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL, + 0x10, 0x10); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL, + 0x10, 0x10); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL, + 0x20, 0x00); + snd_soc_component_update_bits(component, + LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL, + 0x20, 0x00); + } + return 0; +} + +static int lpass_cdc_wsa2_macro_disable_vi_feedback(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct device *wsa2_dev = NULL; + struct lpass_cdc_wsa2_macro_priv *wsa2_priv = NULL; + + if (!lpass_cdc_wsa2_macro_get_data(component, &wsa2_dev, &wsa2_priv, __func__)) + return -EINVAL; + switch (event) { - case SND_SOC_DAPM_POST_PMU: - if (test_bit(LPASS_CDC_WSA2_MACRO_TX0, - &wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) { - dev_dbg(wsa2_dev, "%s: spkr1 enabled\n", __func__); - /* Enable V&I sensing */ - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL, - 0x20, 0x20); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL, - 0x20, 0x20); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL, - 0x0F, val); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL, - 0x0F, val); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL, - 0x10, 0x10); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL, - 0x10, 0x10); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL, - 0x20, 0x00); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL, - 0x20, 0x00); - } - if (test_bit(LPASS_CDC_WSA2_MACRO_TX1, - &wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) { - dev_dbg(wsa2_dev, "%s: spkr2 enabled\n", __func__); - /* Enable V&I sensing */ - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL, - 0x20, 0x20); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL, - 0x20, 0x20); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL, - 0x0F, val); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL, - 0x0F, val); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL, - 0x10, 0x10); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL, - 0x10, 0x10); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL, - 0x20, 0x00); - snd_soc_component_update_bits(component, - LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL, - 0x20, 0x00); - } - break; case SND_SOC_DAPM_POST_PMD: if (test_bit(LPASS_CDC_WSA2_MACRO_TX0, &wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) { @@ -2831,8 +2845,8 @@ static const struct snd_soc_dapm_widget lpass_cdc_wsa2_macro_dapm_widgets[] = { SND_SOC_DAPM_AIF_OUT_E("WSA2 AIF_VI", "WSA2_AIF_VI Capture", 0, SND_SOC_NOPM, LPASS_CDC_WSA2_MACRO_AIF_VI, 0, - lpass_cdc_wsa2_macro_enable_vi_feedback, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + lpass_cdc_wsa2_macro_disable_vi_feedback, + SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_AIF_OUT("WSA2 AIF_ECHO", "WSA2_AIF_ECHO Capture", 0, SND_SOC_NOPM, 0, 0), From 35ae7a451e830ff3f92ae2ee72a11b8522657fcd Mon Sep 17 00:00:00 2001 From: Phani Kumar Uppalapati Date: Sun, 3 Jul 2022 21:48:05 -0700 Subject: [PATCH 2/2] lpass-cdc: apply digital unmute after PA is enabled Unmute digital volume after analog PA is enabled to reduce pop issues. Change-Id: Iae4a5b6df3c258e1ab9976bb0a47946c5a681b08 --- asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c | 30 ++++++++++++++------ asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c | 30 ++++++++++++++------ 2 files changed, 42 insertions(+), 18 deletions(-) diff --git a/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c b/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c index a74eb953a4..1179f76d8e 100644 --- a/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c +++ b/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c @@ -859,6 +859,26 @@ static int lpass_cdc_wsa_macro_get_channel_map(struct snd_soc_dai *dai, return 0; } +static void lpass_cdc_wsa_unmute_interpolator(struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + uint16_t j = 0, reg = 0, mix_reg = 0; + + switch (dai->id) { + case LPASS_CDC_WSA_MACRO_AIF1_PB: + case LPASS_CDC_WSA_MACRO_AIF_MIX1_PB: + for (j = 0; j < NUM_INTERPOLATORS; ++j) { + reg = LPASS_CDC_WSA_RX0_RX_PATH_CTL + + (j * LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET); + mix_reg = LPASS_CDC_WSA_RX0_RX_PATH_MIX_CTL + + (j * LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET); + + snd_soc_component_update_bits(component, reg, 0x10, 0x00); + snd_soc_component_update_bits(component, mix_reg, 0x10, 0x00); + } + } +} + static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream) { struct snd_soc_component *component = dai->component; @@ -905,6 +925,7 @@ static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, in } } lpass_cdc_wsa_pa_on(wsa_dev, adie_lb); + lpass_cdc_wsa_unmute_interpolator(dai); lpass_cdc_wsa_macro_enable_vi_decimator(component); break; default: @@ -1841,20 +1862,15 @@ static int lpass_cdc_wsa_macro_spk_boost_event(struct snd_soc_dapm_widget *w, struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); u16 boost_path_ctl, boost_path_cfg1; - u16 reg, reg_mix; dev_dbg(component->dev, "%s %s %d\n", __func__, w->name, event); if (!strcmp(w->name, "WSA_RX INT0 CHAIN")) { boost_path_ctl = LPASS_CDC_WSA_BOOST0_BOOST_PATH_CTL; boost_path_cfg1 = LPASS_CDC_WSA_RX0_RX_PATH_CFG1; - reg = LPASS_CDC_WSA_RX0_RX_PATH_CTL; - reg_mix = LPASS_CDC_WSA_RX0_RX_PATH_MIX_CTL; } else if (!strcmp(w->name, "WSA_RX INT1 CHAIN")) { boost_path_ctl = LPASS_CDC_WSA_BOOST1_BOOST_PATH_CTL; boost_path_cfg1 = LPASS_CDC_WSA_RX1_RX_PATH_CFG1; - reg = LPASS_CDC_WSA_RX1_RX_PATH_CTL; - reg_mix = LPASS_CDC_WSA_RX1_RX_PATH_MIX_CTL; } else { dev_err_ratelimited(component->dev, "%s: unknown widget: %s\n", __func__, w->name); @@ -1867,12 +1883,8 @@ static int lpass_cdc_wsa_macro_spk_boost_event(struct snd_soc_dapm_widget *w, 0x01, 0x01); snd_soc_component_update_bits(component, boost_path_ctl, 0x10, 0x10); - if ((snd_soc_component_read(component, reg_mix)) & 0x10) - snd_soc_component_update_bits(component, reg_mix, - 0x10, 0x00); break; case SND_SOC_DAPM_POST_PMU: - snd_soc_component_update_bits(component, reg, 0x10, 0x00); break; case SND_SOC_DAPM_POST_PMD: snd_soc_component_update_bits(component, boost_path_ctl, diff --git a/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c b/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c index 016cb71449..fa8ce8f88d 100644 --- a/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c +++ b/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c @@ -858,6 +858,26 @@ static int lpass_cdc_wsa2_macro_get_channel_map(struct snd_soc_dai *dai, return 0; } +static void lpass_cdc_wsa2_unmute_interpolator(struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + uint16_t j = 0, reg = 0, mix_reg = 0; + + switch (dai->id) { + case LPASS_CDC_WSA2_MACRO_AIF1_PB: + case LPASS_CDC_WSA2_MACRO_AIF_MIX1_PB: + for (j = 0; j < NUM_INTERPOLATORS; ++j) { + reg = LPASS_CDC_WSA2_RX0_RX_PATH_CTL + + (j * LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET); + mix_reg = LPASS_CDC_WSA2_RX0_RX_PATH_MIX_CTL + + (j * LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET); + + snd_soc_component_update_bits(component, reg, 0x10, 0x00); + snd_soc_component_update_bits(component, mix_reg, 0x10, 0x00); + } + } +} + static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream) { struct snd_soc_component *component = dai->component; @@ -904,6 +924,7 @@ static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, i } } lpass_cdc_wsa_pa_on(wsa2_dev, adie_lb); + lpass_cdc_wsa2_unmute_interpolator(dai); lpass_cdc_wsa2_macro_enable_vi_decimator(component); break; default: @@ -1841,20 +1862,15 @@ static int lpass_cdc_wsa2_macro_spk_boost_event(struct snd_soc_dapm_widget *w, struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); u16 boost_path_ctl, boost_path_cfg1; - u16 reg, reg_mix; dev_dbg(component->dev, "%s %s %d\n", __func__, w->name, event); if (!strcmp(w->name, "WSA2_RX INT0 CHAIN")) { boost_path_ctl = LPASS_CDC_WSA2_BOOST0_BOOST_PATH_CTL; boost_path_cfg1 = LPASS_CDC_WSA2_RX0_RX_PATH_CFG1; - reg = LPASS_CDC_WSA2_RX0_RX_PATH_CTL; - reg_mix = LPASS_CDC_WSA2_RX0_RX_PATH_MIX_CTL; } else if (!strcmp(w->name, "WSA2_RX INT1 CHAIN")) { boost_path_ctl = LPASS_CDC_WSA2_BOOST1_BOOST_PATH_CTL; boost_path_cfg1 = LPASS_CDC_WSA2_RX1_RX_PATH_CFG1; - reg = LPASS_CDC_WSA2_RX1_RX_PATH_CTL; - reg_mix = LPASS_CDC_WSA2_RX1_RX_PATH_MIX_CTL; } else { dev_err_ratelimited(component->dev, "%s: unknown widget: %s\n", __func__, w->name); @@ -1867,12 +1883,8 @@ static int lpass_cdc_wsa2_macro_spk_boost_event(struct snd_soc_dapm_widget *w, 0x01, 0x01); snd_soc_component_update_bits(component, boost_path_ctl, 0x10, 0x10); - if ((snd_soc_component_read(component, reg_mix)) & 0x10) - snd_soc_component_update_bits(component, reg_mix, - 0x10, 0x00); break; case SND_SOC_DAPM_POST_PMU: - snd_soc_component_update_bits(component, reg, 0x10, 0x00); break; case SND_SOC_DAPM_POST_PMD: snd_soc_component_update_bits(component, boost_path_ctl,