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@@ -73,6 +73,10 @@ enum {
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HPH_PA_DELAY,
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AMIC2_BCS_ENABLE,
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WCD_SUPPLIES_LPM_MODE,
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+ WCD_ADC1_MODE,
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+ WCD_ADC2_MODE,
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+ WCD_ADC3_MODE,
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+ WCD_ADC4_MODE,
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};
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enum {
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@@ -1541,13 +1545,17 @@ static int wcd938x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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if (strnstr(w->name, "ADC", sizeof("ADC"))) {
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- if (test_bit(WCD_ADC1, &wcd938x->status_mask))
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+ if (test_bit(WCD_ADC1, &wcd938x->status_mask) ||
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+ test_bit(WCD_ADC1_MODE, &wcd938x->status_mask))
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mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC1]];
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- if (test_bit(WCD_ADC2, &wcd938x->status_mask))
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+ if (test_bit(WCD_ADC2, &wcd938x->status_mask) ||
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+ test_bit(WCD_ADC2_MODE, &wcd938x->status_mask))
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mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC2]];
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- if (test_bit(WCD_ADC3, &wcd938x->status_mask))
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+ if (test_bit(WCD_ADC3, &wcd938x->status_mask) ||
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+ test_bit(WCD_ADC3_MODE, &wcd938x->status_mask))
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mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC3]];
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- if (test_bit(WCD_ADC4, &wcd938x->status_mask))
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+ if (test_bit(WCD_ADC4, &wcd938x->status_mask) ||
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+ test_bit(WCD_ADC4_MODE, &wcd938x->status_mask))
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mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC4]];
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if (mode != 0) {
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@@ -1594,6 +1602,14 @@ static int wcd938x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
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if (strnstr(w->name, "ADC", sizeof("ADC")))
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wcd938x_set_swr_clk_rate(component, rate, bank);
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+ if (strnstr(w->name, "ADC1", sizeof("ADC1")))
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+ clear_bit(WCD_ADC1_MODE, &wcd938x->status_mask);
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+ else if (strnstr(w->name, "ADC2", sizeof("ADC2")))
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+ clear_bit(WCD_ADC2_MODE, &wcd938x->status_mask);
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+ else if (strnstr(w->name, "ADC3", sizeof("ADC3")))
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+ clear_bit(WCD_ADC3_MODE, &wcd938x->status_mask);
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+ else if (strnstr(w->name, "ADC4", sizeof("ADC4")))
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+ clear_bit(WCD_ADC4_MODE, &wcd938x->status_mask);
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break;
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};
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@@ -2032,21 +2048,25 @@ static int wcd938x_event_notify(struct notifier_block *block,
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if (test_bit(WCD_ADC1, &wcd938x->status_mask)) {
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snd_soc_component_update_bits(component,
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WCD938X_ANA_TX_CH2, 0x40, 0x00);
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+ set_bit(WCD_ADC1_MODE, &wcd938x->status_mask);
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clear_bit(WCD_ADC1, &wcd938x->status_mask);
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}
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if (test_bit(WCD_ADC2, &wcd938x->status_mask)) {
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snd_soc_component_update_bits(component,
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WCD938X_ANA_TX_CH2, 0x20, 0x00);
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+ set_bit(WCD_ADC2_MODE, &wcd938x->status_mask);
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clear_bit(WCD_ADC2, &wcd938x->status_mask);
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}
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if (test_bit(WCD_ADC3, &wcd938x->status_mask)) {
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snd_soc_component_update_bits(component,
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WCD938X_ANA_TX_CH4, 0x40, 0x00);
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+ set_bit(WCD_ADC3_MODE, &wcd938x->status_mask);
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clear_bit(WCD_ADC3, &wcd938x->status_mask);
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}
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if (test_bit(WCD_ADC4, &wcd938x->status_mask)) {
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snd_soc_component_update_bits(component,
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WCD938X_ANA_TX_CH4, 0x20, 0x00);
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+ set_bit(WCD_ADC4_MODE, &wcd938x->status_mask);
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clear_bit(WCD_ADC4, &wcd938x->status_mask);
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}
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break;
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