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@@ -3072,7 +3072,8 @@ static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
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goto failed_to_reset;
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}
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- if (pwr_state != rst_info.required_state)
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+ if (pwr_state != CVP_POWER_IGNORED &&
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+ pwr_state != rst_info.required_state)
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break;
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rc = reset_control_assert(rst);
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@@ -3083,7 +3084,8 @@ static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
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goto failed_to_reset;
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}
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- if (pwr_state != rst_info.required_state)
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+ if (pwr_state != CVP_POWER_IGNORED &&
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+ pwr_state != rst_info.required_state)
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break;
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rc = reset_control_deassert(rst);
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@@ -3117,6 +3119,8 @@ static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
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else
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s = CVP_POWER_OFF;
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+ s = CVP_POWER_IGNORED;
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+
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for (i = 0; i < device->res->reset_set.count; i++) {
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rc = __handle_reset_clk(device->res, i, ASSERT, s);
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if (rc) {
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@@ -3124,10 +3128,12 @@ static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
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"failed to assert reset clocks\n");
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goto failed_to_reset;
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}
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+ }
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- /* wait for deassert */
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- usleep_range(1000, 1050);
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+ /* wait for deassert */
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+ usleep_range(1000, 1050);
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+ for (i = 0; i < device->res->reset_set.count; i++) {
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rc = __handle_reset_clk(device->res, i, DEASSERT, s);
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if (rc) {
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dprintk(CVP_ERR,
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@@ -3902,6 +3908,7 @@ static int __power_off_controller(struct iris_hfi_device *device)
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{
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u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
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u32 sbm_ln0_low;
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+ int rc;
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/* HPG 6.2.2 Step 1 */
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__write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
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@@ -3988,12 +3995,17 @@ static int __power_off_controller(struct iris_hfi_device *device)
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/* HPG 6.2.2 Step 5 */
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msm_cvp_disable_unprepare_clk(device, "cvp_clk");
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- /* HPG 6.2.2 Step 6 */
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- __disable_regulator(device, "cvp");
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-
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/* HPG 6.2.2 Step 7 */
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msm_cvp_disable_unprepare_clk(device, "gcc_video_axi1");
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+ /* Added to avoid pending transaction after power off */
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+ rc = call_iris_op(device, reset_ahb2axi_bridge, device);
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+ if (rc)
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+ dprintk(CVP_ERR, "Off: Failed to reset ahb2axi: %d\n", rc);
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+
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+ /* HPG 6.2.2 Step 6 */
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+ __disable_regulator(device, "cvp");
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+
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return 0;
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}
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