soc: swr-mstr: Change timeout for clk disable during ssr

MBHC operations may take around 200ms to get stopped
during ssr. Match timeout for clock voting to be zero
to allow any pending mbhc operation to exited.

Change-Id: I82162e96595fb337f19192f58f1aa7792e8b0e90
Signed-off-by: Ramprasad Katkam <[email protected]>

soc/swr-mstr-ctrl.c

@@ -2284,7 +2284,7 @@ int swrm_wcd_notify(struct platform_device *pdev, u32 id, void *data)
 		reinit_completion(&swrm->clk_off_complete);
 		if (swrm->clk_ref_count &&
 			 !wait_for_completion_timeout(&swrm->clk_off_complete,
-						   msecs_to_jiffies(200)))
+						   msecs_to_jiffies(500)))
 			dev_err(swrm->dev, "%s: clock voting not zero\n",
 				__func__);