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soc: swr-mstr: Change timeout for clk disable during ssr

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MBHC operations may take around 200ms to get stopped
during ssr. Match timeout for clock voting to be zero
to allow any pending mbhc operation to exited.

Change-Id: I82162e96595fb337f19192f58f1aa7792e8b0e90
Signed-off-by: Ramprasad Katkam <katkam@codeaurora.org>
This commit is contained in:
Ramprasad Katkam
2018-12-12 19:26:19 +05:30
committed by Gerrit - the friendly Code Review server
parent a2958a6205
commit c87efeb82b
1 changed files with 1 additions and 1 deletions
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2
soc/swr-mstr-ctrl.c
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@@ -2284,7 +2284,7 @@ int swrm_wcd_notify(struct platform_device *pdev, u32 id, void *data)
reinit_completion(&swrm->clk_off_complete); reinit_completion(&swrm->clk_off_complete);
if (swrm->clk_ref_count && if (swrm->clk_ref_count &&
!wait_for_completion_timeout(&swrm->clk_off_complete, !wait_for_completion_timeout(&swrm->clk_off_complete,
msecs_to_jiffies(200))) msecs_to_jiffies(500)))
dev_err(swrm->dev, "%s: clock voting not zero\n", dev_err(swrm->dev, "%s: clock voting not zero\n",
__func__); __func__);