samsung-sm8650/android_kernel_samsung_sm8650-modules
1
0
Atdalīts 0
Kods Problēmas Izmaiņu pieprasījumi Darbības Pakotnes Projekti Laidieni Vikivietne Aktivitāte

qcacmn: Rx path changes for multichip MLO

Pārlūkot izejas kodu 
Rx patch changes for multichip MLO

1. Create ini for rx ring mask for each chip
2. Configure hash based routing for each chip based
   on lmac_peer_id_msb
3. Peer setup changes to configure lmac_peer_id_msb
   to enable hash based routing
4. Rx Replenish changes to provide buffers back to owner
   SOC of reo ring

Change-Id: Ibbe6e81f9e62d88d9bb289a082dd14b4362252c4
Šī revīzija ir iekļauta:
Chaithanya Garrepalli
2021-11-23 15:34:30 +05:30
revīziju iesūtīja Madan Koyyalamudi
vecāks bbe062b4b7
revīzija c42af1f62f
23 mainīti faili ar 658 papildinājumiem un 57 dzēšanām
Lejupielādēt ielāpa failu Lejupielādēt izmaiņu failu Izvērst visus failus Savērst visus failus

32
hal/wifi3.0/be/hal_be_api.h
Parādīt failu

@@ -120,4 +120,36 @@ void hal_reo_qdesc_setup_be(hal_soc_handle_t hal_soc_hdl,
void hal_cookie_conversion_reg_cfg_be(hal_soc_handle_t hal_soc_hdl,
struct hal_hw_cc_config *cc_cfg);
/**
* hal_reo_ix_remap_value_get() - Calculate reo remap register value from
* ring_id_mask which is used for hash based
* reo distribution
*
* @hal_soc: Handle to HAL SoC structure
* @ring_id_mask: mask value indicating the rx rings 0th bit set indicate
* REO2SW1 is included in hash distribution
*
* Return: REO remap value
*/
uint32_t
hal_reo_ix_remap_value_get_be(hal_soc_handle_t hal_soc_hdl,
uint8_t rx_ring_mask);
/**
* hal_reo_ring_remap_value_get_be() - return REO remap value
*
* @ring_id: REO2SW ring id
*
* Return: REO remap value
*/
uint8_t
hal_reo_ring_remap_value_get_be(uint8_t rx_ring_id);
/**
* hal_setup_reo_swap() - Set the swap flag for big endian machines
* @soc: HAL soc handle
*
* Return: None
*/
void hal_setup_reo_swap(struct hal_soc *soc);
#endif /* _HAL_BE_API_H_ */

73
hal/wifi3.0/be/hal_be_generic_api.c
Parādīt failu

@@ -24,14 +24,19 @@
#include "hal_tx.h" //HAL_SET_FLD
#include "hal_be_rx.h" //HAL_RX_BUF_RBM_GET
#if defined(QDF_BIG_ENDIAN_MACHINE)
/**
* hal_setup_reo_swap() - Set the swap flag for big endian machines
* @soc: HAL soc handle
/*
* The 4 bits REO destination ring value is defined as: 0: TCL
* 1:SW1 2:SW2 3:SW3 4:SW4 5:Release 6:FW(WIFI) 7:SW5
* 8:SW6 9:SW7 10:SW8 11: NOT_USED.
*
* Return: None
*/
static void hal_setup_reo_swap(struct hal_soc *soc)
uint32_t reo_dest_ring_remap[] = {REO_REMAP_SW1, REO_REMAP_SW2,
REO_REMAP_SW3, REO_REMAP_SW4,
REO_REMAP_SW5, REO_REMAP_SW6,
REO_REMAP_SW7, REO_REMAP_SW8};
#if defined(QDF_BIG_ENDIAN_MACHINE)
void hal_setup_reo_swap(struct hal_soc *soc)
{
uint32_t reg_val;
@@ -45,7 +50,7 @@ static void hal_setup_reo_swap(struct hal_soc *soc)
REO_REG_REG_BASE), reg_val);
}
#else
static inline void hal_setup_reo_swap(struct hal_soc *soc)
void hal_setup_reo_swap(struct hal_soc *soc)
{
}
#endif
@@ -891,6 +896,60 @@ uint32_t hal_rx_msdu_reo_dst_ind_get_be(hal_soc_handle_t hal_soc_hdl,
return dst_ind;
}
uint32_t
hal_reo_ix_remap_value_get_be(hal_soc_handle_t hal_soc_hdl,
uint8_t rx_ring_mask)
{
uint32_t num_rings = 0;
uint32_t i = 0;
uint32_t ring_remap_arr[HAL_MAX_REO2SW_RINGS] = {0};
uint32_t reo_remap_val = 0;
uint32_t ring_idx = 0;
uint8_t ix_map[HAL_NUM_RX_RING_PER_IX_MAP] = {0};
/* create reo ring remap array */
while (i < HAL_MAX_REO2SW_RINGS) {
if (rx_ring_mask & (1 << i)) {
ring_remap_arr[num_rings] = reo_dest_ring_remap[i];
num_rings++;
}
i++;
}
for (i = 0; i < HAL_NUM_RX_RING_PER_IX_MAP; i++) {
if (rx_ring_mask) {
ix_map[i] = ring_remap_arr[ring_idx];
ring_idx = ((ring_idx + 1) % num_rings);
} else {
/* if ring mask is zero configure to release to WBM */
ix_map[i] = REO_REMAP_RELEASE;
}
}
reo_remap_val = HAL_REO_REMAP_IX0(ix_map[0], 0) |
HAL_REO_REMAP_IX0(ix_map[1], 1) |
HAL_REO_REMAP_IX0(ix_map[2], 2) |
HAL_REO_REMAP_IX0(ix_map[3], 3) |
HAL_REO_REMAP_IX0(ix_map[4], 4) |
HAL_REO_REMAP_IX0(ix_map[5], 5) |
HAL_REO_REMAP_IX0(ix_map[6], 6) |
HAL_REO_REMAP_IX0(ix_map[7], 7);
return reo_remap_val;
}
qdf_export_symbol(hal_reo_ix_remap_value_get_be);
uint8_t hal_reo_ring_remap_value_get_be(uint8_t rx_ring_id)
{
if (rx_ring_id > HAL_MAX_REO2SW_RINGS)
return REO_REMAP_RELEASE;
return reo_dest_ring_remap[rx_ring_id];
}
qdf_export_symbol(hal_reo_ring_remap_value_get_be);
/**
* hal_hw_txrx_default_ops_attach_be() - Attach the default hal ops for
* beryllium chipsets.

3
hal/wifi3.0/be/hal_be_reo.h
Parādīt failu

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2017-2019, 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -24,6 +25,8 @@
#include "hal_reo.h"
#define HAL_REO_QUEUE_EXT_DESC 10
#define HAL_MAX_REO2SW_RINGS 8
#define HAL_NUM_RX_RING_PER_IX_MAP 8
/* Proto-types */
void hal_get_ba_aging_timeout_be(hal_soc_handle_t hal_soc_hdl, uint8_t ac,

2
hal/wifi3.0/hal_internal.h
Parādīt failu

@@ -683,6 +683,8 @@ struct shadow_reg_config {
struct hal_reo_params {
/** rx hash steering enabled or disabled */
bool rx_hash_enabled;
/** reo remap 0 register */
uint32_t remap0;
/** reo remap 1 register */
uint32_t remap1;
/** reo remap 2 register */

87
hal/wifi3.0/qcn9224/hal_9224.c
Parādīt failu

@@ -1548,6 +1548,92 @@ static uint8_t hal_get_idle_link_bm_id_9224(uint8_t chip_id)
return (WBM_IDLE_DESC_LIST + chip_id);
}
static void hal_reo_setup_generic_9224(struct hal_soc *soc, void *reoparams)
{
uint32_t reg_val;
struct hal_reo_params *reo_params = (struct hal_reo_params *)reoparams;
reg_val = HAL_REG_READ(soc, HWIO_REO_R0_GENERAL_ENABLE_ADDR(
REO_REG_REG_BASE));
hal_reo_config_9224(soc, reg_val, reo_params);
/* Other ring enable bits and REO_ENABLE will be set by FW */
/* TODO: Setup destination ring mapping if enabled */
/* TODO: Error destination ring setting is left to default.
* Default setting is to send all errors to release ring.
*/
/* Set the reo descriptor swap bits in case of BIG endian platform */
hal_setup_reo_swap(soc);
HAL_REG_WRITE(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(REO_REG_REG_BASE),
HAL_DEFAULT_BE_BK_VI_REO_TIMEOUT_MS * 1000);
HAL_REG_WRITE(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(REO_REG_REG_BASE),
(HAL_DEFAULT_BE_BK_VI_REO_TIMEOUT_MS * 1000));
HAL_REG_WRITE(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(REO_REG_REG_BASE),
(HAL_DEFAULT_BE_BK_VI_REO_TIMEOUT_MS * 1000));
HAL_REG_WRITE(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(REO_REG_REG_BASE),
(HAL_DEFAULT_VO_REO_TIMEOUT_MS * 1000));
/*
* When hash based routing is enabled, routing of the rx packet
* is done based on the following value: 1 _ _ _ _ The last 4
* bits are based on hash[3:0]. This means the possible values
* are 0x10 to 0x1f. This value is used to look-up the
* ring ID configured in Destination_Ring_Ctrl_IX_* register.
* The Destination_Ring_Ctrl_IX_2 and Destination_Ring_Ctrl_IX_3
* registers need to be configured to set-up the 16 entries to
* map the hash values to a ring number. There are 3 bits per
* hash entry – which are mapped as follows:
* 0: TCL, 1:SW1, 2:SW2, * 3:SW3, 4:SW4, 5:Release, 6:FW(WIFI),
* 7: NOT_USED.
*/
if (reo_params->rx_hash_enabled) {
HAL_REG_WRITE(soc,
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR
(REO_REG_REG_BASE), reo_params->remap0);
hal_debug("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR 0x%x",
HAL_REG_READ(soc,
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(
REO_REG_REG_BASE)));
HAL_REG_WRITE(soc,
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR
(REO_REG_REG_BASE), reo_params->remap1);
hal_debug("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR 0x%x",
HAL_REG_READ(soc,
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(
REO_REG_REG_BASE)));
HAL_REG_WRITE(soc,
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR
(REO_REG_REG_BASE), reo_params->remap2);
hal_debug("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR 0x%x",
HAL_REG_READ(soc,
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(
REO_REG_REG_BASE)));
}
/* TODO: Check if the following registers shoould be setup by host:
* AGING_CONTROL
* HIGH_MEMORY_THRESHOLD
* GLOBAL_LINK_DESC_COUNT_THRESH_IX_0[1,2]
* GLOBAL_LINK_DESC_COUNT_CTRL
*/
}
static void hal_hw_txrx_ops_attach_qcn9224(struct hal_soc *hal_soc)
{
/* init and setup */
@@ -1743,6 +1829,7 @@ static void hal_hw_txrx_ops_attach_qcn9224(struct hal_soc *hal_soc)
hal_rx_priv_info_get_from_tlv_be;
hal_soc->ops->hal_rx_pkt_hdr_get = hal_rx_pkt_hdr_get_be;
hal_soc->ops->hal_get_idle_link_bm_id = hal_get_idle_link_bm_id_9224;
hal_soc->ops->hal_reo_setup = hal_reo_setup_generic_9224;
};
struct hal_hw_srng_config hw_srng_table_9224[] = {