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@@ -37,6 +37,12 @@ static DEFINE_MUTEX(active_csiphy_cnt_mutex);
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static int csiphy_dump;
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static int csiphy_dump;
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module_param(csiphy_dump, int, 0644);
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module_param(csiphy_dump, int, 0644);
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+
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+static int csiphy_onthego_reg_count;
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+static unsigned int csiphy_onthego_regs[150];
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+module_param_array(csiphy_onthego_regs, uint, &csiphy_onthego_reg_count, 0644);
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+MODULE_PARM_DESC(csiphy_onthego_regs, "Functionality to program csiphy registers on the fly");
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+
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struct g_csiphy_data {
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struct g_csiphy_data {
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void __iomem *base_address;
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void __iomem *base_address;
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uint8_t is_3phase;
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uint8_t is_3phase;
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@@ -1501,7 +1507,10 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
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struct cam_control *cmd = (struct cam_control *)arg;
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struct cam_control *cmd = (struct cam_control *)arg;
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struct csiphy_device *csiphy_dev = (struct csiphy_device *)phy_dev;
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struct csiphy_device *csiphy_dev = (struct csiphy_device *)phy_dev;
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struct csiphy_reg_parms_t *csiphy_reg;
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struct csiphy_reg_parms_t *csiphy_reg;
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+ struct cam_hw_soc_info *soc_info;
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+ void __iomem *csiphybase;
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int32_t rc = 0;
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int32_t rc = 0;
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+ uint32_t i;
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if (!csiphy_dev || !cmd) {
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if (!csiphy_dev || !cmd) {
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CAM_ERR(CAM_CSIPHY, "Invalid input args");
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CAM_ERR(CAM_CSIPHY, "Invalid input args");
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@@ -1514,6 +1523,13 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
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return -EINVAL;
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return -EINVAL;
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}
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}
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+ soc_info = &csiphy_dev->soc_info;
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+ if (!soc_info) {
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+ CAM_ERR(CAM_CSIPHY, "Null Soc_info");
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+ return -EINVAL;
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+ }
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+
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+ csiphybase = soc_info->reg_map[0].mem_base;
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csiphy_reg = &csiphy_dev->ctrl_reg->csiphy_reg;
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csiphy_reg = &csiphy_dev->ctrl_reg->csiphy_reg;
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CAM_DBG(CAM_CSIPHY, "Opcode received: %d", cmd->op_code);
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CAM_DBG(CAM_CSIPHY, "Opcode received: %d", cmd->op_code);
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mutex_lock(&csiphy_dev->mutex);
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mutex_lock(&csiphy_dev->mutex);
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@@ -1954,6 +1970,28 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
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mutex_unlock(&active_csiphy_cnt_mutex);
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mutex_unlock(&active_csiphy_cnt_mutex);
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}
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}
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+ if (csiphy_onthego_reg_count) {
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+ CAM_DBG(CAM_CSIPHY, "csiphy_onthego_reg_count: %d",
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+ csiphy_onthego_reg_count);
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+
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+ if (csiphy_onthego_reg_count % 3)
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+ csiphy_onthego_reg_count -= (csiphy_onthego_reg_count % 3);
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+
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+ for (i = 0; i < csiphy_onthego_reg_count; i += 3) {
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+ cam_io_w_mb(csiphy_onthego_regs[i+1],
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+ csiphybase + csiphy_onthego_regs[i]);
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+
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+ if (csiphy_onthego_regs[i+2])
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+ usleep_range(csiphy_onthego_regs[i+2],
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+ csiphy_onthego_regs[i+2] + 5);
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+
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+ CAM_INFO(CAM_CSIPHY, "Offset: 0x%x, Val: 0x%x Delay(us): %u",
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+ csiphy_onthego_regs[i],
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+ cam_io_r_mb(csiphybase + csiphy_onthego_regs[i]),
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+ csiphy_onthego_regs[i+2]);
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+ }
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+ }
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+
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if (csiphy_dev->en_status_reg_dump) {
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if (csiphy_dev->en_status_reg_dump) {
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usleep_range(50000, 50005);
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usleep_range(50000, 50005);
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CAM_INFO(CAM_CSIPHY, "Status Reg Dump after config");
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CAM_INFO(CAM_CSIPHY, "Status Reg Dump after config");
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