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@@ -938,6 +938,8 @@ static int cam_ife_csid_ver2_rx_err_bottom_half(
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size_t len = 0;
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uint32_t val = 0;
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uint32_t event_type = 0;
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+ uint32_t long_pkt_ftr_val;
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+ uint32_t total_crc;
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if (!handler_priv || !evt_payload_priv) {
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CAM_ERR(CAM_ISP, "Invalid params");
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@@ -996,8 +998,11 @@ static int cam_ife_csid_ver2_rx_err_bottom_half(
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}
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if (irq_status & IFE_CSID_VER2_RX_ERROR_ECC)
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- CAM_ERR_BUF(CAM_ISP, log_buf, CAM_IFE_CSID_LOG_BUF_LEN, &len,
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- "DPHY_ERROR_ECC: Pkt hdr errors unrecoverable");
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+ CAM_ERR_BUF(CAM_ISP, log_buf,
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+ CAM_IFE_CSID_LOG_BUF_LEN, &len,
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+ "DPHY_ERROR_ECC: Pkt hdr errors unrecoverable. ECC: 0x%x",
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+ cam_io_r_mb(soc_info->reg_map[0].mem_base +
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+ csi2_reg->captured_long_pkt_1_addr));
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rx_irq_status |= irq_status;
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csid_hw->flags.fatal_err_detected = true;
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@@ -1012,8 +1017,8 @@ static int cam_ife_csid_ver2_rx_err_bottom_half(
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if (irq_status & IFE_CSID_VER2_RX_CPHY_EOT_RECEPTION)
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CAM_ERR_BUF(CAM_ISP, log_buf, CAM_IFE_CSID_LOG_BUF_LEN, &len,
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- "CPHY_EOT_RECEPTION: No EOT on lane/s, is_EPD: %d, PHY_Type: %s(%u) ",
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- csid_hw->rx_cfg.epd_supported,
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+ "CPHY_EOT_RECEPTION: No EOT on lane/s, is_EPD: %c, PHY_Type: %s(%u)",
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+ (csid_hw->rx_cfg.epd_supported & CAM_ISP_EPD_SUPPORT) ? 'Y' : 'N',
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(csid_hw->rx_cfg.lane_type) ? "cphy" : "dphy",
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csid_hw->rx_cfg.lane_type);
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@@ -1021,9 +1026,33 @@ static int cam_ife_csid_ver2_rx_err_bottom_half(
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CAM_ERR_BUF(CAM_ISP, log_buf, CAM_IFE_CSID_LOG_BUF_LEN, &len,
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"CPHY_SOT_RECEPTION: Less SOTs on lane/s");
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- if (irq_status & IFE_CSID_VER2_RX_ERROR_CRC)
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- CAM_ERR_BUF(CAM_ISP, log_buf, CAM_IFE_CSID_LOG_BUF_LEN, &len,
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- "CPHY_ERROR_CRC: Long pkt payload CRC mismatch");
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+ if (irq_status & IFE_CSID_VER2_RX_ERROR_CRC) {
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+ long_pkt_ftr_val = cam_io_r_mb(
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+ soc_info->reg_map[0].mem_base +
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+ csi2_reg->captured_long_pkt_ftr_addr);
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+ total_crc = cam_io_r_mb(
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+ soc_info->reg_map[0].mem_base +
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+ csi2_reg->total_crc_err_addr);
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+
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+ if (csid_hw->rx_cfg.lane_type == CAM_ISP_LANE_TYPE_CPHY) {
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+ val = cam_io_r_mb(
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+ soc_info->reg_map[0].mem_base +
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+ csi2_reg->captured_cphy_pkt_hdr_addr);
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+
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+ CAM_ERR_BUF(CAM_ISP, log_buf,
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+ CAM_IFE_CSID_LOG_BUF_LEN, &len,
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+ "PHY_CRC_ERROR: Long pkt payload CRC mismatch. Totl CRC Errs: %u, Rcvd CRC: 0x%x Caltd CRC: 0x%x, VC:%d DT:%d WC:%d",
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+ total_crc,
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+ long_pkt_ftr_val & 0xffff, long_pkt_ftr_val >> 16,
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+ val >> 22, (val >> 16) & 0x3F, val & 0xFFFF);
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+ } else {
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+ CAM_ERR_BUF(CAM_ISP, log_buf,
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+ CAM_IFE_CSID_LOG_BUF_LEN, &len,
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+ "PHY_CRC_ERROR: Long pkt payload CRC mismatch. Totl CRC Errs: %u, Rcvd CRC: 0x%x Caltd CRC: 0x%x",
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+ total_crc,
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+ long_pkt_ftr_val & 0xffff, long_pkt_ftr_val >> 16);
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+ }
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+ }
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if (irq_status & IFE_CSID_VER2_RX_UNBOUNDED_FRAME)
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CAM_ERR_BUF(CAM_ISP, log_buf, CAM_IFE_CSID_LOG_BUF_LEN, &len,
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@@ -3290,8 +3319,7 @@ static int cam_ife_csid_ver2_enable_csi2(struct cam_ife_csid_ver2_hw *csid_hw)
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/*Configure Rx cfg1*/
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val = 1 << csi2_reg->misr_enable_shift_val;
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val |= 1 << csi2_reg->ecc_correction_shift_en;
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- val |= (rx_cfg->epd_supported
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- << csi2_reg->epd_mode_shift_en);
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+ val |= (rx_cfg->epd_supported << csi2_reg->epd_mode_shift_en);
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if (rx_cfg->dynamic_sensor_switch_en)
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val |= 1 << csi2_reg->dyn_sensor_switch_shift_en;
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