video: driver: add power domain and opp table support for video

Added changes to support generic power domain and opp table.
This is an alternative for downstream regulator framework.

power domain can be enabled using below dtsi entries.

power-domains =
    <&videocc MVS0C_GDSC>,
	<&videocc MVS0_GDSC>,
	<&rpmhpd SM8450_MXC>,
	<&rpmhpd SM8450_MMCX>
power-domain-names =
    "iris-ctl", "vcodec", "mx", "mmcx";

Power domain handles willbe parsed at driver side using below api's.
   - dev_pm_domain_attach_by_name()
   - devm_pm_opp_attach_genpd()

devm_pm_opp_attach_genpd() provides consumer virtual device handles
and i.e linked to core->dev using device_link_add().

MXC, MMCX rails wilbe powered up by scaling desired rate using
dev_pm_opp_set_rate().

Change-Id: I3d73434cb772078f031aec7cadc2d42ab930edd0
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>

driver/vidc/inc/resources.h

@@ -67,6 +67,10 @@ struct msm_vidc_core;
 	venus_hfi_for_each_thing_reverse_continue(__device, __rinfo, \
 			regulator, __from)
 
+/* Power domain set helpers */
+#define venus_hfi_for_each_power_domain(__device, __pdinfo) \
+	venus_hfi_for_each_thing(__device, __pdinfo, power_domain)
+
 /* Clock set helpers */
 #define venus_hfi_for_each_clock(__device, __cinfo) \
 	venus_hfi_for_each_thing(__device, __cinfo, clock)
@@ -118,6 +122,16 @@ struct regulator_set {
 	u32                        count;
 };
 
+struct power_domain_info {
+	struct device             *genpd_dev;
+	const char                *name;
+};
+
+struct power_domain_set {
+	struct power_domain_info  *power_domain_tbl;
+	u32                        count;
+};
+
 struct clock_residency {
 	struct list_head           list;
 	u64                        rate;
@@ -202,6 +216,7 @@ struct msm_vidc_resource {
 	u32                        irq;
 	struct bus_set             bus_set;
 	struct regulator_set       regulator_set;
+	struct power_domain_set    power_domain_set;
 	struct clock_set           clock_set;
 	struct reset_set           reset_set;
 	struct subcache_set        subcache_set;
@@ -227,6 +242,7 @@ struct msm_vidc_resources_ops {
 	int (*reset_control_deassert)(struct msm_vidc_core *core,
 			const char *name);
 
+	int (*gdsc_init)(struct msm_vidc_core *core);
 	int (*gdsc_on)(struct msm_vidc_core *core, const char *name);
 	int (*gdsc_off)(struct msm_vidc_core *core, const char *name);
 	int (*gdsc_hw_ctrl)(struct msm_vidc_core *core);