ab9b1a112b
Added changes to support generic power domain and opp table.
This is an alternative for downstream regulator framework.
power domain can be enabled using below dtsi entries.
power-domains =
<&videocc MVS0C_GDSC>,
<&videocc MVS0_GDSC>,
<&rpmhpd SM8450_MXC>,
<&rpmhpd SM8450_MMCX>
power-domain-names =
"iris-ctl", "vcodec", "mx", "mmcx";
Power domain handles willbe parsed at driver side using below api's.
- dev_pm_domain_attach_by_name()
- devm_pm_opp_attach_genpd()
devm_pm_opp_attach_genpd() provides consumer virtual device handles
and i.e linked to core->dev using device_link_add().
MXC, MMCX rails wilbe powered up by scaling desired rate using
dev_pm_opp_set_rate().
Change-Id: I3d73434cb772078f031aec7cadc2d42ab930edd0
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
267 lines
8.3 KiB
C
267 lines
8.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020-2022, The Linux Foundation. All rights reserved.
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _MSM_VIDC_RESOURCES_H_
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#define _MSM_VIDC_RESOURCES_H_
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#include <linux/clk/qcom.h>
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struct icc_path;
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struct regulator;
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struct clk;
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struct reset_control;
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struct llcc_slice_desc;
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struct iommu_domain;
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struct device;
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struct msm_vidc_core;
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/*
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* These are helper macros to iterate over various lists within
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* msm_vidc_core->resource. The intention is to cut down on a lot
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* of boiler-plate code
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*/
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/* Read as "for each 'thing' in a set of 'thingies'" */
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#define venus_hfi_for_each_thing(__device, __thing, __thingy) \
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venus_hfi_for_each_thing_continue(__device, __thing, __thingy, 0)
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#define venus_hfi_for_each_thing_reverse(__device, __thing, __thingy) \
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venus_hfi_for_each_thing_reverse_continue(__device, __thing, __thingy, \
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(__device)->resource->__thingy##_set.count - 1)
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/* TODO: the __from parameter technically not required since we can figure it
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* out with some pointer magic (i.e. __thing - __thing##_tbl[0]). If this macro
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* sees extensive use, probably worth cleaning it up but for now omitting it
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* since it introduces unnecessary complexity.
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*/
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#define venus_hfi_for_each_thing_continue(__device, __thing, __thingy, __from) \
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for (__thing = &(__device)->resource->\
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__thingy##_set.__thingy##_tbl[__from]; \
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__thing < &(__device)->resource->__thingy##_set.__thingy##_tbl[0] + \
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((__device)->resource->__thingy##_set.count - __from); \
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++__thing)
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#define venus_hfi_for_each_thing_reverse_continue(__device, __thing, __thingy, \
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__from) \
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for (__thing = &(__device)->resource->\
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__thingy##_set.__thingy##_tbl[__from]; \
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__thing >= &(__device)->resource->__thingy##_set.__thingy##_tbl[0]; \
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--__thing)
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/* Bus set helpers */
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#define venus_hfi_for_each_bus(__device, __binfo) \
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venus_hfi_for_each_thing(__device, __binfo, bus)
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#define venus_hfi_for_each_bus_reverse(__device, __binfo) \
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venus_hfi_for_each_thing_reverse(__device, __binfo, bus)
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/* Regular set helpers */
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#define venus_hfi_for_each_regulator(__device, __rinfo) \
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venus_hfi_for_each_thing(__device, __rinfo, regulator)
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#define venus_hfi_for_each_regulator_reverse(__device, __rinfo) \
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venus_hfi_for_each_thing_reverse(__device, __rinfo, regulator)
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#define venus_hfi_for_each_regulator_reverse_continue(__device, __rinfo, \
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__from) \
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venus_hfi_for_each_thing_reverse_continue(__device, __rinfo, \
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regulator, __from)
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/* Power domain set helpers */
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#define venus_hfi_for_each_power_domain(__device, __pdinfo) \
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venus_hfi_for_each_thing(__device, __pdinfo, power_domain)
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/* Clock set helpers */
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#define venus_hfi_for_each_clock(__device, __cinfo) \
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venus_hfi_for_each_thing(__device, __cinfo, clock)
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#define venus_hfi_for_each_clock_reverse(__device, __cinfo) \
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venus_hfi_for_each_thing_reverse(__device, __cinfo, clock)
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/* Reset clock set helpers */
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#define venus_hfi_for_each_reset_clock(__device, __rcinfo) \
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venus_hfi_for_each_thing(__device, __rcinfo, reset)
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#define venus_hfi_for_each_reset_clock_reverse(__device, __rcinfo) \
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venus_hfi_for_each_thing_reverse(__device, __rcinfo, reset)
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#define venus_hfi_for_each_reset_clock_reverse_continue(__device, __rinfo, \
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__from) \
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venus_hfi_for_each_thing_reverse_continue(__device, __rinfo, \
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reset, __from)
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/* Subcache set helpers */
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#define venus_hfi_for_each_subcache(__device, __sinfo) \
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venus_hfi_for_each_thing(__device, __sinfo, subcache)
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#define venus_hfi_for_each_subcache_reverse(__device, __sinfo) \
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venus_hfi_for_each_thing_reverse(__device, __sinfo, subcache)
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/* Contextbank set helpers */
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#define venus_hfi_for_each_context_bank(__device, __sinfo) \
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venus_hfi_for_each_thing(__device, __sinfo, context_bank)
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#define venus_hfi_for_each_context_bank_reverse(__device, __sinfo) \
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venus_hfi_for_each_thing_reverse(__device, __sinfo, context_bank)
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struct bus_info {
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struct icc_path *icc;
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const char *name;
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u32 min_kbps;
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u32 max_kbps;
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};
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struct bus_set {
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struct bus_info *bus_tbl;
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u32 count;
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};
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struct regulator_info {
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struct regulator *regulator;
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const char *name;
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bool hw_power_collapse;
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};
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struct regulator_set {
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struct regulator_info *regulator_tbl;
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u32 count;
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};
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struct power_domain_info {
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struct device *genpd_dev;
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const char *name;
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};
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struct power_domain_set {
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struct power_domain_info *power_domain_tbl;
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u32 count;
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};
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struct clock_residency {
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struct list_head list;
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u64 rate;
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u64 start_time_us;
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u64 total_time_us;
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};
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struct clock_info {
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struct clk *clk;
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const char *name;
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u32 clk_id;
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bool has_scaling;
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u64 prev;
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#ifdef CONFIG_MSM_MMRM
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struct mmrm_client *mmrm_client;
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#endif
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struct list_head residency_list; /* list of struct clock_residency */
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};
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struct clock_set {
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struct clock_info *clock_tbl;
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u32 count;
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};
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struct reset_info {
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struct reset_control *rst;
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const char *name;
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bool exclusive_release;
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};
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struct reset_set {
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struct reset_info *reset_tbl;
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u32 count;
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};
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struct subcache_info {
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struct llcc_slice_desc *subcache;
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const char *name;
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u32 llcc_id;
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bool isactive;
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};
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struct subcache_set {
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struct subcache_info *subcache_tbl;
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u32 count;
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bool set_to_fw;
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};
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struct addr_range {
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u32 start;
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u32 size;
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};
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struct context_bank_info {
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const char *name;
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struct addr_range addr_range;
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bool secure;
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bool dma_coherant;
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struct device *dev;
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struct iommu_domain *domain;
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u32 region;
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u64 dma_mask;
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};
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struct context_bank_set {
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struct context_bank_info *context_bank_tbl;
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u32 count;
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};
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struct frequency_table {
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unsigned long freq;
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};
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struct freq_set {
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struct frequency_table *freq_tbl;
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u32 count;
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};
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struct msm_vidc_resource {
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void *core;
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u8 __iomem *register_base_addr;
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u32 irq;
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struct bus_set bus_set;
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struct regulator_set regulator_set;
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struct power_domain_set power_domain_set;
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struct clock_set clock_set;
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struct reset_set reset_set;
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struct subcache_set subcache_set;
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struct context_bank_set context_bank_set;
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struct freq_set freq_set;
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int fw_cookie;
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};
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#define call_res_op(c, op, ...) \
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(((c) && (c)->res_ops && (c)->res_ops->op) ? \
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((c)->res_ops->op(__VA_ARGS__)) : 0)
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struct msm_vidc_resources_ops {
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int (*init)(struct msm_vidc_core *core);
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int (*reset_bridge)(struct msm_vidc_core *core);
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int (*reset_control_acquire)(struct msm_vidc_core *core,
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const char *name);
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int (*reset_control_release)(struct msm_vidc_core *core,
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const char *name);
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int (*reset_control_assert)(struct msm_vidc_core *core,
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const char *name);
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int (*reset_control_deassert)(struct msm_vidc_core *core,
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const char *name);
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int (*gdsc_init)(struct msm_vidc_core *core);
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int (*gdsc_on)(struct msm_vidc_core *core, const char *name);
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int (*gdsc_off)(struct msm_vidc_core *core, const char *name);
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int (*gdsc_hw_ctrl)(struct msm_vidc_core *core);
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int (*gdsc_sw_ctrl)(struct msm_vidc_core *core);
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int (*llcc)(struct msm_vidc_core *core, bool enable);
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int (*set_bw)(struct msm_vidc_core *core, unsigned long bw_ddr,
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unsigned long bw_llcc);
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int (*set_clks)(struct msm_vidc_core *core, u64 rate);
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int (*clk_disable)(struct msm_vidc_core *core, const char *name);
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int (*clk_enable)(struct msm_vidc_core *core, const char *name);
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int (*clk_set_flag)(struct msm_vidc_core *core,
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const char *name, enum branch_mem_flags flag);
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int (*clk_print_residency_stats)(struct msm_vidc_core *core);
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int (*clk_reset_residency_stats)(struct msm_vidc_core *core);
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};
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const struct msm_vidc_resources_ops *get_resources_ops(void);
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#endif
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