Forráskód Böngészése

Merge "disp: msm: sde: avoid disabling dsc encoder in PP block"

qctecmdr 5 éve
szülő
commit
a8f62850f1
3 módosított fájl, 15 hozzáadás és 5 törlés
  1. 2 1
      msm/sde/sde_crtc.c
  2. 12 4
      msm/sde/sde_encoder_dce.c
  3. 1 0
      msm/sde/sde_hw_catalog.c

+ 2 - 1
msm/sde/sde_crtc.c

@@ -1299,7 +1299,8 @@ static void _sde_crtc_set_src_split_order(struct drm_crtc *crtc,
 		prv_pstate = (i > 0) ? &pstates[i - 1] : NULL;
 		cur_pstate = &pstates[i];
 		nxt_pstate = ((i + 1) < cnt) ? &pstates[i + 1] : NULL;
-		prev_layout = prv_pstate->sde_pstate->layout;
+		prev_layout = prv_pstate ? prv_pstate->sde_pstate->layout :
+							SDE_LAYOUT_NONE;
 		cur_layout = cur_pstate->sde_pstate->layout;
 
 		if ((!prv_pstate) || (prv_pstate->stage != cur_pstate->stage)

+ 12 - 4
msm/sde/sde_encoder_dce.c

@@ -200,10 +200,17 @@ static void _dce_dsc_pipe_cfg(struct sde_hw_dsc *hw_dsc,
 		u32 common_mode, bool ich_reset,
 		struct sde_hw_pingpong *hw_dsc_pp,
 		enum sde_3d_blend_mode mode_3d,
-		bool disable_merge_3d, bool enable)
+		bool disable_merge_3d, bool enable,
+		bool half_panel_partial_update)
 {
 	if (!enable) {
-		if (hw_dsc_pp && hw_dsc_pp->ops.disable_dsc)
+		/*
+		 * avoid disabling dsc encoder in pp-block as it is
+		 * not double-buffered and is not required to be disabled
+		 * for half panel updates
+		 */
+		if (hw_dsc_pp && hw_dsc_pp->ops.disable_dsc
+				&& !half_panel_partial_update)
 			hw_dsc_pp->ops.disable_dsc(hw_dsc_pp);
 
 		if (hw_dsc && hw_dsc->ops.dsc_disable)
@@ -342,7 +349,8 @@ static int _dce_dsc_setup_single(struct sde_encoder_virt *sde_enc,
 			index, active, merge_3d, disable_merge_3d);
 
 	_dce_dsc_pipe_cfg(hw_dsc, hw_pp, dsc, dsc_common_mode, ich_res,
-			hw_dsc_pp, mode_3d, disable_merge_3d, active);
+			hw_dsc_pp, mode_3d, disable_merge_3d, active,
+			half_panel_partial_update);
 
 	memset(&cfg, 0, sizeof(cfg));
 	cfg.dsc[cfg.dsc_count++] = hw_dsc->idx;
@@ -717,7 +725,7 @@ static void _dce_dsc_disable(struct sde_encoder_virt *sde_enc)
 
 		_dce_dsc_pipe_cfg(hw_dsc, hw_pp, NULL,
 					0, 0, hw_dsc_pp,
-					BLEND_3D_NONE, false, false);
+					BLEND_3D_NONE, false, false, false);
 
 		if (hw_dsc) {
 			sde_enc->dirty_dsc_ids[i] = hw_dsc->idx;

+ 1 - 0
msm/sde/sde_hw_catalog.c

@@ -3010,6 +3010,7 @@ static int sde_vdc_parse_dt(struct device_node *np,
 		rc = 0;
 	} else {
 		SDE_ERROR("invalid vdc configuration\n");
+		goto end;
 	}
 
 	rc = _read_dt_entry(np, vdc_prop, ARRAY_SIZE(vdc_prop), prop_count,