asoc: codecs: restore wsa analog driver files
Add support back for wsa analog codec driver files. Change-Id: I7ef6ad050b068ec8c0f0275089d670c92234686d Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
此提交包含在：
Laxminath Kasam
1543
asoc/codecs/wsa881x-analog.c
一般檔案
1543
asoc/codecs/wsa881x-analog.c
一般檔案
檔案差異因為檔案過大而無法顯示
載入差異
43
asoc/codecs/wsa881x-analog.h
一般檔案
43
asoc/codecs/wsa881x-analog.h
一般檔案
@@ -0,0 +1,43 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2015, 2018-2019, The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _WSA881X_H
|
||||
#define _WSA881X_H
|
||||
|
||||
#include <linux/regmap.h>
|
||||
#include "wsa881x-registers-analog.h"
|
||||
#include <sound/soc.h>
|
||||
|
||||
#define WSA881X_I2C_SPK0_SLAVE0_ADDR 0x0E
|
||||
#define WSA881X_I2C_SPK0_SLAVE1_ADDR 0x44
|
||||
#define WSA881X_I2C_SPK1_SLAVE0_ADDR 0x0F
|
||||
#define WSA881X_I2C_SPK1_SLAVE1_ADDR 0x45
|
||||
|
||||
#define WSA881X_I2C_SPK0_SLAVE0 0
|
||||
#define WSA881X_I2C_SPK1_SLAVE0 1
|
||||
#define MAX_WSA881X_DEVICE 2
|
||||
#define WSA881X_DIGITAL_SLAVE 0
|
||||
#define WSA881X_ANALOG_SLAVE 1
|
||||
|
||||
enum {
|
||||
WSA881X_1_X = 0,
|
||||
WSA881X_2_0,
|
||||
};
|
||||
|
||||
#define WSA881X_IS_2_0(ver) \
|
||||
((ver == WSA881X_2_0) ? 1 : 0)
|
||||
|
||||
extern const u8 wsa881x_ana_reg_readable[WSA881X_CACHE_SIZE];
|
||||
extern struct reg_default wsa881x_ana_reg_defaults[WSA881X_CACHE_SIZE];
|
||||
extern struct regmap_config wsa881x_ana_regmap_config[2];
|
||||
int wsa881x_get_client_index(void);
|
||||
int wsa881x_get_probing_count(void);
|
||||
int wsa881x_get_presence_count(void);
|
||||
int wsa881x_set_mclk_callback(
|
||||
int (*enable_mclk_callback)(struct snd_soc_card *, bool));
|
||||
void wsa881x_update_reg_defaults_2_0(void);
|
||||
void wsa881x_update_regmap_2_0(struct regmap *regmap, int flag);
|
||||
|
||||
#endif /* _WSA881X_H */
|
||||
@@ -0,0 +1,199 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2015, 2018-2019, The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef WSA881X_REGISTERS_H
|
||||
#define WSA881X_REGISTERS_H
|
||||
|
||||
#define WSA881X_DIGITAL_BASE 0x0000
|
||||
#define WSA881X_ANALOG_BASE 0x0100
|
||||
|
||||
#define WSA881X_CHIP_ID0 (WSA881X_DIGITAL_BASE+0x0000)
|
||||
#define WSA881X_CHIP_ID1 (WSA881X_DIGITAL_BASE+0x0001)
|
||||
#define WSA881X_CHIP_ID2 (WSA881X_DIGITAL_BASE+0x0002)
|
||||
#define WSA881X_CHIP_ID3 (WSA881X_DIGITAL_BASE+0x0003)
|
||||
#define WSA881X_BUS_ID (WSA881X_DIGITAL_BASE+0x0004)
|
||||
#define WSA881X_CDC_RST_CTL (WSA881X_DIGITAL_BASE+0x0005)
|
||||
#define WSA881X_CDC_TOP_CLK_CTL (WSA881X_DIGITAL_BASE+0x0006)
|
||||
#define WSA881X_CDC_ANA_CLK_CTL (WSA881X_DIGITAL_BASE+0x0007)
|
||||
#define WSA881X_CDC_DIG_CLK_CTL (WSA881X_DIGITAL_BASE+0x0008)
|
||||
#define WSA881X_CLOCK_CONFIG (WSA881X_DIGITAL_BASE+0x0009)
|
||||
#define WSA881X_ANA_CTL (WSA881X_DIGITAL_BASE+0x000A)
|
||||
#define WSA881X_SWR_RESET_EN (WSA881X_DIGITAL_BASE+0x000B)
|
||||
#define WSA881X_RESET_CTL (WSA881X_DIGITAL_BASE+0x000C)
|
||||
#define WSA881X_TADC_VALUE_CTL (WSA881X_DIGITAL_BASE+0x000F)
|
||||
#define WSA881X_TEMP_DETECT_CTL (WSA881X_DIGITAL_BASE+0x0010)
|
||||
#define WSA881X_TEMP_MSB (WSA881X_DIGITAL_BASE+0x0011)
|
||||
#define WSA881X_TEMP_LSB (WSA881X_DIGITAL_BASE+0x0012)
|
||||
#define WSA881X_TEMP_CONFIG0 (WSA881X_DIGITAL_BASE+0x0013)
|
||||
#define WSA881X_TEMP_CONFIG1 (WSA881X_DIGITAL_BASE+0x0014)
|
||||
#define WSA881X_CDC_CLIP_CTL (WSA881X_DIGITAL_BASE+0x0015)
|
||||
#define WSA881X_SDM_PDM9_LSB (WSA881X_DIGITAL_BASE+0x0016)
|
||||
#define WSA881X_SDM_PDM9_MSB (WSA881X_DIGITAL_BASE+0x0017)
|
||||
#define WSA881X_CDC_RX_CTL (WSA881X_DIGITAL_BASE+0x0018)
|
||||
#define WSA881X_DEM_BYPASS_DATA0 (WSA881X_DIGITAL_BASE+0x0019)
|
||||
#define WSA881X_DEM_BYPASS_DATA1 (WSA881X_DIGITAL_BASE+0x001A)
|
||||
#define WSA881X_DEM_BYPASS_DATA2 (WSA881X_DIGITAL_BASE+0x001B)
|
||||
#define WSA881X_DEM_BYPASS_DATA3 (WSA881X_DIGITAL_BASE+0x001C)
|
||||
#define WSA881X_OTP_CTRL0 (WSA881X_DIGITAL_BASE+0x001D)
|
||||
#define WSA881X_OTP_CTRL1 (WSA881X_DIGITAL_BASE+0x001E)
|
||||
#define WSA881X_HDRIVE_CTL_GROUP1 (WSA881X_DIGITAL_BASE+0x001F)
|
||||
#define WSA881X_INTR_MODE (WSA881X_DIGITAL_BASE+0x0020)
|
||||
#define WSA881X_INTR_MASK (WSA881X_DIGITAL_BASE+0x0021)
|
||||
#define WSA881X_INTR_STATUS (WSA881X_DIGITAL_BASE+0x0022)
|
||||
#define WSA881X_INTR_CLEAR (WSA881X_DIGITAL_BASE+0x0023)
|
||||
#define WSA881X_INTR_LEVEL (WSA881X_DIGITAL_BASE+0x0024)
|
||||
#define WSA881X_INTR_SET (WSA881X_DIGITAL_BASE+0x0025)
|
||||
#define WSA881X_INTR_TEST (WSA881X_DIGITAL_BASE+0x0026)
|
||||
#define WSA881X_PDM_TEST_MODE (WSA881X_DIGITAL_BASE+0x0030)
|
||||
#define WSA881X_ATE_TEST_MODE (WSA881X_DIGITAL_BASE+0x0031)
|
||||
#define WSA881X_PIN_CTL_MODE (WSA881X_DIGITAL_BASE+0x0032)
|
||||
#define WSA881X_PIN_CTL_OE (WSA881X_DIGITAL_BASE+0x0033)
|
||||
#define WSA881X_PIN_WDATA_IOPAD (WSA881X_DIGITAL_BASE+0x0034)
|
||||
#define WSA881X_PIN_STATUS (WSA881X_DIGITAL_BASE+0x0035)
|
||||
#define WSA881X_DIG_DEBUG_MODE (WSA881X_DIGITAL_BASE+0x0037)
|
||||
#define WSA881X_DIG_DEBUG_SEL (WSA881X_DIGITAL_BASE+0x0038)
|
||||
#define WSA881X_DIG_DEBUG_EN (WSA881X_DIGITAL_BASE+0x0039)
|
||||
#define WSA881X_SWR_HM_TEST1 (WSA881X_DIGITAL_BASE+0x003B)
|
||||
#define WSA881X_SWR_HM_TEST2 (WSA881X_DIGITAL_BASE+0x003C)
|
||||
#define WSA881X_TEMP_DETECT_DBG_CTL (WSA881X_DIGITAL_BASE+0x003D)
|
||||
#define WSA881X_TEMP_DEBUG_MSB (WSA881X_DIGITAL_BASE+0x003E)
|
||||
#define WSA881X_TEMP_DEBUG_LSB (WSA881X_DIGITAL_BASE+0x003F)
|
||||
#define WSA881X_SAMPLE_EDGE_SEL (WSA881X_DIGITAL_BASE+0x0044)
|
||||
#define WSA881X_IOPAD_CTL (WSA881X_DIGITAL_BASE+0x0045)
|
||||
#define WSA881X_SPARE_0 (WSA881X_DIGITAL_BASE+0x0050)
|
||||
#define WSA881X_SPARE_1 (WSA881X_DIGITAL_BASE+0x0051)
|
||||
#define WSA881X_SPARE_2 (WSA881X_DIGITAL_BASE+0x0052)
|
||||
#define WSA881X_OTP_REG_0 (WSA881X_DIGITAL_BASE+0x0080)
|
||||
#define WSA881X_OTP_REG_1 (WSA881X_DIGITAL_BASE+0x0081)
|
||||
#define WSA881X_OTP_REG_2 (WSA881X_DIGITAL_BASE+0x0082)
|
||||
#define WSA881X_OTP_REG_3 (WSA881X_DIGITAL_BASE+0x0083)
|
||||
#define WSA881X_OTP_REG_4 (WSA881X_DIGITAL_BASE+0x0084)
|
||||
#define WSA881X_OTP_REG_5 (WSA881X_DIGITAL_BASE+0x0085)
|
||||
#define WSA881X_OTP_REG_6 (WSA881X_DIGITAL_BASE+0x0086)
|
||||
#define WSA881X_OTP_REG_7 (WSA881X_DIGITAL_BASE+0x0087)
|
||||
#define WSA881X_OTP_REG_8 (WSA881X_DIGITAL_BASE+0x0088)
|
||||
#define WSA881X_OTP_REG_9 (WSA881X_DIGITAL_BASE+0x0089)
|
||||
#define WSA881X_OTP_REG_10 (WSA881X_DIGITAL_BASE+0x008A)
|
||||
#define WSA881X_OTP_REG_11 (WSA881X_DIGITAL_BASE+0x008B)
|
||||
#define WSA881X_OTP_REG_12 (WSA881X_DIGITAL_BASE+0x008C)
|
||||
#define WSA881X_OTP_REG_13 (WSA881X_DIGITAL_BASE+0x008D)
|
||||
#define WSA881X_OTP_REG_14 (WSA881X_DIGITAL_BASE+0x008E)
|
||||
#define WSA881X_OTP_REG_15 (WSA881X_DIGITAL_BASE+0x008F)
|
||||
#define WSA881X_OTP_REG_16 (WSA881X_DIGITAL_BASE+0x0090)
|
||||
#define WSA881X_OTP_REG_17 (WSA881X_DIGITAL_BASE+0x0091)
|
||||
#define WSA881X_OTP_REG_18 (WSA881X_DIGITAL_BASE+0x0092)
|
||||
#define WSA881X_OTP_REG_19 (WSA881X_DIGITAL_BASE+0x0093)
|
||||
#define WSA881X_OTP_REG_20 (WSA881X_DIGITAL_BASE+0x0094)
|
||||
#define WSA881X_OTP_REG_21 (WSA881X_DIGITAL_BASE+0x0095)
|
||||
#define WSA881X_OTP_REG_22 (WSA881X_DIGITAL_BASE+0x0096)
|
||||
#define WSA881X_OTP_REG_23 (WSA881X_DIGITAL_BASE+0x0097)
|
||||
#define WSA881X_OTP_REG_24 (WSA881X_DIGITAL_BASE+0x0098)
|
||||
#define WSA881X_OTP_REG_25 (WSA881X_DIGITAL_BASE+0x0099)
|
||||
#define WSA881X_OTP_REG_26 (WSA881X_DIGITAL_BASE+0x009A)
|
||||
#define WSA881X_OTP_REG_27 (WSA881X_DIGITAL_BASE+0x009B)
|
||||
#define WSA881X_OTP_REG_28 (WSA881X_DIGITAL_BASE+0x009C)
|
||||
#define WSA881X_OTP_REG_29 (WSA881X_DIGITAL_BASE+0x009D)
|
||||
#define WSA881X_OTP_REG_30 (WSA881X_DIGITAL_BASE+0x009E)
|
||||
#define WSA881X_OTP_REG_31 (WSA881X_DIGITAL_BASE+0x009F)
|
||||
#define WSA881X_OTP_REG_32 (WSA881X_DIGITAL_BASE+0x00A0)
|
||||
#define WSA881X_OTP_REG_33 (WSA881X_DIGITAL_BASE+0x00A1)
|
||||
#define WSA881X_OTP_REG_34 (WSA881X_DIGITAL_BASE+0x00A2)
|
||||
#define WSA881X_OTP_REG_35 (WSA881X_DIGITAL_BASE+0x00A3)
|
||||
#define WSA881X_OTP_REG_36 (WSA881X_DIGITAL_BASE+0x00A4)
|
||||
#define WSA881X_OTP_REG_37 (WSA881X_DIGITAL_BASE+0x00A5)
|
||||
#define WSA881X_OTP_REG_38 (WSA881X_DIGITAL_BASE+0x00A6)
|
||||
#define WSA881X_OTP_REG_39 (WSA881X_DIGITAL_BASE+0x00A7)
|
||||
#define WSA881X_OTP_REG_40 (WSA881X_DIGITAL_BASE+0x00A8)
|
||||
#define WSA881X_OTP_REG_41 (WSA881X_DIGITAL_BASE+0x00A9)
|
||||
#define WSA881X_OTP_REG_42 (WSA881X_DIGITAL_BASE+0x00AA)
|
||||
#define WSA881X_OTP_REG_43 (WSA881X_DIGITAL_BASE+0x00AB)
|
||||
#define WSA881X_OTP_REG_44 (WSA881X_DIGITAL_BASE+0x00AC)
|
||||
#define WSA881X_OTP_REG_45 (WSA881X_DIGITAL_BASE+0x00AD)
|
||||
#define WSA881X_OTP_REG_46 (WSA881X_DIGITAL_BASE+0x00AE)
|
||||
#define WSA881X_OTP_REG_47 (WSA881X_DIGITAL_BASE+0x00AF)
|
||||
#define WSA881X_OTP_REG_48 (WSA881X_DIGITAL_BASE+0x00B0)
|
||||
#define WSA881X_OTP_REG_49 (WSA881X_DIGITAL_BASE+0x00B1)
|
||||
#define WSA881X_OTP_REG_50 (WSA881X_DIGITAL_BASE+0x00B2)
|
||||
#define WSA881X_OTP_REG_51 (WSA881X_DIGITAL_BASE+0x00B3)
|
||||
#define WSA881X_OTP_REG_52 (WSA881X_DIGITAL_BASE+0x00B4)
|
||||
#define WSA881X_OTP_REG_53 (WSA881X_DIGITAL_BASE+0x00B5)
|
||||
#define WSA881X_OTP_REG_54 (WSA881X_DIGITAL_BASE+0x00B6)
|
||||
#define WSA881X_OTP_REG_55 (WSA881X_DIGITAL_BASE+0x00B7)
|
||||
#define WSA881X_OTP_REG_56 (WSA881X_DIGITAL_BASE+0x00B8)
|
||||
#define WSA881X_OTP_REG_57 (WSA881X_DIGITAL_BASE+0x00B9)
|
||||
#define WSA881X_OTP_REG_58 (WSA881X_DIGITAL_BASE+0x00BA)
|
||||
#define WSA881X_OTP_REG_59 (WSA881X_DIGITAL_BASE+0x00BB)
|
||||
#define WSA881X_OTP_REG_60 (WSA881X_DIGITAL_BASE+0x00BC)
|
||||
#define WSA881X_OTP_REG_61 (WSA881X_DIGITAL_BASE+0x00BD)
|
||||
#define WSA881X_OTP_REG_62 (WSA881X_DIGITAL_BASE+0x00BE)
|
||||
#define WSA881X_OTP_REG_63 (WSA881X_DIGITAL_BASE+0x00BF)
|
||||
/* Analog Register address space */
|
||||
#define WSA881X_BIAS_REF_CTRL (WSA881X_ANALOG_BASE+0x0000)
|
||||
#define WSA881X_BIAS_TEST (WSA881X_ANALOG_BASE+0x0001)
|
||||
#define WSA881X_BIAS_BIAS (WSA881X_ANALOG_BASE+0x0002)
|
||||
#define WSA881X_TEMP_OP (WSA881X_ANALOG_BASE+0x0003)
|
||||
#define WSA881X_TEMP_IREF_CTRL (WSA881X_ANALOG_BASE+0x0004)
|
||||
#define WSA881X_TEMP_ISENS_CTRL (WSA881X_ANALOG_BASE+0x0005)
|
||||
#define WSA881X_TEMP_CLK_CTRL (WSA881X_ANALOG_BASE+0x0006)
|
||||
#define WSA881X_TEMP_TEST (WSA881X_ANALOG_BASE+0x0007)
|
||||
#define WSA881X_TEMP_BIAS (WSA881X_ANALOG_BASE+0x0008)
|
||||
#define WSA881X_TEMP_ADC_CTRL (WSA881X_ANALOG_BASE+0x0009)
|
||||
#define WSA881X_TEMP_DOUT_MSB (WSA881X_ANALOG_BASE+0x000A)
|
||||
#define WSA881X_TEMP_DOUT_LSB (WSA881X_ANALOG_BASE+0x000B)
|
||||
#define WSA881X_ADC_EN_MODU_V (WSA881X_ANALOG_BASE+0x0010)
|
||||
#define WSA881X_ADC_EN_MODU_I (WSA881X_ANALOG_BASE+0x0011)
|
||||
#define WSA881X_ADC_EN_DET_TEST_V (WSA881X_ANALOG_BASE+0x0012)
|
||||
#define WSA881X_ADC_EN_DET_TEST_I (WSA881X_ANALOG_BASE+0x0013)
|
||||
#define WSA881X_ADC_SEL_IBIAS (WSA881X_ANALOG_BASE+0x0014)
|
||||
#define WSA881X_ADC_EN_SEL_IBIAS (WSA881X_ANALOG_BASE+0x0015)
|
||||
#define WSA881X_SPKR_DRV_EN (WSA881X_ANALOG_BASE+0x001A)
|
||||
#define WSA881X_SPKR_DRV_GAIN (WSA881X_ANALOG_BASE+0x001B)
|
||||
#define WSA881X_SPKR_DAC_CTL (WSA881X_ANALOG_BASE+0x001C)
|
||||
#define WSA881X_SPKR_DRV_DBG (WSA881X_ANALOG_BASE+0x001D)
|
||||
#define WSA881X_SPKR_PWRSTG_DBG (WSA881X_ANALOG_BASE+0x001E)
|
||||
#define WSA881X_SPKR_OCP_CTL (WSA881X_ANALOG_BASE+0x001F)
|
||||
#define WSA881X_SPKR_CLIP_CTL (WSA881X_ANALOG_BASE+0x0020)
|
||||
#define WSA881X_SPKR_BBM_CTL (WSA881X_ANALOG_BASE+0x0021)
|
||||
#define WSA881X_SPKR_MISC_CTL1 (WSA881X_ANALOG_BASE+0x0022)
|
||||
#define WSA881X_SPKR_MISC_CTL2 (WSA881X_ANALOG_BASE+0x0023)
|
||||
#define WSA881X_SPKR_BIAS_INT (WSA881X_ANALOG_BASE+0x0024)
|
||||
#define WSA881X_SPKR_PA_INT (WSA881X_ANALOG_BASE+0x0025)
|
||||
#define WSA881X_SPKR_BIAS_CAL (WSA881X_ANALOG_BASE+0x0026)
|
||||
#define WSA881X_SPKR_BIAS_PSRR (WSA881X_ANALOG_BASE+0x0027)
|
||||
#define WSA881X_SPKR_STATUS1 (WSA881X_ANALOG_BASE+0x0028)
|
||||
#define WSA881X_SPKR_STATUS2 (WSA881X_ANALOG_BASE+0x0029)
|
||||
#define WSA881X_BOOST_EN_CTL (WSA881X_ANALOG_BASE+0x002A)
|
||||
#define WSA881X_BOOST_CURRENT_LIMIT (WSA881X_ANALOG_BASE+0x002B)
|
||||
#define WSA881X_BOOST_PS_CTL (WSA881X_ANALOG_BASE+0x002C)
|
||||
#define WSA881X_BOOST_PRESET_OUT1 (WSA881X_ANALOG_BASE+0x002D)
|
||||
#define WSA881X_BOOST_PRESET_OUT2 (WSA881X_ANALOG_BASE+0x002E)
|
||||
#define WSA881X_BOOST_FORCE_OUT (WSA881X_ANALOG_BASE+0x002F)
|
||||
#define WSA881X_BOOST_LDO_PROG (WSA881X_ANALOG_BASE+0x0030)
|
||||
#define WSA881X_BOOST_SLOPE_COMP_ISENSE_FB (WSA881X_ANALOG_BASE+0x0031)
|
||||
#define WSA881X_BOOST_RON_CTL (WSA881X_ANALOG_BASE+0x0032)
|
||||
#define WSA881X_BOOST_LOOP_STABILITY (WSA881X_ANALOG_BASE+0x0033)
|
||||
#define WSA881X_BOOST_ZX_CTL (WSA881X_ANALOG_BASE+0x0034)
|
||||
#define WSA881X_BOOST_START_CTL (WSA881X_ANALOG_BASE+0x0035)
|
||||
#define WSA881X_BOOST_MISC1_CTL (WSA881X_ANALOG_BASE+0x0036)
|
||||
#define WSA881X_BOOST_MISC2_CTL (WSA881X_ANALOG_BASE+0x0037)
|
||||
#define WSA881X_BOOST_MISC3_CTL (WSA881X_ANALOG_BASE+0x0038)
|
||||
#define WSA881X_BOOST_ATEST_CTL (WSA881X_ANALOG_BASE+0x0039)
|
||||
#define WSA881X_SPKR_PROT_FE_GAIN (WSA881X_ANALOG_BASE+0x003A)
|
||||
#define WSA881X_SPKR_PROT_FE_CM_LDO_SET (WSA881X_ANALOG_BASE+0x003B)
|
||||
#define WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1 (WSA881X_ANALOG_BASE+0x003C)
|
||||
#define WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2 (WSA881X_ANALOG_BASE+0x003D)
|
||||
#define WSA881X_SPKR_PROT_ATEST1 (WSA881X_ANALOG_BASE+0x003E)
|
||||
#define WSA881X_SPKR_PROT_ATEST2 (WSA881X_ANALOG_BASE+0x003F)
|
||||
#define WSA881X_SPKR_PROT_FE_VSENSE_VCM (WSA881X_ANALOG_BASE+0x0040)
|
||||
#define WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1 (WSA881X_ANALOG_BASE+0x0041)
|
||||
#define WSA881X_BONGO_RESRV_REG1 (WSA881X_ANALOG_BASE+0x0042)
|
||||
#define WSA881X_BONGO_RESRV_REG2 (WSA881X_ANALOG_BASE+0x0043)
|
||||
#define WSA881X_SPKR_PROT_SAR (WSA881X_ANALOG_BASE+0x0044)
|
||||
#define WSA881X_SPKR_STATUS3 (WSA881X_ANALOG_BASE+0x0045)
|
||||
|
||||
#define WSA881X_NUM_REGISTERS (WSA881X_SPKR_STATUS3+1)
|
||||
#define WSA881X_MAX_REGISTER (WSA881X_NUM_REGISTERS-1)
|
||||
#define WSA881X_CACHE_SIZE WSA881X_NUM_REGISTERS
|
||||
#endif /* WSA881X_REGISTERS_H */
|
||||
491
asoc/codecs/wsa881x-regmap-analog.c
一般檔案
491
asoc/codecs/wsa881x-regmap-analog.c
一般檔案
@@ -0,0 +1,491 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2015, 2018-2019, The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/device.h>
|
||||
#include "wsa881x-registers-analog.h"
|
||||
#include "wsa881x-analog.h"
|
||||
|
||||
struct reg_default wsa881x_ana_reg_defaults[] = {
|
||||
{WSA881X_CHIP_ID0, 0x00},
|
||||
{WSA881X_CHIP_ID1, 0x00},
|
||||
{WSA881X_CHIP_ID2, 0x00},
|
||||
{WSA881X_CHIP_ID3, 0x02},
|
||||
{WSA881X_BUS_ID, 0x00},
|
||||
{WSA881X_CDC_RST_CTL, 0x00},
|
||||
{WSA881X_CDC_TOP_CLK_CTL, 0x03},
|
||||
{WSA881X_CDC_ANA_CLK_CTL, 0x00},
|
||||
{WSA881X_CDC_DIG_CLK_CTL, 0x00},
|
||||
{WSA881X_CLOCK_CONFIG, 0x00},
|
||||
{WSA881X_ANA_CTL, 0x08},
|
||||
{WSA881X_SWR_RESET_EN, 0x00},
|
||||
{WSA881X_TEMP_DETECT_CTL, 0x01},
|
||||
{WSA881X_TEMP_MSB, 0x00},
|
||||
{WSA881X_TEMP_LSB, 0x00},
|
||||
{WSA881X_TEMP_CONFIG0, 0x00},
|
||||
{WSA881X_TEMP_CONFIG1, 0x00},
|
||||
{WSA881X_CDC_CLIP_CTL, 0x03},
|
||||
{WSA881X_SDM_PDM9_LSB, 0x00},
|
||||
{WSA881X_SDM_PDM9_MSB, 0x00},
|
||||
{WSA881X_CDC_RX_CTL, 0x7E},
|
||||
{WSA881X_DEM_BYPASS_DATA0, 0x00},
|
||||
{WSA881X_DEM_BYPASS_DATA1, 0x00},
|
||||
{WSA881X_DEM_BYPASS_DATA2, 0x00},
|
||||
{WSA881X_DEM_BYPASS_DATA3, 0x00},
|
||||
{WSA881X_OTP_CTRL0, 0x00},
|
||||
{WSA881X_OTP_CTRL1, 0x00},
|
||||
{WSA881X_HDRIVE_CTL_GROUP1, 0x00},
|
||||
{WSA881X_INTR_MODE, 0x00},
|
||||
{WSA881X_INTR_MASK, 0x1F},
|
||||
{WSA881X_INTR_STATUS, 0x00},
|
||||
{WSA881X_INTR_CLEAR, 0x00},
|
||||
{WSA881X_INTR_LEVEL, 0x00},
|
||||
{WSA881X_INTR_SET, 0x00},
|
||||
{WSA881X_INTR_TEST, 0x00},
|
||||
{WSA881X_PDM_TEST_MODE, 0x00},
|
||||
{WSA881X_ATE_TEST_MODE, 0x00},
|
||||
{WSA881X_PIN_CTL_MODE, 0x00},
|
||||
{WSA881X_PIN_CTL_OE, 0x00},
|
||||
{WSA881X_PIN_WDATA_IOPAD, 0x00},
|
||||
{WSA881X_PIN_STATUS, 0x00},
|
||||
{WSA881X_DIG_DEBUG_MODE, 0x00},
|
||||
{WSA881X_DIG_DEBUG_SEL, 0x00},
|
||||
{WSA881X_DIG_DEBUG_EN, 0x00},
|
||||
{WSA881X_SWR_HM_TEST1, 0x08},
|
||||
{WSA881X_SWR_HM_TEST2, 0x00},
|
||||
{WSA881X_TEMP_DETECT_DBG_CTL, 0x00},
|
||||
{WSA881X_TEMP_DEBUG_MSB, 0x00},
|
||||
{WSA881X_TEMP_DEBUG_LSB, 0x00},
|
||||
{WSA881X_SAMPLE_EDGE_SEL, 0x0C},
|
||||
{WSA881X_SPARE_0, 0x00},
|
||||
{WSA881X_SPARE_1, 0x00},
|
||||
{WSA881X_SPARE_2, 0x00},
|
||||
{WSA881X_OTP_REG_0, 0x01},
|
||||
{WSA881X_OTP_REG_1, 0xFF},
|
||||
{WSA881X_OTP_REG_2, 0xC0},
|
||||
{WSA881X_OTP_REG_3, 0xFF},
|
||||
{WSA881X_OTP_REG_4, 0xC0},
|
||||
{WSA881X_OTP_REG_5, 0xFF},
|
||||
{WSA881X_OTP_REG_6, 0xFF},
|
||||
{WSA881X_OTP_REG_7, 0xFF},
|
||||
{WSA881X_OTP_REG_8, 0xFF},
|
||||
{WSA881X_OTP_REG_9, 0xFF},
|
||||
{WSA881X_OTP_REG_10, 0xFF},
|
||||
{WSA881X_OTP_REG_11, 0xFF},
|
||||
{WSA881X_OTP_REG_12, 0xFF},
|
||||
{WSA881X_OTP_REG_13, 0xFF},
|
||||
{WSA881X_OTP_REG_14, 0xFF},
|
||||
{WSA881X_OTP_REG_15, 0xFF},
|
||||
{WSA881X_OTP_REG_16, 0xFF},
|
||||
{WSA881X_OTP_REG_17, 0xFF},
|
||||
{WSA881X_OTP_REG_18, 0xFF},
|
||||
{WSA881X_OTP_REG_19, 0xFF},
|
||||
{WSA881X_OTP_REG_20, 0xFF},
|
||||
{WSA881X_OTP_REG_21, 0xFF},
|
||||
{WSA881X_OTP_REG_22, 0xFF},
|
||||
{WSA881X_OTP_REG_23, 0xFF},
|
||||
{WSA881X_OTP_REG_24, 0x03},
|
||||
{WSA881X_OTP_REG_25, 0x01},
|
||||
{WSA881X_OTP_REG_26, 0x03},
|
||||
{WSA881X_OTP_REG_27, 0x11},
|
||||
{WSA881X_OTP_REG_28, 0xFF},
|
||||
{WSA881X_OTP_REG_29, 0xFF},
|
||||
{WSA881X_OTP_REG_30, 0xFF},
|
||||
{WSA881X_OTP_REG_31, 0xFF},
|
||||
{WSA881X_OTP_REG_63, 0x40},
|
||||
/* WSA881x Analog registers */
|
||||
{WSA881X_BIAS_REF_CTRL, 0x6C},
|
||||
{WSA881X_BIAS_TEST, 0x16},
|
||||
{WSA881X_BIAS_BIAS, 0xF0},
|
||||
{WSA881X_TEMP_OP, 0x00},
|
||||
{WSA881X_TEMP_IREF_CTRL, 0x56},
|
||||
{WSA881X_TEMP_ISENS_CTRL, 0x47},
|
||||
{WSA881X_TEMP_CLK_CTRL, 0x87},
|
||||
{WSA881X_TEMP_TEST, 0x00},
|
||||
{WSA881X_TEMP_BIAS, 0x51},
|
||||
{WSA881X_TEMP_ADC_CTRL, 0x00},
|
||||
{WSA881X_TEMP_DOUT_MSB, 0x00},
|
||||
{WSA881X_TEMP_DOUT_LSB, 0x00},
|
||||
{WSA881X_ADC_EN_MODU_V, 0x00},
|
||||
{WSA881X_ADC_EN_MODU_I, 0x00},
|
||||
{WSA881X_ADC_EN_DET_TEST_V, 0x00},
|
||||
{WSA881X_ADC_EN_DET_TEST_I, 0x00},
|
||||
{WSA881X_ADC_SEL_IBIAS, 0x25},
|
||||
{WSA881X_ADC_EN_SEL_IBIAS, 0x10},
|
||||
{WSA881X_SPKR_DRV_EN, 0x74},
|
||||
{WSA881X_SPKR_DRV_GAIN, 0x01},
|
||||
{WSA881X_SPKR_DAC_CTL, 0x40},
|
||||
{WSA881X_SPKR_DRV_DBG, 0x15},
|
||||
{WSA881X_SPKR_PWRSTG_DBG, 0x00},
|
||||
{WSA881X_SPKR_OCP_CTL, 0xD4},
|
||||
{WSA881X_SPKR_CLIP_CTL, 0x90},
|
||||
{WSA881X_SPKR_BBM_CTL, 0x00},
|
||||
{WSA881X_SPKR_MISC_CTL1, 0x80},
|
||||
{WSA881X_SPKR_MISC_CTL2, 0x00},
|
||||
{WSA881X_SPKR_BIAS_INT, 0x56},
|
||||
{WSA881X_SPKR_PA_INT, 0x54},
|
||||
{WSA881X_SPKR_BIAS_CAL, 0xAC},
|
||||
{WSA881X_SPKR_BIAS_PSRR, 0x54},
|
||||
{WSA881X_SPKR_STATUS1, 0x00},
|
||||
{WSA881X_SPKR_STATUS2, 0x00},
|
||||
{WSA881X_BOOST_EN_CTL, 0x18},
|
||||
{WSA881X_BOOST_CURRENT_LIMIT, 0x7A},
|
||||
{WSA881X_BOOST_PS_CTL, 0xC0},
|
||||
{WSA881X_BOOST_PRESET_OUT1, 0x77},
|
||||
{WSA881X_BOOST_PRESET_OUT2, 0x70},
|
||||
{WSA881X_BOOST_FORCE_OUT, 0x0E},
|
||||
{WSA881X_BOOST_LDO_PROG, 0x16},
|
||||
{WSA881X_BOOST_SLOPE_COMP_ISENSE_FB, 0x71},
|
||||
{WSA881X_BOOST_RON_CTL, 0x0F},
|
||||
{WSA881X_BOOST_LOOP_STABILITY, 0xAD},
|
||||
{WSA881X_BOOST_ZX_CTL, 0x34},
|
||||
{WSA881X_BOOST_START_CTL, 0x23},
|
||||
{WSA881X_BOOST_MISC1_CTL, 0x80},
|
||||
{WSA881X_BOOST_MISC2_CTL, 0x00},
|
||||
{WSA881X_BOOST_MISC3_CTL, 0x00},
|
||||
{WSA881X_BOOST_ATEST_CTL, 0x00},
|
||||
{WSA881X_SPKR_PROT_FE_GAIN, 0x46},
|
||||
{WSA881X_SPKR_PROT_FE_CM_LDO_SET, 0x3B},
|
||||
{WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1, 0x8D},
|
||||
{WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2, 0x8D},
|
||||
{WSA881X_SPKR_PROT_ATEST1, 0x01},
|
||||
{WSA881X_SPKR_PROT_ATEST2, 0x00},
|
||||
{WSA881X_SPKR_PROT_FE_VSENSE_VCM, 0x8D},
|
||||
{WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1, 0x4D},
|
||||
{WSA881X_BONGO_RESRV_REG1, 0x00},
|
||||
{WSA881X_BONGO_RESRV_REG2, 0x00},
|
||||
{WSA881X_SPKR_PROT_SAR, 0x00},
|
||||
{WSA881X_SPKR_STATUS3, 0x00},
|
||||
};
|
||||
|
||||
struct reg_default wsa881x_ana_reg_defaults_0[] = {
|
||||
{WSA881X_CHIP_ID0, 0x00},
|
||||
{WSA881X_CHIP_ID1, 0x00},
|
||||
{WSA881X_CHIP_ID2, 0x00},
|
||||
{WSA881X_CHIP_ID3, 0x02},
|
||||
{WSA881X_BUS_ID, 0x00},
|
||||
{WSA881X_CDC_RST_CTL, 0x00},
|
||||
{WSA881X_CDC_TOP_CLK_CTL, 0x03},
|
||||
{WSA881X_CDC_ANA_CLK_CTL, 0x00},
|
||||
{WSA881X_CDC_DIG_CLK_CTL, 0x00},
|
||||
{WSA881X_CLOCK_CONFIG, 0x00},
|
||||
{WSA881X_ANA_CTL, 0x08},
|
||||
{WSA881X_SWR_RESET_EN, 0x00},
|
||||
{WSA881X_TEMP_DETECT_CTL, 0x01},
|
||||
{WSA881X_TEMP_MSB, 0x00},
|
||||
{WSA881X_TEMP_LSB, 0x00},
|
||||
{WSA881X_TEMP_CONFIG0, 0x00},
|
||||
{WSA881X_TEMP_CONFIG1, 0x00},
|
||||
{WSA881X_CDC_CLIP_CTL, 0x03},
|
||||
{WSA881X_SDM_PDM9_LSB, 0x00},
|
||||
{WSA881X_SDM_PDM9_MSB, 0x00},
|
||||
{WSA881X_CDC_RX_CTL, 0x7E},
|
||||
{WSA881X_DEM_BYPASS_DATA0, 0x00},
|
||||
{WSA881X_DEM_BYPASS_DATA1, 0x00},
|
||||
{WSA881X_DEM_BYPASS_DATA2, 0x00},
|
||||
{WSA881X_DEM_BYPASS_DATA3, 0x00},
|
||||
{WSA881X_OTP_CTRL0, 0x00},
|
||||
{WSA881X_OTP_CTRL1, 0x00},
|
||||
{WSA881X_HDRIVE_CTL_GROUP1, 0x00},
|
||||
{WSA881X_INTR_MODE, 0x00},
|
||||
{WSA881X_INTR_MASK, 0x1F},
|
||||
{WSA881X_INTR_STATUS, 0x00},
|
||||
{WSA881X_INTR_CLEAR, 0x00},
|
||||
{WSA881X_INTR_LEVEL, 0x00},
|
||||
{WSA881X_INTR_SET, 0x00},
|
||||
{WSA881X_INTR_TEST, 0x00},
|
||||
{WSA881X_PDM_TEST_MODE, 0x00},
|
||||
{WSA881X_ATE_TEST_MODE, 0x00},
|
||||
{WSA881X_PIN_CTL_MODE, 0x00},
|
||||
{WSA881X_PIN_CTL_OE, 0x00},
|
||||
{WSA881X_PIN_WDATA_IOPAD, 0x00},
|
||||
{WSA881X_PIN_STATUS, 0x00},
|
||||
{WSA881X_DIG_DEBUG_MODE, 0x00},
|
||||
{WSA881X_DIG_DEBUG_SEL, 0x00},
|
||||
{WSA881X_DIG_DEBUG_EN, 0x00},
|
||||
{WSA881X_SWR_HM_TEST1, 0x08},
|
||||
{WSA881X_SWR_HM_TEST2, 0x00},
|
||||
{WSA881X_TEMP_DETECT_DBG_CTL, 0x00},
|
||||
{WSA881X_TEMP_DEBUG_MSB, 0x00},
|
||||
{WSA881X_TEMP_DEBUG_LSB, 0x00},
|
||||
{WSA881X_SAMPLE_EDGE_SEL, 0x0C},
|
||||
{WSA881X_SPARE_0, 0x00},
|
||||
{WSA881X_SPARE_1, 0x00},
|
||||
{WSA881X_SPARE_2, 0x00},
|
||||
{WSA881X_OTP_REG_0, 0x01},
|
||||
{WSA881X_OTP_REG_1, 0xFF},
|
||||
{WSA881X_OTP_REG_2, 0xC0},
|
||||
{WSA881X_OTP_REG_3, 0xFF},
|
||||
{WSA881X_OTP_REG_4, 0xC0},
|
||||
{WSA881X_OTP_REG_5, 0xFF},
|
||||
{WSA881X_OTP_REG_6, 0xFF},
|
||||
{WSA881X_OTP_REG_7, 0xFF},
|
||||
{WSA881X_OTP_REG_8, 0xFF},
|
||||
{WSA881X_OTP_REG_9, 0xFF},
|
||||
{WSA881X_OTP_REG_10, 0xFF},
|
||||
{WSA881X_OTP_REG_11, 0xFF},
|
||||
{WSA881X_OTP_REG_12, 0xFF},
|
||||
{WSA881X_OTP_REG_13, 0xFF},
|
||||
{WSA881X_OTP_REG_14, 0xFF},
|
||||
{WSA881X_OTP_REG_15, 0xFF},
|
||||
{WSA881X_OTP_REG_16, 0xFF},
|
||||
{WSA881X_OTP_REG_17, 0xFF},
|
||||
{WSA881X_OTP_REG_18, 0xFF},
|
||||
{WSA881X_OTP_REG_19, 0xFF},
|
||||
{WSA881X_OTP_REG_20, 0xFF},
|
||||
{WSA881X_OTP_REG_21, 0xFF},
|
||||
{WSA881X_OTP_REG_22, 0xFF},
|
||||
{WSA881X_OTP_REG_23, 0xFF},
|
||||
{WSA881X_OTP_REG_24, 0x03},
|
||||
{WSA881X_OTP_REG_25, 0x01},
|
||||
{WSA881X_OTP_REG_26, 0x03},
|
||||
{WSA881X_OTP_REG_27, 0x11},
|
||||
{WSA881X_OTP_REG_28, 0xFF},
|
||||
{WSA881X_OTP_REG_29, 0xFF},
|
||||
{WSA881X_OTP_REG_30, 0xFF},
|
||||
{WSA881X_OTP_REG_31, 0xFF},
|
||||
{WSA881X_OTP_REG_63, 0x40},
|
||||
};
|
||||
|
||||
struct reg_default wsa881x_ana_reg_defaults_1[] = {
|
||||
{WSA881X_BIAS_REF_CTRL - WSA881X_ANALOG_BASE, 0x6C},
|
||||
{WSA881X_BIAS_TEST - WSA881X_ANALOG_BASE, 0x16},
|
||||
{WSA881X_BIAS_BIAS - WSA881X_ANALOG_BASE, 0xF0},
|
||||
{WSA881X_TEMP_OP - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_TEMP_IREF_CTRL - WSA881X_ANALOG_BASE, 0x56},
|
||||
{WSA881X_TEMP_ISENS_CTRL - WSA881X_ANALOG_BASE, 0x47},
|
||||
{WSA881X_TEMP_CLK_CTRL - WSA881X_ANALOG_BASE, 0x87},
|
||||
{WSA881X_TEMP_TEST - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_TEMP_BIAS - WSA881X_ANALOG_BASE, 0x51},
|
||||
{WSA881X_TEMP_ADC_CTRL - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_TEMP_DOUT_MSB - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_TEMP_DOUT_LSB - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_ADC_EN_MODU_V - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_ADC_EN_MODU_I - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_ADC_EN_DET_TEST_V - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_ADC_EN_DET_TEST_I - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_ADC_SEL_IBIAS - WSA881X_ANALOG_BASE, 0x25},
|
||||
{WSA881X_ADC_EN_SEL_IBIAS - WSA881X_ANALOG_BASE, 0x10},
|
||||
{WSA881X_SPKR_DRV_EN - WSA881X_ANALOG_BASE, 0x74},
|
||||
{WSA881X_SPKR_DRV_GAIN - WSA881X_ANALOG_BASE, 0x01},
|
||||
{WSA881X_SPKR_DAC_CTL - WSA881X_ANALOG_BASE, 0x40},
|
||||
{WSA881X_SPKR_DRV_DBG - WSA881X_ANALOG_BASE, 0x15},
|
||||
{WSA881X_SPKR_PWRSTG_DBG - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_SPKR_OCP_CTL - WSA881X_ANALOG_BASE, 0xD4},
|
||||
{WSA881X_SPKR_CLIP_CTL - WSA881X_ANALOG_BASE, 0x90},
|
||||
{WSA881X_SPKR_BBM_CTL - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_SPKR_MISC_CTL1 - WSA881X_ANALOG_BASE, 0x80},
|
||||
{WSA881X_SPKR_MISC_CTL2 - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_SPKR_BIAS_INT - WSA881X_ANALOG_BASE, 0x56},
|
||||
{WSA881X_SPKR_PA_INT - WSA881X_ANALOG_BASE, 0x54},
|
||||
{WSA881X_SPKR_BIAS_CAL - WSA881X_ANALOG_BASE, 0xAC},
|
||||
{WSA881X_SPKR_BIAS_PSRR - WSA881X_ANALOG_BASE, 0x54},
|
||||
{WSA881X_SPKR_STATUS1 - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_SPKR_STATUS2 - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_BOOST_EN_CTL - WSA881X_ANALOG_BASE, 0x18},
|
||||
{WSA881X_BOOST_CURRENT_LIMIT - WSA881X_ANALOG_BASE, 0x7A},
|
||||
{WSA881X_BOOST_PS_CTL - WSA881X_ANALOG_BASE, 0xC0},
|
||||
{WSA881X_BOOST_PRESET_OUT1 - WSA881X_ANALOG_BASE, 0x77},
|
||||
{WSA881X_BOOST_PRESET_OUT2 - WSA881X_ANALOG_BASE, 0x70},
|
||||
{WSA881X_BOOST_FORCE_OUT - WSA881X_ANALOG_BASE, 0x0E},
|
||||
{WSA881X_BOOST_LDO_PROG - WSA881X_ANALOG_BASE, 0x16},
|
||||
{WSA881X_BOOST_SLOPE_COMP_ISENSE_FB - WSA881X_ANALOG_BASE, 0x71},
|
||||
{WSA881X_BOOST_RON_CTL - WSA881X_ANALOG_BASE, 0x0F},
|
||||
{WSA881X_BOOST_LOOP_STABILITY - WSA881X_ANALOG_BASE, 0xAD},
|
||||
{WSA881X_BOOST_ZX_CTL - WSA881X_ANALOG_BASE, 0x34},
|
||||
{WSA881X_BOOST_START_CTL - WSA881X_ANALOG_BASE, 0x23},
|
||||
{WSA881X_BOOST_MISC1_CTL - WSA881X_ANALOG_BASE, 0x80},
|
||||
{WSA881X_BOOST_MISC2_CTL - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_BOOST_MISC3_CTL - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_BOOST_ATEST_CTL - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_SPKR_PROT_FE_GAIN - WSA881X_ANALOG_BASE, 0x46},
|
||||
{WSA881X_SPKR_PROT_FE_CM_LDO_SET - WSA881X_ANALOG_BASE, 0x3B},
|
||||
{WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1 - WSA881X_ANALOG_BASE, 0x8D},
|
||||
{WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2 - WSA881X_ANALOG_BASE, 0x8D},
|
||||
{WSA881X_SPKR_PROT_ATEST1 - WSA881X_ANALOG_BASE, 0x01},
|
||||
{WSA881X_SPKR_PROT_ATEST2 - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_SPKR_PROT_FE_VSENSE_VCM - WSA881X_ANALOG_BASE, 0x8D},
|
||||
{WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1 - WSA881X_ANALOG_BASE, 0x4D},
|
||||
{WSA881X_BONGO_RESRV_REG1 - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_BONGO_RESRV_REG2 - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_SPKR_PROT_SAR - WSA881X_ANALOG_BASE, 0x00},
|
||||
{WSA881X_SPKR_STATUS3 - WSA881X_ANALOG_BASE, 0x00},
|
||||
};
|
||||
|
||||
static const struct reg_sequence wsa881x_rev_2_0_dig[] = {
|
||||
{WSA881X_RESET_CTL, 0x00},
|
||||
{WSA881X_TADC_VALUE_CTL, 0x01},
|
||||
{WSA881X_INTR_MASK, 0x1B},
|
||||
{WSA881X_IOPAD_CTL, 0x00},
|
||||
{WSA881X_OTP_REG_28, 0x3F},
|
||||
{WSA881X_OTP_REG_29, 0x3F},
|
||||
{WSA881X_OTP_REG_30, 0x01},
|
||||
{WSA881X_OTP_REG_31, 0x01},
|
||||
};
|
||||
|
||||
static const struct reg_sequence wsa881x_rev_2_0_ana[] = {
|
||||
{WSA881X_TEMP_ADC_CTRL, 0x03},
|
||||
{WSA881X_ADC_SEL_IBIAS, 0x45},
|
||||
{WSA881X_SPKR_DRV_GAIN, 0xC1},
|
||||
{WSA881X_SPKR_DAC_CTL, 0x42},
|
||||
{WSA881X_SPKR_BBM_CTL, 0x02},
|
||||
{WSA881X_SPKR_MISC_CTL1, 0x40},
|
||||
{WSA881X_SPKR_MISC_CTL2, 0x07},
|
||||
{WSA881X_SPKR_BIAS_INT, 0x5F},
|
||||
{WSA881X_SPKR_BIAS_PSRR, 0x44},
|
||||
{WSA881X_BOOST_PS_CTL, 0xA0},
|
||||
{WSA881X_BOOST_PRESET_OUT1, 0xB7},
|
||||
{WSA881X_BOOST_LOOP_STABILITY, 0x8D},
|
||||
{WSA881X_SPKR_PROT_ATEST2, 0x02},
|
||||
{WSA881X_BONGO_RESRV_REG1, 0x5E},
|
||||
{WSA881X_BONGO_RESRV_REG2, 0x07},
|
||||
};
|
||||
|
||||
struct reg_default wsa881x_rev_2_0_regmap_ana[] = {
|
||||
{WSA881X_TEMP_ADC_CTRL - WSA881X_ANALOG_BASE, 0x03},
|
||||
{WSA881X_ADC_SEL_IBIAS - WSA881X_ANALOG_BASE, 0x45},
|
||||
{WSA881X_SPKR_DRV_GAIN - WSA881X_ANALOG_BASE, 0xC1},
|
||||
{WSA881X_SPKR_DAC_CTL - WSA881X_ANALOG_BASE, 0x42},
|
||||
{WSA881X_SPKR_BBM_CTL - WSA881X_ANALOG_BASE, 0x02},
|
||||
{WSA881X_SPKR_MISC_CTL1 - WSA881X_ANALOG_BASE, 0x40},
|
||||
{WSA881X_SPKR_MISC_CTL2 - WSA881X_ANALOG_BASE, 0x07},
|
||||
{WSA881X_SPKR_BIAS_INT - WSA881X_ANALOG_BASE, 0x5F},
|
||||
{WSA881X_SPKR_BIAS_PSRR - WSA881X_ANALOG_BASE, 0x44},
|
||||
{WSA881X_BOOST_PS_CTL - WSA881X_ANALOG_BASE, 0xA0},
|
||||
{WSA881X_BOOST_PRESET_OUT1 - WSA881X_ANALOG_BASE, 0xB7},
|
||||
{WSA881X_BOOST_LOOP_STABILITY - WSA881X_ANALOG_BASE, 0x8D},
|
||||
{WSA881X_SPKR_PROT_ATEST2 - WSA881X_ANALOG_BASE, 0x02},
|
||||
{WSA881X_BONGO_RESRV_REG1 - WSA881X_ANALOG_BASE, 0x5E},
|
||||
{WSA881X_BONGO_RESRV_REG2 - WSA881X_ANALOG_BASE, 0x07},
|
||||
};
|
||||
|
||||
/**
|
||||
* wsa881x_update_reg_defaults_2_0 - update default values of regs for v2.0
|
||||
*
|
||||
* wsa881x v2.0 has different default values for certain analog and digital
|
||||
* registers compared to v1.x. Therefore, update the values of these registers
|
||||
* with the values from tables defined above for v2.0.
|
||||
*/
|
||||
void wsa881x_update_reg_defaults_2_0(void)
|
||||
{
|
||||
int i, j;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wsa881x_rev_2_0_dig); i++) {
|
||||
for (j = 0; j < ARRAY_SIZE(wsa881x_ana_reg_defaults); j++)
|
||||
if (wsa881x_ana_reg_defaults[j].reg ==
|
||||
wsa881x_rev_2_0_dig[i].reg)
|
||||
wsa881x_ana_reg_defaults[j].def =
|
||||
wsa881x_rev_2_0_dig[i].def;
|
||||
}
|
||||
for (i = 0; i < ARRAY_SIZE(wsa881x_rev_2_0_ana); i++) {
|
||||
for (j = 0; j < ARRAY_SIZE(wsa881x_ana_reg_defaults); j++)
|
||||
if (wsa881x_ana_reg_defaults[j].reg ==
|
||||
wsa881x_rev_2_0_ana[i].reg)
|
||||
wsa881x_ana_reg_defaults[j].def =
|
||||
wsa881x_rev_2_0_ana[i].def;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(wsa881x_update_reg_defaults_2_0);
|
||||
|
||||
/**
|
||||
* wsa881x_update_regmap_2_0 - update regmap framework with new tables
|
||||
* @regmap: pointer to wsa881x regmap structure
|
||||
* @flag: indicates digital or analog wsa881x slave
|
||||
*
|
||||
* wsa881x v2.0 has some new registers for both analog and digital slaves.
|
||||
* Update the regmap framework with all the new registers.
|
||||
*/
|
||||
void wsa881x_update_regmap_2_0(struct regmap *regmap, int flag)
|
||||
{
|
||||
u16 ret = 0;
|
||||
|
||||
switch (flag) {
|
||||
case WSA881X_DIGITAL_SLAVE:
|
||||
ret = regmap_register_patch(regmap, wsa881x_rev_2_0_dig,
|
||||
ARRAY_SIZE(wsa881x_rev_2_0_dig));
|
||||
break;
|
||||
case WSA881X_ANALOG_SLAVE:
|
||||
ret = regmap_register_patch(regmap, wsa881x_rev_2_0_ana,
|
||||
ARRAY_SIZE(wsa881x_rev_2_0_ana));
|
||||
break;
|
||||
default:
|
||||
pr_debug("%s: unknown version", __func__);
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
if (ret)
|
||||
pr_err("%s: Failed to update regmap defaults ret= %d\n",
|
||||
__func__, ret);
|
||||
}
|
||||
EXPORT_SYMBOL(wsa881x_update_regmap_2_0);
|
||||
|
||||
static bool wsa881x_readable_register(struct device *dev, unsigned int reg)
|
||||
{
|
||||
return wsa881x_ana_reg_readable[reg];
|
||||
}
|
||||
|
||||
static bool wsa881x_volatile_register(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case WSA881X_CHIP_ID0:
|
||||
case WSA881X_CHIP_ID1:
|
||||
case WSA881X_CHIP_ID2:
|
||||
case WSA881X_CHIP_ID3:
|
||||
case WSA881X_BUS_ID:
|
||||
case WSA881X_TEMP_MSB:
|
||||
case WSA881X_TEMP_LSB:
|
||||
case WSA881X_SDM_PDM9_LSB:
|
||||
case WSA881X_SDM_PDM9_MSB:
|
||||
case WSA881X_OTP_REG_0:
|
||||
case WSA881X_OTP_REG_1:
|
||||
case WSA881X_OTP_REG_2:
|
||||
case WSA881X_OTP_REG_3:
|
||||
case WSA881X_OTP_REG_4:
|
||||
case WSA881X_OTP_REG_5:
|
||||
case WSA881X_OTP_REG_31:
|
||||
case WSA881X_TEMP_DOUT_MSB:
|
||||
case WSA881X_TEMP_DOUT_LSB:
|
||||
case WSA881X_TEMP_OP:
|
||||
case WSA881X_OTP_CTRL1:
|
||||
case WSA881X_INTR_STATUS:
|
||||
case WSA881X_ATE_TEST_MODE:
|
||||
case WSA881X_PIN_STATUS:
|
||||
case WSA881X_SWR_HM_TEST2:
|
||||
case WSA881X_SPKR_STATUS1:
|
||||
case WSA881X_SPKR_STATUS2:
|
||||
case WSA881X_SPKR_STATUS3:
|
||||
case WSA881X_SPKR_PROT_SAR:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
struct regmap_config wsa881x_ana_regmap_config[] = {
|
||||
{
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.cache_type = REGCACHE_NONE,
|
||||
.reg_defaults = wsa881x_ana_reg_defaults_0,
|
||||
.num_reg_defaults = ARRAY_SIZE(wsa881x_ana_reg_defaults_0),
|
||||
.max_register = WSA881X_MAX_REGISTER,
|
||||
.volatile_reg = wsa881x_volatile_register,
|
||||
.readable_reg = wsa881x_readable_register,
|
||||
.reg_format_endian = REGMAP_ENDIAN_NATIVE,
|
||||
.val_format_endian = REGMAP_ENDIAN_NATIVE,
|
||||
},
|
||||
{
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.cache_type = REGCACHE_NONE,
|
||||
.reg_defaults = wsa881x_ana_reg_defaults_1,
|
||||
.num_reg_defaults = ARRAY_SIZE(wsa881x_ana_reg_defaults_1),
|
||||
.max_register = WSA881X_MAX_REGISTER,
|
||||
.volatile_reg = wsa881x_volatile_register,
|
||||
.readable_reg = wsa881x_readable_register,
|
||||
.reg_format_endian = REGMAP_ENDIAN_NATIVE,
|
||||
.val_format_endian = REGMAP_ENDIAN_NATIVE,
|
||||
}
|
||||
};
|
||||
163
asoc/codecs/wsa881x-tables-analog.c
一般檔案
163
asoc/codecs/wsa881x-tables-analog.c
一般檔案
@@ -0,0 +1,163 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2015, 2018-2019, The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/device.h>
|
||||
#include "wsa881x-registers-analog.h"
|
||||
|
||||
const u8 wsa881x_ana_reg_readable[WSA881X_CACHE_SIZE] = {
|
||||
[WSA881X_CHIP_ID0] = 1,
|
||||
[WSA881X_CHIP_ID1] = 1,
|
||||
[WSA881X_CHIP_ID2] = 1,
|
||||
[WSA881X_CHIP_ID3] = 1,
|
||||
[WSA881X_BUS_ID] = 1,
|
||||
[WSA881X_CDC_RST_CTL] = 1,
|
||||
[WSA881X_CDC_TOP_CLK_CTL] = 1,
|
||||
[WSA881X_CDC_ANA_CLK_CTL] = 1,
|
||||
[WSA881X_CDC_DIG_CLK_CTL] = 1,
|
||||
[WSA881X_CLOCK_CONFIG] = 1,
|
||||
[WSA881X_ANA_CTL] = 1,
|
||||
[WSA881X_SWR_RESET_EN] = 1,
|
||||
[WSA881X_RESET_CTL] = 1,
|
||||
[WSA881X_TADC_VALUE_CTL] = 1,
|
||||
[WSA881X_TEMP_DETECT_CTL] = 1,
|
||||
[WSA881X_TEMP_MSB] = 1,
|
||||
[WSA881X_TEMP_LSB] = 1,
|
||||
[WSA881X_TEMP_CONFIG0] = 1,
|
||||
[WSA881X_TEMP_CONFIG1] = 1,
|
||||
[WSA881X_CDC_CLIP_CTL] = 1,
|
||||
[WSA881X_SDM_PDM9_LSB] = 1,
|
||||
[WSA881X_SDM_PDM9_MSB] = 1,
|
||||
[WSA881X_CDC_RX_CTL] = 1,
|
||||
[WSA881X_DEM_BYPASS_DATA0] = 1,
|
||||
[WSA881X_DEM_BYPASS_DATA1] = 1,
|
||||
[WSA881X_DEM_BYPASS_DATA2] = 1,
|
||||
[WSA881X_DEM_BYPASS_DATA3] = 1,
|
||||
[WSA881X_OTP_CTRL0] = 1,
|
||||
[WSA881X_OTP_CTRL1] = 1,
|
||||
[WSA881X_HDRIVE_CTL_GROUP1] = 1,
|
||||
[WSA881X_INTR_MODE] = 1,
|
||||
[WSA881X_INTR_MASK] = 1,
|
||||
[WSA881X_INTR_STATUS] = 1,
|
||||
[WSA881X_INTR_CLEAR] = 1,
|
||||
[WSA881X_INTR_LEVEL] = 1,
|
||||
[WSA881X_INTR_SET] = 1,
|
||||
[WSA881X_INTR_TEST] = 1,
|
||||
[WSA881X_PDM_TEST_MODE] = 1,
|
||||
[WSA881X_ATE_TEST_MODE] = 1,
|
||||
[WSA881X_PIN_CTL_MODE] = 1,
|
||||
[WSA881X_PIN_CTL_OE] = 1,
|
||||
[WSA881X_PIN_WDATA_IOPAD] = 1,
|
||||
[WSA881X_PIN_STATUS] = 1,
|
||||
[WSA881X_DIG_DEBUG_MODE] = 1,
|
||||
[WSA881X_DIG_DEBUG_SEL] = 1,
|
||||
[WSA881X_DIG_DEBUG_EN] = 1,
|
||||
[WSA881X_SWR_HM_TEST1] = 1,
|
||||
[WSA881X_SWR_HM_TEST2] = 1,
|
||||
[WSA881X_TEMP_DETECT_DBG_CTL] = 1,
|
||||
[WSA881X_TEMP_DEBUG_MSB] = 1,
|
||||
[WSA881X_TEMP_DEBUG_LSB] = 1,
|
||||
[WSA881X_SAMPLE_EDGE_SEL] = 1,
|
||||
[WSA881X_IOPAD_CTL] = 1,
|
||||
[WSA881X_SPARE_0] = 1,
|
||||
[WSA881X_SPARE_1] = 1,
|
||||
[WSA881X_SPARE_2] = 1,
|
||||
[WSA881X_OTP_REG_0] = 1,
|
||||
[WSA881X_OTP_REG_1] = 1,
|
||||
[WSA881X_OTP_REG_2] = 1,
|
||||
[WSA881X_OTP_REG_3] = 1,
|
||||
[WSA881X_OTP_REG_4] = 1,
|
||||
[WSA881X_OTP_REG_5] = 1,
|
||||
[WSA881X_OTP_REG_6] = 1,
|
||||
[WSA881X_OTP_REG_7] = 1,
|
||||
[WSA881X_OTP_REG_8] = 1,
|
||||
[WSA881X_OTP_REG_9] = 1,
|
||||
[WSA881X_OTP_REG_10] = 1,
|
||||
[WSA881X_OTP_REG_11] = 1,
|
||||
[WSA881X_OTP_REG_12] = 1,
|
||||
[WSA881X_OTP_REG_13] = 1,
|
||||
[WSA881X_OTP_REG_14] = 1,
|
||||
[WSA881X_OTP_REG_15] = 1,
|
||||
[WSA881X_OTP_REG_16] = 1,
|
||||
[WSA881X_OTP_REG_17] = 1,
|
||||
[WSA881X_OTP_REG_18] = 1,
|
||||
[WSA881X_OTP_REG_19] = 1,
|
||||
[WSA881X_OTP_REG_20] = 1,
|
||||
[WSA881X_OTP_REG_21] = 1,
|
||||
[WSA881X_OTP_REG_22] = 1,
|
||||
[WSA881X_OTP_REG_23] = 1,
|
||||
[WSA881X_OTP_REG_24] = 1,
|
||||
[WSA881X_OTP_REG_25] = 1,
|
||||
[WSA881X_OTP_REG_26] = 1,
|
||||
[WSA881X_OTP_REG_27] = 1,
|
||||
[WSA881X_OTP_REG_28] = 1,
|
||||
[WSA881X_OTP_REG_29] = 1,
|
||||
[WSA881X_OTP_REG_30] = 1,
|
||||
[WSA881X_OTP_REG_31] = 1,
|
||||
[WSA881X_OTP_REG_63] = 1,
|
||||
/* Analog Registers */
|
||||
[WSA881X_BIAS_REF_CTRL] = 1,
|
||||
[WSA881X_BIAS_TEST] = 1,
|
||||
[WSA881X_BIAS_BIAS] = 1,
|
||||
[WSA881X_TEMP_OP] = 1,
|
||||
[WSA881X_TEMP_IREF_CTRL] = 1,
|
||||
[WSA881X_TEMP_ISENS_CTRL] = 1,
|
||||
[WSA881X_TEMP_CLK_CTRL] = 1,
|
||||
[WSA881X_TEMP_TEST] = 1,
|
||||
[WSA881X_TEMP_BIAS] = 1,
|
||||
[WSA881X_TEMP_ADC_CTRL] = 1,
|
||||
[WSA881X_TEMP_DOUT_MSB] = 1,
|
||||
[WSA881X_TEMP_DOUT_LSB] = 1,
|
||||
[WSA881X_ADC_EN_MODU_V] = 1,
|
||||
[WSA881X_ADC_EN_MODU_I] = 1,
|
||||
[WSA881X_ADC_EN_DET_TEST_V] = 1,
|
||||
[WSA881X_ADC_EN_DET_TEST_I] = 1,
|
||||
[WSA881X_ADC_SEL_IBIAS] = 1,
|
||||
[WSA881X_ADC_EN_SEL_IBIAS] = 1,
|
||||
[WSA881X_SPKR_DRV_EN] = 1,
|
||||
[WSA881X_SPKR_DRV_GAIN] = 1,
|
||||
[WSA881X_SPKR_DAC_CTL] = 1,
|
||||
[WSA881X_SPKR_DRV_DBG] = 1,
|
||||
[WSA881X_SPKR_PWRSTG_DBG] = 1,
|
||||
[WSA881X_SPKR_OCP_CTL] = 1,
|
||||
[WSA881X_SPKR_CLIP_CTL] = 1,
|
||||
[WSA881X_SPKR_BBM_CTL] = 1,
|
||||
[WSA881X_SPKR_MISC_CTL1] = 1,
|
||||
[WSA881X_SPKR_MISC_CTL2] = 1,
|
||||
[WSA881X_SPKR_BIAS_INT] = 1,
|
||||
[WSA881X_SPKR_PA_INT] = 1,
|
||||
[WSA881X_SPKR_BIAS_CAL] = 1,
|
||||
[WSA881X_SPKR_BIAS_PSRR] = 1,
|
||||
[WSA881X_SPKR_STATUS1] = 1,
|
||||
[WSA881X_SPKR_STATUS2] = 1,
|
||||
[WSA881X_BOOST_EN_CTL] = 1,
|
||||
[WSA881X_BOOST_CURRENT_LIMIT] = 1,
|
||||
[WSA881X_BOOST_PS_CTL] = 1,
|
||||
[WSA881X_BOOST_PRESET_OUT1] = 1,
|
||||
[WSA881X_BOOST_PRESET_OUT2] = 1,
|
||||
[WSA881X_BOOST_FORCE_OUT] = 1,
|
||||
[WSA881X_BOOST_LDO_PROG] = 1,
|
||||
[WSA881X_BOOST_SLOPE_COMP_ISENSE_FB] = 1,
|
||||
[WSA881X_BOOST_RON_CTL] = 1,
|
||||
[WSA881X_BOOST_LOOP_STABILITY] = 1,
|
||||
[WSA881X_BOOST_ZX_CTL] = 1,
|
||||
[WSA881X_BOOST_START_CTL] = 1,
|
||||
[WSA881X_BOOST_MISC1_CTL] = 1,
|
||||
[WSA881X_BOOST_MISC2_CTL] = 1,
|
||||
[WSA881X_BOOST_MISC3_CTL] = 1,
|
||||
[WSA881X_BOOST_ATEST_CTL] = 1,
|
||||
[WSA881X_SPKR_PROT_FE_GAIN] = 1,
|
||||
[WSA881X_SPKR_PROT_FE_CM_LDO_SET] = 1,
|
||||
[WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1] = 1,
|
||||
[WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2] = 1,
|
||||
[WSA881X_SPKR_PROT_ATEST1] = 1,
|
||||
[WSA881X_SPKR_PROT_ATEST2] = 1,
|
||||
[WSA881X_SPKR_PROT_FE_VSENSE_VCM] = 1,
|
||||
[WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1] = 1,
|
||||
[WSA881X_BONGO_RESRV_REG1] = 1,
|
||||
[WSA881X_BONGO_RESRV_REG2] = 1,
|
||||
[WSA881X_SPKR_PROT_SAR] = 1,
|
||||
[WSA881X_SPKR_STATUS3] = 1,
|
||||
};
|
||||
新增問題並參考
封鎖使用者