Merge "asoc: codecs: bolero: Update mixing path and channel mask for RX path"

asoc/codecs/bolero/rx-macro.c

@@ -921,9 +921,9 @@ static int rx_macro_set_prim_interpolator_rate(struct snd_soc_dai *dai,
 			inp0_sel = int_mux_cfg0_val & 0x0F;
 			inp1_sel = (int_mux_cfg0_val >> 4) & 0x0F;
 			inp2_sel = (int_mux_cfg1_val >> 4) & 0x0F;
-			if ((inp0_sel == int_1_mix1_inp) ||
-			    (inp1_sel == int_1_mix1_inp) ||
-			    (inp2_sel == int_1_mix1_inp)) {
+			if ((inp0_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0) ||
+			    (inp1_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0) ||
+			    (inp2_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0)) {
 				int_fs_reg = BOLERO_CDC_RX_RX0_RX_PATH_CTL +
 					     0x80 * j;
 				pr_debug("%s: AIF_PB DAI(%d) connected to INT%u_1\n",
@@ -972,7 +972,8 @@ static int rx_macro_set_mix_interpolator_rate(struct snd_soc_dai *dai,
 			int_mux_cfg1_val = snd_soc_component_read32(
 						component, int_mux_cfg1) &
 						0x0F;
-			if (int_mux_cfg1_val == int_2_inp) {
+			if (int_mux_cfg1_val == int_2_inp +
+							INTn_2_INP_SEL_RX0) {
 				int_fs_reg = BOLERO_CDC_RX_RX0_RX_PATH_MIX_CTL +
 						0x80 * j;
 				pr_debug("%s: AIF_PB DAI(%d) connected to INT%u_2\n",
@@ -1100,8 +1101,26 @@ static int rx_macro_get_channel_map(struct snd_soc_dai *dai,
 			if (++i == RX_MACRO_MAX_DMA_CH_PER_PORT)
 				break;
 		}
+		/*
+		 * CDC_DMA_RX_0 port drives RX0/RX1 -- ch_mask 0x1/0x2/0x3
+		 * CDC_DMA_RX_1 port drives RX2/RX3 -- ch_mask 0x1/0x2/0x3
+		 * CDC_DMA_RX_2 port drives RX4     -- ch_mask 0x1
+		 * CDC_DMA_RX_3 port drives RX5     -- ch_mask 0x1
+		 * AIFn can pair to any CDC_DMA_RX_n port.
+		 * In general, below convention is used::
+		 * CDC_DMA_RX_0(AIF1)/CDC_DMA_RX_1(AIF2)/
+		 * CDC_DMA_RX_2(AIF3)/CDC_DMA_RX_3(AIF4)
+		 * Above is reflected in machine driver BE dailink
+		 */
+		if (ch_mask & 0x0C)
+			ch_mask = ch_mask >> 2;
+		if ((ch_mask & 0x10) || (ch_mask & 0x20))
+			ch_mask = 0x1;
 		*rx_slot = ch_mask;
 		*rx_num = rx_priv->active_ch_cnt[dai->id];
+		dev_dbg(rx_priv->dev,
+			"%s: dai->id:%d, ch_mask:0x%x, active_ch_cnt:%d active_mask: 0x%x\n",
+			__func__, dai->id, *rx_slot, *rx_num, rx_priv->active_ch_mask[dai->id]);
 		break;
 	case RX_MACRO_AIF_ECHO:
 		val = snd_soc_component_read32(component,
@@ -1169,9 +1188,12 @@ static int rx_macro_digital_mute(struct snd_soc_dai *dai, int mute)
 			if (int_mux_cfg0_val || (int_mux_cfg1_val & 0xF0))
 				snd_soc_component_update_bits(component,
 							reg, 0x20, 0x20);
-			if (int_mux_cfg1_val & 0x0F)
+			if (int_mux_cfg1_val & 0x0F) {
+				snd_soc_component_update_bits(component,
+							reg, 0x20, 0x20);
 				snd_soc_component_update_bits(component,
 							mix_reg, 0x20, 0x20);
+			}
 		}
 	}
 		break;

asoc/codecs/bolero/wsa-macro.c

@@ -54,6 +54,7 @@
 #define WSA_MACRO_EC_MIX_TX0_MASK 0x03
 #define WSA_MACRO_EC_MIX_TX1_MASK 0x18
 
+#define WSA_MACRO_MAX_DMA_CH_PER_PORT 0x2
 
 enum {
 	WSA_MACRO_RX0 = 0,
@@ -98,6 +99,14 @@ enum {
 	INTn_1_INP_SEL_DEC1,
 };
 
+enum {
+	INTn_2_INP_SEL_ZERO = 0,
+	INTn_2_INP_SEL_RX0,
+	INTn_2_INP_SEL_RX1,
+	INTn_2_INP_SEL_RX2,
+	INTn_2_INP_SEL_RX3,
+};
+
 struct interp_sample_rate {
 	int sample_rate;
 	int rate_val;
@@ -615,9 +624,9 @@ static int wsa_macro_set_prim_interpolator_rate(struct snd_soc_dai *dai,
 			inp2_sel = (int_mux_cfg1_val >>
 					WSA_MACRO_MUX_INP_SHFT) &
 					WSA_MACRO_MUX_INP_MASK2;
-			if ((inp0_sel == int_1_mix1_inp) ||
-			    (inp1_sel == int_1_mix1_inp) ||
-			    (inp2_sel == int_1_mix1_inp)) {
+			if ((inp0_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0) ||
+			    (inp1_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0) ||
+			    (inp2_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0)) {
 				int_fs_reg = BOLERO_CDC_WSA_RX0_RX_PATH_CTL +
 					     WSA_MACRO_RX_PATH_OFFSET * j;
 				dev_dbg(wsa_dev,
@@ -671,7 +680,8 @@ static int wsa_macro_set_mix_interpolator_rate(struct snd_soc_dai *dai,
 			int_mux_cfg1_val = snd_soc_component_read32(component,
 							int_mux_cfg1) &
 							WSA_MACRO_MUX_INP_MASK1;
-			if (int_mux_cfg1_val == int_2_inp) {
+			if (int_mux_cfg1_val == int_2_inp +
+							INTn_2_INP_SEL_RX0) {
 				int_fs_reg =
 					BOLERO_CDC_WSA_RX0_RX_PATH_MIX_CTL +
 					WSA_MACRO_RX_PATH_OFFSET * j;
@@ -767,7 +777,7 @@ static int wsa_macro_get_channel_map(struct snd_soc_dai *dai,
 	struct snd_soc_component *component = dai->component;
 	struct device *wsa_dev = NULL;
 	struct wsa_macro_priv *wsa_priv = NULL;
-	u16 val = 0, mask = 0, cnt = 0;
+	u16 val = 0, mask = 0, cnt = 0, temp = 0;
 
 	if (!wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__))
 		return -EINVAL;
@@ -783,8 +793,16 @@ static int wsa_macro_get_channel_map(struct snd_soc_dai *dai,
 		break;
 	case WSA_MACRO_AIF1_PB:
 	case WSA_MACRO_AIF_MIX1_PB:
-		*rx_slot = wsa_priv->active_ch_mask[dai->id];
-		*rx_num = wsa_priv->active_ch_cnt[dai->id];
+		for_each_set_bit(temp, &wsa_priv->active_ch_mask[dai->id],
+					WSA_MACRO_RX_MAX) {
+			mask |= (1 << temp);
+			if (++cnt == WSA_MACRO_MAX_DMA_CH_PER_PORT)
+				break;
+		}
+		if (mask & 0x0C)
+			mask = mask >> 0x2;
+		*rx_slot = mask;
+		*rx_num = cnt;
 		break;
 	case WSA_MACRO_AIF_ECHO:
 		val = snd_soc_component_read32(component,
@@ -843,9 +861,12 @@ static int wsa_macro_digital_mute(struct snd_soc_dai *dai, int mute)
 			if (int_mux_cfg0_val || (int_mux_cfg1_val & 0x38))
 				snd_soc_component_update_bits(component, reg,
 							0x20, 0x20);
-			if (int_mux_cfg1_val & 0x07)
+			if (int_mux_cfg1_val & 0x07) {
+				snd_soc_component_update_bits(component, reg,
+							0x20, 0x20);
 				snd_soc_component_update_bits(component,
 						mix_reg, 0x20, 0x20);
+			}
 		}
 	}
 	bolero_wsa_pa_on(wsa_dev);
@@ -2189,8 +2210,6 @@ static int wsa_macro_rx_mux_put(struct snd_kcontrol *kcontrol,
 	wsa_priv->rx_port_value[widget->shift] = rx_port_value;
 
 	bit_input = widget->shift;
-	if (widget->shift >= WSA_MACRO_RX_MIX)
-		bit_input %= WSA_MACRO_RX_MIX;
 
 	dev_dbg(wsa_dev,
 		"%s: mux input: %d, mux output: %d, bit: %d\n",