qcacmn: HAL hardware header files changes for beryllium

Add HAL hw header inclusion changes for WCN7850

Change-Id: I2d56cf6ddfa2bc60c6440c20f1798f5b876d2143
CRs-Fixed: 2891049

hal/wifi3.0/be/hal_be_hw_headers.h

@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _HAL_BE_HW_INTERNAL_H_
+#define _HAL_BE_HW_INTERNAL_H_
+
+#include "wcss_seq_hwioreg_umac.h"
+#include "phyrx_location.h"
+#include "receive_rssi_info.h"
+#include "buffer_addr_info.h"
+
+#include "wbm2sw_completion_ring_tx.h"
+#include "wbm2sw_completion_ring_rx.h"
+
+#if defined(QCA_WIFI_WCN7850)
+#include "msmhwioreg.h"
+#endif
+
+#define HAL_DESC_64_SET_FIELD(_desc, _word, _fld, _value) do { \
+	((uint64_t *)(_desc))[(_word ## _ ## _fld ## _OFFSET) >> 3] &= \
+		~(_word ## _ ## _fld ## _MASK); \
+	((uint64_t *)(_desc))[(_word ## _ ## _fld ## _OFFSET) >> 3] |= \
+		(((uint64_t)(_value)) << _word ## _ ## _fld ## _LSB); \
+} while (0)
+
+#endif /* _HAL_BE_HW_INTERNAL_H_ */

hal/wifi3.0/hal_hw_headers.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -21,6 +21,7 @@
 #include "qdf_types.h"
 #include "qdf_lock.h"
 #include "qdf_mem.h"
+#include "qdf_trace.h"
 #include "rx_msdu_link.h"
 #include "rx_reo_queue.h"
 #include "rx_reo_queue_ext.h"
@@ -28,24 +29,15 @@
 #include "tlv_hdr.h"
 #include "tlv_tag_def.h"
 #include "reo_destination_ring.h"
-#include "reo_reg_seq_hwioreg.h"
 #include "reo_entrance_ring.h"
 #include "reo_get_queue_stats.h"
 #include "reo_get_queue_stats_status.h"
 #include "tcl_data_cmd.h"
 #include "tcl_gse_cmd.h"
 #include "tcl_status_ring.h"
-#include "mac_tcl_reg_seq_hwioreg.h"
 #include "ce_src_desc.h"
 #include "ce_stat_desc.h"
-#ifdef QCA_WIFI_QCA6490
-#include "wfss_ce_channel_dst_reg_seq_hwioreg.h"
-#include "wfss_ce_channel_src_reg_seq_hwioreg.h"
-#else
-#include "wfss_ce_reg_seq_hwioreg.h"
-#endif /* QCA_WIFI_QCA6490 */
 #include "wbm_link_descriptor_ring.h"
-#include "wbm_reg_seq_hwioreg.h"
 #include "wbm_buffer_ring.h"
 #include "wbm_release_ring.h"
 #include "rx_msdu_desc_info.h"
@@ -88,6 +80,39 @@
 #define SRNG_LOOP_CNT_MASK REO_DESTINATION_RING_15_LOOPING_COUNT_MASK
 #define SRNG_LOOP_CNT_LSB REO_DESTINATION_RING_15_LOOPING_COUNT_LSB
 
+#define HAL_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR_SHFT		0x0
+#define HAL_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR_BMSK		0xff
+
+#define HAL_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT	0x8
+#define HAL_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK	0x100
+
+#define HAL_REO_R0_REO2SW1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT	0x0
+#define HAL_REO_R0_REO2SW1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK	0xff
+
+#define HAL_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_SHFT		0x8
+#define HAL_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_BMSK		0xfffff00
+
+#define HAL_REO_R0_REO2SW1_RING_ID_RING_ID_SHFT		0x8
+#define HAL_REO_R0_REO2SW1_RING_ID_RING_ID_BMSK		0x0000ff00
+
+#define HAL_REO_R0_REO2SW1_RING_ID_ENTRY_SIZE_SHFT	0x0
+#define HAL_REO_R0_REO2SW1_RING_ID_ENTRY_SIZE_BMSK	0xff
+
+#define HAL_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT	0x10
+#define HAL_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK	0xffff0000
+
+#define HAL_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT		0x0
+#define HAL_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK		0x00007fff
+
+#define HAL_REO_R0_REO2SW1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT	0x5
+#define HAL_REO_R0_REO2SW1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK	0x20
+
+#define HAL_REO_R0_REO2SW1_RING_MISC_HOST_FW_SWAP_BIT_SHFT	0x4
+#define HAL_REO_R0_REO2SW1_RING_MISC_HOST_FW_SWAP_BIT_BMSK	0x10
+
+#define HAL_REO_R0_REO2SW1_RING_MISC_MSI_SWAP_BIT_SHFT		0x3
+#define HAL_REO_R0_REO2SW1_RING_MISC_MSI_SWAP_BIT_BMSK		0x8
+
 /* HAL Macro to get the buffer info size */
 #define HAL_RX_BUFFINFO_NUM_DWORDS NUM_OF_DWORDS_BUFFER_ADDR_INFO
 
@@ -201,7 +226,7 @@
 	HWIO_TCL_ ## _reg_group ## _SW2TCL1_RING_ ## _reg ## _ADDR(0)
 
 #define _SRNG_DST_FLD(_reg_group, _reg_fld) \
-	HWIO_REO_ ## _reg_group ## _REO2SW1_RING_ ## _reg_fld
+	HAL_REO_ ## _reg_group ## _REO2SW1_RING_ ## _reg_fld
 #define _SRNG_SRC_FLD(_reg_group, _reg_fld) \
 	HWIO_TCL_ ## _reg_group ## _SW2TCL1_RING_ ## _reg_fld
 
@@ -322,24 +347,26 @@ SRC_CONSUMER_INT_SETUP_IX1,
  * hal_set_link_desc_addr - Setup link descriptor in a buffer_addr_info
  * HW structure
  *
+ * @hal_soc_hdl: HAL soc handle
  * @desc: Descriptor entry (from WBM_IDLE_LINK ring)
  * @cookie: SW cookie for the buffer/descriptor
  * @link_desc_paddr: Physical address of link descriptor entry
  *
  */
-static inline void hal_set_link_desc_addr(void *desc, uint32_t cookie,
-	qdf_dma_addr_t link_desc_paddr)
+static inline void hal_set_link_desc_addr(hal_soc_handle_t hal_soc_hdl,
+					  void *desc, uint32_t cookie,
+					  qdf_dma_addr_t link_desc_paddr)
 {
-	uint32_t *buf_addr = (uint32_t *)desc;
-
-	HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_0, BUFFER_ADDR_31_0,
-			   link_desc_paddr & 0xffffffff);
-	HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, BUFFER_ADDR_39_32,
-			   (uint64_t)link_desc_paddr >> 32);
-	HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, RETURN_BUFFER_MANAGER,
-			   WBM_IDLE_DESC_LIST);
-	HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, SW_BUFFER_COOKIE,
-			   cookie);
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+
+	if ((!hal_soc) || (!hal_soc->ops)) {
+		hal_err("hal handle is NULL");
+		return;
+	}
+
+	if (hal_soc->ops->hal_set_link_desc_addr)
+		hal_soc->ops->hal_set_link_desc_addr(desc, cookie,
+						     link_desc_paddr);
 }
 
 /**

hal/wifi3.0/hal_rx_hw_defines.h

@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2021 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _HAL_RX_HW_DEFINES_H_
+#define _HAL_RX_HW_DEFINES_H_
+
+/* Unified desc fields */
+#define HAL_RX_USER_TLV32_TYPE_OFFSET		0x00000000
+#define HAL_RX_USER_TLV32_TYPE_LSB		1
+#define HAL_RX_USER_TLV32_TYPE_MASK		0x000003FE
+
+#define HAL_RX_USER_TLV32_LEN_OFFSET		0x00000000
+#define HAL_RX_USER_TLV32_LEN_LSB		10
+#define HAL_RX_USER_TLV32_LEN_MASK		0x003FFC00
+
+#define HAL_RX_USER_TLV32_USERID_OFFSET		0x00000000
+#define HAL_RX_USER_TLV32_USERID_LSB		26
+#define HAL_RX_USER_TLV32_USERID_MASK		0xFC000000
+
+/* rx mpdu desc info */
+#define HAL_RX_MPDU_DESC_INFO_MSDU_COUNT_OFFSET		0x0
+#define HAL_RX_MPDU_DESC_INFO_MSDU_COUNT_LSB		0
+#define HAL_RX_MPDU_DESC_INFO_MSDU_COUNT_MASK		0x000000ff
+
+/* reo entrance ring */
+#define HAL_REO_ENTRANCE_RING_LOOPING_COUNT_OFFSET	0x1c
+#define HAL_REO_ENTRANCE_RING_LOOPING_COUNT_LSB		28
+#define HAL_REO_ENTRANCE_RING_LOOPING_COUNT_MASK	0xf0000000
+
+#define HAL_REO_ENTRANCE_RING_RXDMA_PUSH_REASON_OFFSET		0x18
+#define HAL_REO_ENTRANCE_RING_RXDMA_PUSH_REASON_LSB		0
+#define HAL_REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MASK		0x00000003
+
+#define HAL_REO_ENTRANCE_RING_RXDMA_ERROR_CODE_OFFSET		0x18
+#define HAL_REO_ENTRANCE_RING_RXDMA_ERROR_CODE_LSB		2
+#define HAL_REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MASK		0x0000007c
+
+#define HAL_SW2WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_OFFSET	0x8
+#define HAL_SW2WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_LSB	0
+#define HAL_SW2WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_MASK	0x00000007
+
+#define HAL_SW2WBM_RELEASE_RING_BM_ACTION_OFFSET		0x8
+#define HAL_SW2WBM_RELEASE_RING_BM_ACTION_LSB			3
+#define HAL_SW2WBM_RELEASE_RING_BM_ACTION_MASK			0x00000038
+
+#define HAL_SW2WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_OFFSET	0x8
+#define HAL_SW2WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_LSB		6
+#define HAL_SW2WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_MASK	0x000001c0
+
+/* REO CMD entry offsets */
+#define HAL_UNIFORM_REO_CMD_HEADER_REO_CMD_NUMBER_OFFSET	0x0
+#define HAL_UNIFORM_REO_CMD_HEADER_REO_CMD_NUMBER_LSB		0
+#define HAL_UNIFORM_REO_CMD_HEADER_REO_CMD_NUMBER_MASK		0x0000ffff
+
+#define HAL_UNIFORM_DESCRIPTOR_HEADER_OWNER_OFFSET		0x00000000
+#define HAL_UNIFORM_DESCRIPTOR_HEADER_OWNER_LSB			0
+#define HAL_UNIFORM_DESCRIPTOR_HEADER_OWNER_MASK		0x0000000f
+
+#define HAL_UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_OFFSET	0x00000000
+#define HAL_UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_LSB		4
+#define HAL_UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_MASK		0x000000f0
+
+#define HAL_WBM_INTERNAL_ERROR_OFFSET		0x8
+#define HAL_WBM_INTERNAL_ERROR_LSB		31
+#define HAL_WBM_INTERNAL_ERROR_MASK		0x80000000
+
+#define WBM_ERR_RING_BUFFER_OR_DESC_TYPE_OFFSET	0x8
+#define WBM_ERR_RING_BUFFER_OR_DESC_TYPE_LSB	6
+#define WBM_ERR_RING_BUFFER_OR_DESC_TYPE_MASK	0x000001c0
+
+/* RX Flow search entry MACROS */
+#define HAL_RX_FLOW_SEARCH_ENTRY_VALID_OFFSET			0x00000024
+#define HAL_RX_FLOW_SEARCH_ENTRY_VALID_LSB			8
+#define HAL_RX_FLOW_SEARCH_ENTRY_VALID_MASK			0x00000100
+
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_127_96_OFFSET		0x00000000
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_127_96_LSB		0
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_127_96_MASK		0xffffffff
+
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_95_64_OFFSET		0x00000004
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_95_64_LSB		0
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_95_64_MASK		0xffffffff
+
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_63_32_OFFSET		0x00000008
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_63_32_LSB		0
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_63_32_MASK		0xffffffff
+
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_31_0_OFFSET		0x0000000c
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_31_0_LSB		0
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_31_0_MASK		0xffffffff
+
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_127_96_OFFSET		0x00000010
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_127_96_LSB		0
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_127_96_MASK		0xffffffff
+
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_95_64_OFFSET		0x00000014
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_95_64_LSB		0
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_95_64_MASK		0xffffffff
+
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_63_32_OFFSET		0x00000018
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_63_32_LSB		0
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_63_32_MASK		0xffffffff
+
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_31_0_OFFSET		0x0000001c
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_31_0_LSB		0
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_31_0_MASK		0xffffffff
+
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_PORT_OFFSET		0x00000020
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_PORT_LSB			16
+#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_PORT_MASK			0xffff0000
+
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_PORT_OFFSET		0x00000020
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_PORT_LSB			0
+#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_PORT_MASK			0x0000ffff
+
+#define HAL_RX_FLOW_SEARCH_ENTRY_L4_PROTOCOL_OFFSET		0x00000024
+#define HAL_RX_FLOW_SEARCH_ENTRY_L4_PROTOCOL_LSB		0
+#define HAL_RX_FLOW_SEARCH_ENTRY_L4_PROTOCOL_MASK		0x000000ff
+
+#endif /* _HAL_RX_HW_DEFINES_H_ */

hal/wifi3.0/hal_tx_hw_defines.h

@@ -0,0 +1,143 @@
+/*
+ * Copyright (c) 2021 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _HAL_TX_HW_DEFINES_H_
+#define _HAL_TX_HW_DEFINES_H_
+
+#define HAL_TX_MSDU_EXTENSION_TSO_ENABLE_OFFSET		0x00000000
+#define HAL_TX_MSDU_EXTENSION_TSO_ENABLE_LSB		0
+#define HAL_TX_MSDU_EXTENSION_TSO_ENABLE_MASK		0x00000001
+
+#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_OFFSET		0x00000000
+#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_LSB		7
+#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK		0x0000ff80
+
+#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK_OFFSET	0x00000000
+#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK_LSB		16
+#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK_MASK	0x01ff0000
+
+#define HAL_TX_MSDU_EXTENSION_L2_LENGTH_OFFSET		0x00000004
+#define HAL_TX_MSDU_EXTENSION_L2_LENGTH_LSB		0
+#define HAL_TX_MSDU_EXTENSION_L2_LENGTH_MASK		0x0000ffff
+
+#define HAL_TX_MSDU_EXTENSION_IP_LENGTH_OFFSET		0x00000004
+#define HAL_TX_MSDU_EXTENSION_IP_LENGTH_LSB		16
+#define HAL_TX_MSDU_EXTENSION_IP_LENGTH_MASK		0xffff0000
+
+#define HAL_TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_OFFSET	0x00000008
+#define HAL_TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_LSB	0
+#define HAL_TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_MASK	0xffffffff
+
+#define HAL_TX_MSDU_EXTENSION_IP_IDENTIFICATION_OFFSET	0x0000000c
+#define HAL_TX_MSDU_EXTENSION_IP_IDENTIFICATION_LSB	0
+#define HAL_TX_MSDU_EXTENSION_IP_IDENTIFICATION_MASK	0x0000ffff
+
+#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_31_0_OFFSET	0x00000018
+#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_31_0_LSB		0
+#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_31_0_MASK	0xffffffff
+
+#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_39_32_OFFSET	0x0000001c
+#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_39_32_LSB	0
+#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_39_32_MASK	0x000000ff
+
+#define HAL_TX_MSDU_EXTENSION_BUF0_LEN_OFFSET		0x0000001c
+#define HAL_TX_MSDU_EXTENSION_BUF0_LEN_LSB		16
+#define HAL_TX_MSDU_EXTENSION_BUF0_LEN_MASK		0xffff0000
+
+#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_31_0_OFFSET	0x00000020
+#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_31_0_LSB		0
+#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_31_0_MASK	0xffffffff
+
+#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_39_32_OFFSET	0x00000024
+#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_39_32_LSB	0
+#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_39_32_MASK	0x000000ff
+
+#define HAL_TX_MSDU_EXTENSION_BUF1_LEN_OFFSET		0x00000024
+#define HAL_TX_MSDU_EXTENSION_BUF1_LEN_LSB		16
+#define HAL_TX_MSDU_EXTENSION_BUF1_LEN_MASK		0xffff0000
+
+#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_31_0_OFFSET	0x00000028
+#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_31_0_LSB		0
+#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_31_0_MASK	0xffffffff
+
+#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_39_32_OFFSET	0x0000002c
+#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_39_32_LSB	0
+#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_39_32_MASK	0x000000ff
+
+#define HAL_TX_MSDU_EXTENSION_BUF2_LEN_OFFSET		0x0000002c
+#define HAL_TX_MSDU_EXTENSION_BUF2_LEN_LSB		16
+#define HAL_TX_MSDU_EXTENSION_BUF2_LEN_MASK		0xffff0000
+
+#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_31_0_OFFSET	0x00000030
+#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_31_0_LSB		0
+#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_31_0_MASK	0xffffffff
+
+#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_39_32_OFFSET	0x00000034
+#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_39_32_LSB	0
+#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_39_32_MASK	0x000000ff
+
+#define HAL_TX_MSDU_EXTENSION_BUF3_LEN_OFFSET		0x00000034
+#define HAL_TX_MSDU_EXTENSION_BUF3_LEN_LSB		16
+#define HAL_TX_MSDU_EXTENSION_BUF3_LEN_MASK		0xffff0000
+
+#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_31_0_OFFSET	0x00000038
+#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_31_0_LSB		0
+#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_31_0_MASK	0xffffffff
+
+#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_39_32_OFFSET	0x0000003c
+#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_39_32_LSB	0
+#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_39_32_MASK	0x000000ff
+
+#define HAL_TX_MSDU_EXTENSION_BUF4_LEN_OFFSET		0x0000003c
+#define HAL_TX_MSDU_EXTENSION_BUF4_LEN_LSB		16
+#define HAL_TX_MSDU_EXTENSION_BUF4_LEN_MASK		0xffff0000
+
+#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_31_0_OFFSET	0x00000040
+#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_31_0_LSB		0
+#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_31_0_MASK	0xffffffff
+
+#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_39_32_OFFSET	0x00000044
+#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_39_32_LSB	0
+#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_39_32_MASK	0x000000ff
+
+#define HAL_TX_MSDU_EXTENSION_BUF5_LEN_OFFSET		0x00000044
+#define HAL_TX_MSDU_EXTENSION_BUF5_LEN_LSB		16
+#define HAL_TX_MSDU_EXTENSION_BUF5_LEN_MASK		0xffff0000
+
+/* TX completion ring MACROS */
+#define HAL_TX_COMP_TX_RATE_STATS_OFFSET   0x00000014
+#define HAL_TX_COMP_TX_RATE_STATS_LSB      0
+#define HAL_TX_COMP_TX_RATE_STATS_MASK     0xffffffff
+
+#define HAL_TX_COMP_SW_PEER_ID_OFFSET			0x1c
+#define HAL_TX_COMP_SW_PEER_ID_LSB			0
+#define HAL_TX_COMP_SW_PEER_ID_MASK			0x0000ffff
+
+#define HAL_TX_COMP_BUFFER_OR_DESC_TYPE_OFFSET		0x8
+#define HAL_TX_COMP_BUFFER_OR_DESC_TYPE_LSB		0x6
+#define HAL_TX_COMP_BUFFER_OR_DESC_TYPE_MASK		0x000001c0
+
+#define HAL_TX_COMP_TQM_RELEASE_REASON_OFFSET		0x8
+#define HAL_TX_COMP_TQM_RELEASE_REASON_LSB		13
+#define HAL_TX_COMP_TQM_RELEASE_REASON_MASK		0x0001e000
+
+#define HAL_WBM2SW_RING_RELEASE_SOURCE_MODULE_OFFSET	0x8
+#define HAL_WBM2SW_RING_RELEASE_SOURCE_MODULE_LSB	0
+#define HAL_WBM2SW_RING_RELEASE_SOURCE_MODULE_MASK	0x00000007
+
+#endif /* _HAL_TX_HW_DEFINES_H_ */

hal/wifi3.0/li/hal_li_hw_headers.h

@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _HAL_LI_HW_INTERNAL_H_
+#define _HAL_LI_HW_INTERNAL_H_
+
+#include "hal_hw_headers.h"
+
+#include "reo_reg_seq_hwioreg.h"
+#include "mac_tcl_reg_seq_hwioreg.h"
+#include "wbm_reg_seq_hwioreg.h"
+#ifdef QCA_WIFI_QCA6490
+#include "wfss_ce_channel_dst_reg_seq_hwioreg.h"
+#include "wfss_ce_channel_src_reg_seq_hwioreg.h"
+#else
+#include "wfss_ce_reg_seq_hwioreg.h"
+#endif /* QCA_WIFI_QCA6490 */
+
+#endif /* _HAL_LI_HW_INTERNAL_H_ */