qcacmn: HAL hardware header files changes for beryllium
Add HAL hw header inclusion changes for WCN7850 Change-Id: I2d56cf6ddfa2bc60c6440c20f1798f5b876d2143 CRs-Fixed: 2891049
Dieser Commit ist enthalten in:
Rakesh Pillai
committet von
Manjunathappa Prakash
Manjunathappa Prakash
Ursprung
2847b9761a
Commit
9bf522cc45
41
hal/wifi3.0/be/hal_be_hw_headers.h
Normale Datei
41
hal/wifi3.0/be/hal_be_hw_headers.h
Normale Datei
@@ -0,0 +1,41 @@
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/*
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _HAL_BE_HW_INTERNAL_H_
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#define _HAL_BE_HW_INTERNAL_H_
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#include "wcss_seq_hwioreg_umac.h"
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#include "phyrx_location.h"
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#include "receive_rssi_info.h"
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#include "buffer_addr_info.h"
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#include "wbm2sw_completion_ring_tx.h"
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#include "wbm2sw_completion_ring_rx.h"
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#if defined(QCA_WIFI_WCN7850)
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#include "msmhwioreg.h"
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#endif
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#define HAL_DESC_64_SET_FIELD(_desc, _word, _fld, _value) do { \
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((uint64_t *)(_desc))[(_word ## _ ## _fld ## _OFFSET) >> 3] &= \
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~(_word ## _ ## _fld ## _MASK); \
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((uint64_t *)(_desc))[(_word ## _ ## _fld ## _OFFSET) >> 3] |= \
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(((uint64_t)(_value)) << _word ## _ ## _fld ## _LSB); \
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} while (0)
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#endif /* _HAL_BE_HW_INTERNAL_H_ */
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -21,6 +21,7 @@
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#include "qdf_types.h"
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#include "qdf_lock.h"
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#include "qdf_mem.h"
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#include "qdf_trace.h"
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#include "rx_msdu_link.h"
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#include "rx_reo_queue.h"
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#include "rx_reo_queue_ext.h"
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@@ -28,24 +29,15 @@
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#include "tlv_hdr.h"
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#include "tlv_tag_def.h"
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#include "reo_destination_ring.h"
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#include "reo_reg_seq_hwioreg.h"
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#include "reo_entrance_ring.h"
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#include "reo_get_queue_stats.h"
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#include "reo_get_queue_stats_status.h"
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#include "tcl_data_cmd.h"
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#include "tcl_gse_cmd.h"
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#include "tcl_status_ring.h"
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#include "mac_tcl_reg_seq_hwioreg.h"
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#include "ce_src_desc.h"
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#include "ce_stat_desc.h"
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#ifdef QCA_WIFI_QCA6490
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#include "wfss_ce_channel_dst_reg_seq_hwioreg.h"
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#include "wfss_ce_channel_src_reg_seq_hwioreg.h"
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#else
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#include "wfss_ce_reg_seq_hwioreg.h"
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#endif /* QCA_WIFI_QCA6490 */
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#include "wbm_link_descriptor_ring.h"
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#include "wbm_reg_seq_hwioreg.h"
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#include "wbm_buffer_ring.h"
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#include "wbm_release_ring.h"
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#include "rx_msdu_desc_info.h"
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@@ -88,6 +80,39 @@
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#define SRNG_LOOP_CNT_MASK REO_DESTINATION_RING_15_LOOPING_COUNT_MASK
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#define SRNG_LOOP_CNT_LSB REO_DESTINATION_RING_15_LOOPING_COUNT_LSB
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#define HAL_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0
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#define HAL_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR_BMSK 0xff
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#define HAL_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8
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#define HAL_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x100
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#define HAL_REO_R0_REO2SW1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0
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#define HAL_REO_R0_REO2SW1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0xff
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#define HAL_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_SHFT 0x8
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#define HAL_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_BMSK 0xfffff00
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#define HAL_REO_R0_REO2SW1_RING_ID_RING_ID_SHFT 0x8
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#define HAL_REO_R0_REO2SW1_RING_ID_RING_ID_BMSK 0x0000ff00
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#define HAL_REO_R0_REO2SW1_RING_ID_ENTRY_SIZE_SHFT 0x0
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#define HAL_REO_R0_REO2SW1_RING_ID_ENTRY_SIZE_BMSK 0xff
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#define HAL_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10
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#define HAL_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000
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#define HAL_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0
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#define HAL_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff
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#define HAL_REO_R0_REO2SW1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5
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#define HAL_REO_R0_REO2SW1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x20
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#define HAL_REO_R0_REO2SW1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4
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#define HAL_REO_R0_REO2SW1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x10
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#define HAL_REO_R0_REO2SW1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3
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#define HAL_REO_R0_REO2SW1_RING_MISC_MSI_SWAP_BIT_BMSK 0x8
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/* HAL Macro to get the buffer info size */
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#define HAL_RX_BUFFINFO_NUM_DWORDS NUM_OF_DWORDS_BUFFER_ADDR_INFO
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@@ -201,7 +226,7 @@
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HWIO_TCL_ ## _reg_group ## _SW2TCL1_RING_ ## _reg ## _ADDR(0)
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#define _SRNG_DST_FLD(_reg_group, _reg_fld) \
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HWIO_REO_ ## _reg_group ## _REO2SW1_RING_ ## _reg_fld
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HAL_REO_ ## _reg_group ## _REO2SW1_RING_ ## _reg_fld
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#define _SRNG_SRC_FLD(_reg_group, _reg_fld) \
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HWIO_TCL_ ## _reg_group ## _SW2TCL1_RING_ ## _reg_fld
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@@ -322,24 +347,26 @@ SRC_CONSUMER_INT_SETUP_IX1,
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* hal_set_link_desc_addr - Setup link descriptor in a buffer_addr_info
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* HW structure
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*
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* @hal_soc_hdl: HAL soc handle
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* @desc: Descriptor entry (from WBM_IDLE_LINK ring)
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* @cookie: SW cookie for the buffer/descriptor
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* @link_desc_paddr: Physical address of link descriptor entry
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*
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*/
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static inline void hal_set_link_desc_addr(void *desc, uint32_t cookie,
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qdf_dma_addr_t link_desc_paddr)
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static inline void hal_set_link_desc_addr(hal_soc_handle_t hal_soc_hdl,
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void *desc, uint32_t cookie,
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qdf_dma_addr_t link_desc_paddr)
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{
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uint32_t *buf_addr = (uint32_t *)desc;
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struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
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HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_0, BUFFER_ADDR_31_0,
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link_desc_paddr & 0xffffffff);
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HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, BUFFER_ADDR_39_32,
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(uint64_t)link_desc_paddr >> 32);
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HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, RETURN_BUFFER_MANAGER,
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WBM_IDLE_DESC_LIST);
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HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, SW_BUFFER_COOKIE,
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cookie);
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if ((!hal_soc) || (!hal_soc->ops)) {
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hal_err("hal handle is NULL");
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return;
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}
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if (hal_soc->ops->hal_set_link_desc_addr)
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hal_soc->ops->hal_set_link_desc_addr(desc, cookie,
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link_desc_paddr);
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}
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/**
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135
hal/wifi3.0/hal_rx_hw_defines.h
Normale Datei
135
hal/wifi3.0/hal_rx_hw_defines.h
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@@ -0,0 +1,135 @@
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/*
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* Copyright (c) 2021 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
|
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* above copyright notice and this permission notice appear in all
|
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* copies.
|
||||
*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _HAL_RX_HW_DEFINES_H_
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#define _HAL_RX_HW_DEFINES_H_
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/* Unified desc fields */
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#define HAL_RX_USER_TLV32_TYPE_OFFSET 0x00000000
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#define HAL_RX_USER_TLV32_TYPE_LSB 1
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#define HAL_RX_USER_TLV32_TYPE_MASK 0x000003FE
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#define HAL_RX_USER_TLV32_LEN_OFFSET 0x00000000
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#define HAL_RX_USER_TLV32_LEN_LSB 10
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#define HAL_RX_USER_TLV32_LEN_MASK 0x003FFC00
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#define HAL_RX_USER_TLV32_USERID_OFFSET 0x00000000
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#define HAL_RX_USER_TLV32_USERID_LSB 26
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#define HAL_RX_USER_TLV32_USERID_MASK 0xFC000000
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/* rx mpdu desc info */
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#define HAL_RX_MPDU_DESC_INFO_MSDU_COUNT_OFFSET 0x0
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#define HAL_RX_MPDU_DESC_INFO_MSDU_COUNT_LSB 0
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#define HAL_RX_MPDU_DESC_INFO_MSDU_COUNT_MASK 0x000000ff
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/* reo entrance ring */
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#define HAL_REO_ENTRANCE_RING_LOOPING_COUNT_OFFSET 0x1c
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#define HAL_REO_ENTRANCE_RING_LOOPING_COUNT_LSB 28
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#define HAL_REO_ENTRANCE_RING_LOOPING_COUNT_MASK 0xf0000000
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#define HAL_REO_ENTRANCE_RING_RXDMA_PUSH_REASON_OFFSET 0x18
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#define HAL_REO_ENTRANCE_RING_RXDMA_PUSH_REASON_LSB 0
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#define HAL_REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MASK 0x00000003
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#define HAL_REO_ENTRANCE_RING_RXDMA_ERROR_CODE_OFFSET 0x18
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#define HAL_REO_ENTRANCE_RING_RXDMA_ERROR_CODE_LSB 2
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#define HAL_REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MASK 0x0000007c
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#define HAL_SW2WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_OFFSET 0x8
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#define HAL_SW2WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_LSB 0
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#define HAL_SW2WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_MASK 0x00000007
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#define HAL_SW2WBM_RELEASE_RING_BM_ACTION_OFFSET 0x8
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#define HAL_SW2WBM_RELEASE_RING_BM_ACTION_LSB 3
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#define HAL_SW2WBM_RELEASE_RING_BM_ACTION_MASK 0x00000038
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#define HAL_SW2WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_OFFSET 0x8
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#define HAL_SW2WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_LSB 6
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#define HAL_SW2WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_MASK 0x000001c0
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/* REO CMD entry offsets */
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#define HAL_UNIFORM_REO_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x0
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#define HAL_UNIFORM_REO_CMD_HEADER_REO_CMD_NUMBER_LSB 0
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#define HAL_UNIFORM_REO_CMD_HEADER_REO_CMD_NUMBER_MASK 0x0000ffff
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_OWNER_OFFSET 0x00000000
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_OWNER_LSB 0
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_OWNER_MASK 0x0000000f
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_OFFSET 0x00000000
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_LSB 4
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_MASK 0x000000f0
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#define HAL_WBM_INTERNAL_ERROR_OFFSET 0x8
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#define HAL_WBM_INTERNAL_ERROR_LSB 31
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#define HAL_WBM_INTERNAL_ERROR_MASK 0x80000000
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#define WBM_ERR_RING_BUFFER_OR_DESC_TYPE_OFFSET 0x8
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#define WBM_ERR_RING_BUFFER_OR_DESC_TYPE_LSB 6
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#define WBM_ERR_RING_BUFFER_OR_DESC_TYPE_MASK 0x000001c0
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/* RX Flow search entry MACROS */
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#define HAL_RX_FLOW_SEARCH_ENTRY_VALID_OFFSET 0x00000024
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#define HAL_RX_FLOW_SEARCH_ENTRY_VALID_LSB 8
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#define HAL_RX_FLOW_SEARCH_ENTRY_VALID_MASK 0x00000100
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_127_96_OFFSET 0x00000000
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_127_96_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_127_96_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_95_64_OFFSET 0x00000004
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_95_64_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_95_64_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_63_32_OFFSET 0x00000008
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_63_32_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_63_32_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_31_0_OFFSET 0x0000000c
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_31_0_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_31_0_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_127_96_OFFSET 0x00000010
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_127_96_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_127_96_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_95_64_OFFSET 0x00000014
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_95_64_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_95_64_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_63_32_OFFSET 0x00000018
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_63_32_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_63_32_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_31_0_OFFSET 0x0000001c
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_31_0_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_31_0_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_PORT_OFFSET 0x00000020
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_PORT_LSB 16
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_PORT_MASK 0xffff0000
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_PORT_OFFSET 0x00000020
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_PORT_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_PORT_MASK 0x0000ffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_L4_PROTOCOL_OFFSET 0x00000024
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#define HAL_RX_FLOW_SEARCH_ENTRY_L4_PROTOCOL_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_L4_PROTOCOL_MASK 0x000000ff
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#endif /* _HAL_RX_HW_DEFINES_H_ */
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143
hal/wifi3.0/hal_tx_hw_defines.h
Normale Datei
143
hal/wifi3.0/hal_tx_hw_defines.h
Normale Datei
@@ -0,0 +1,143 @@
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/*
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* Copyright (c) 2021 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
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*/
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#ifndef _HAL_TX_HW_DEFINES_H_
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#define _HAL_TX_HW_DEFINES_H_
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#define HAL_TX_MSDU_EXTENSION_TSO_ENABLE_OFFSET 0x00000000
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#define HAL_TX_MSDU_EXTENSION_TSO_ENABLE_LSB 0
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#define HAL_TX_MSDU_EXTENSION_TSO_ENABLE_MASK 0x00000001
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||||
#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_OFFSET 0x00000000
|
||||
#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_LSB 7
|
||||
#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK 0x0000ff80
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK_OFFSET 0x00000000
|
||||
#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK_LSB 16
|
||||
#define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK_MASK 0x01ff0000
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_L2_LENGTH_OFFSET 0x00000004
|
||||
#define HAL_TX_MSDU_EXTENSION_L2_LENGTH_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_L2_LENGTH_MASK 0x0000ffff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_IP_LENGTH_OFFSET 0x00000004
|
||||
#define HAL_TX_MSDU_EXTENSION_IP_LENGTH_LSB 16
|
||||
#define HAL_TX_MSDU_EXTENSION_IP_LENGTH_MASK 0xffff0000
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_OFFSET 0x00000008
|
||||
#define HAL_TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_MASK 0xffffffff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_IP_IDENTIFICATION_OFFSET 0x0000000c
|
||||
#define HAL_TX_MSDU_EXTENSION_IP_IDENTIFICATION_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_IP_IDENTIFICATION_MASK 0x0000ffff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_31_0_OFFSET 0x00000018
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_31_0_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_31_0_MASK 0xffffffff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_39_32_OFFSET 0x0000001c
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_39_32_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF0_PTR_39_32_MASK 0x000000ff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF0_LEN_OFFSET 0x0000001c
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF0_LEN_LSB 16
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF0_LEN_MASK 0xffff0000
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_31_0_OFFSET 0x00000020
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_31_0_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_31_0_MASK 0xffffffff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_39_32_OFFSET 0x00000024
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_39_32_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF1_PTR_39_32_MASK 0x000000ff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF1_LEN_OFFSET 0x00000024
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF1_LEN_LSB 16
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF1_LEN_MASK 0xffff0000
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_31_0_OFFSET 0x00000028
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_31_0_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_31_0_MASK 0xffffffff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_39_32_OFFSET 0x0000002c
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_39_32_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF2_PTR_39_32_MASK 0x000000ff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF2_LEN_OFFSET 0x0000002c
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF2_LEN_LSB 16
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF2_LEN_MASK 0xffff0000
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_31_0_OFFSET 0x00000030
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_31_0_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_31_0_MASK 0xffffffff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_39_32_OFFSET 0x00000034
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_39_32_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF3_PTR_39_32_MASK 0x000000ff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF3_LEN_OFFSET 0x00000034
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF3_LEN_LSB 16
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF3_LEN_MASK 0xffff0000
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_31_0_OFFSET 0x00000038
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_31_0_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_31_0_MASK 0xffffffff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_39_32_OFFSET 0x0000003c
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_39_32_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF4_PTR_39_32_MASK 0x000000ff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF4_LEN_OFFSET 0x0000003c
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF4_LEN_LSB 16
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF4_LEN_MASK 0xffff0000
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_31_0_OFFSET 0x00000040
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_31_0_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_31_0_MASK 0xffffffff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_39_32_OFFSET 0x00000044
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_39_32_LSB 0
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF5_PTR_39_32_MASK 0x000000ff
|
||||
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF5_LEN_OFFSET 0x00000044
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF5_LEN_LSB 16
|
||||
#define HAL_TX_MSDU_EXTENSION_BUF5_LEN_MASK 0xffff0000
|
||||
|
||||
/* TX completion ring MACROS */
|
||||
#define HAL_TX_COMP_TX_RATE_STATS_OFFSET 0x00000014
|
||||
#define HAL_TX_COMP_TX_RATE_STATS_LSB 0
|
||||
#define HAL_TX_COMP_TX_RATE_STATS_MASK 0xffffffff
|
||||
|
||||
#define HAL_TX_COMP_SW_PEER_ID_OFFSET 0x1c
|
||||
#define HAL_TX_COMP_SW_PEER_ID_LSB 0
|
||||
#define HAL_TX_COMP_SW_PEER_ID_MASK 0x0000ffff
|
||||
|
||||
#define HAL_TX_COMP_BUFFER_OR_DESC_TYPE_OFFSET 0x8
|
||||
#define HAL_TX_COMP_BUFFER_OR_DESC_TYPE_LSB 0x6
|
||||
#define HAL_TX_COMP_BUFFER_OR_DESC_TYPE_MASK 0x000001c0
|
||||
|
||||
#define HAL_TX_COMP_TQM_RELEASE_REASON_OFFSET 0x8
|
||||
#define HAL_TX_COMP_TQM_RELEASE_REASON_LSB 13
|
||||
#define HAL_TX_COMP_TQM_RELEASE_REASON_MASK 0x0001e000
|
||||
|
||||
#define HAL_WBM2SW_RING_RELEASE_SOURCE_MODULE_OFFSET 0x8
|
||||
#define HAL_WBM2SW_RING_RELEASE_SOURCE_MODULE_LSB 0
|
||||
#define HAL_WBM2SW_RING_RELEASE_SOURCE_MODULE_MASK 0x00000007
|
||||
|
||||
#endif /* _HAL_TX_HW_DEFINES_H_ */
|
||||
34
hal/wifi3.0/li/hal_li_hw_headers.h
Normale Datei
34
hal/wifi3.0/li/hal_li_hw_headers.h
Normale Datei
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef _HAL_LI_HW_INTERNAL_H_
|
||||
#define _HAL_LI_HW_INTERNAL_H_
|
||||
|
||||
#include "hal_hw_headers.h"
|
||||
|
||||
#include "reo_reg_seq_hwioreg.h"
|
||||
#include "mac_tcl_reg_seq_hwioreg.h"
|
||||
#include "wbm_reg_seq_hwioreg.h"
|
||||
#ifdef QCA_WIFI_QCA6490
|
||||
#include "wfss_ce_channel_dst_reg_seq_hwioreg.h"
|
||||
#include "wfss_ce_channel_src_reg_seq_hwioreg.h"
|
||||
#else
|
||||
#include "wfss_ce_reg_seq_hwioreg.h"
|
||||
#endif /* QCA_WIFI_QCA6490 */
|
||||
|
||||
#endif /* _HAL_LI_HW_INTERNAL_H_ */
|
||||
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