qcacmn: Re-configure interrupt bits once again after FW resets
Issue: Customer sees a lot of NOC errors after wifi comes up as FW resets the interrupt bits that host configured and then checks whether interrupt bits are enabled. FW then enters into MSI mode without filling the necessary MSI address and MSI data registers with proper values and this leads to lot of NOC errors on the platform. Fix description: Configure the interrupt bits one more time after FW resets the registers and then mark the host ready bit in FW indicator address CRs-Fixed: 2056198 Change-Id: I7a8871a9878b415ec90c4938df669c6225e79586
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@@ -363,6 +363,23 @@ irqreturn_t hif_ahb_interrupt_handler(int irq, void *context)
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*/
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*/
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int hif_target_sync_ahb(struct hif_softc *scn)
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int hif_target_sync_ahb(struct hif_softc *scn)
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{
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{
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int val = 0;
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int limit = 0;
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while (limit < 50) {
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hif_write32_mb(scn->mem +
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(SOC_CORE_BASE_ADDRESS | PCIE_INTR_ENABLE_ADDRESS),
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PCIE_INTR_FIRMWARE_MASK | PCIE_INTR_CE_MASK_ALL);
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qdf_mdelay(10);
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val = hif_read32_mb(scn->mem +
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(SOC_CORE_BASE_ADDRESS | PCIE_INTR_ENABLE_ADDRESS));
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if (val == 0)
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break;
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limit++;
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}
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hif_write32_mb(scn->mem +
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(SOC_CORE_BASE_ADDRESS | PCIE_INTR_ENABLE_ADDRESS),
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PCIE_INTR_FIRMWARE_MASK | PCIE_INTR_CE_MASK_ALL);
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hif_write32_mb(scn->mem + FW_INDICATOR_ADDRESS, FW_IND_HOST_READY);
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hif_write32_mb(scn->mem + FW_INDICATOR_ADDRESS, FW_IND_HOST_READY);
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if (HAS_FW_INDICATOR) {
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if (HAS_FW_INDICATOR) {
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int wait_limit = 500;
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int wait_limit = 500;
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