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@@ -5578,6 +5578,7 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
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sde_cfg->ts_prefill_rev = 2;
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sde_cfg->ts_prefill_rev = 2;
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sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0;
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sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0;
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sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_2_0_1;
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sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_2_0_1;
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+ sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_4;
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sde_cfg->sid_rev = SDE_SID_VERSION_2_0_0;
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sde_cfg->sid_rev = SDE_SID_VERSION_2_0_0;
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sde_cfg->mdss_hw_block_size = 0x158;
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sde_cfg->mdss_hw_block_size = 0x158;
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sde_cfg->demura_supported[SSPP_DMA1][0] = BIT(DEMURA_0);
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sde_cfg->demura_supported[SSPP_DMA1][0] = BIT(DEMURA_0);
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