cnss2: Disable MHI satellite if DRV is disabled

When DRV is disabled during use, MHI satellite is still enabled and
is causing timeout when suspend occurs again. Hence, set base to 0
for MHI satellite when DRV is disabled in order to disable it.

Change-Id: I68315cc102884a33b2ba92753f21af2e59b6b466
CRs-Fixed: 3256095

cnss2/bus.c

@@ -598,3 +598,39 @@ int cnss_bus_update_time_sync_period(struct cnss_plat_data *plat_priv,
 		return -EINVAL;
 	}
 }
+
+#if IS_ENABLED(CONFIG_MHI_BUS_MISC)
+void cnss_bus_disable_mhi_satellite_cfg(struct cnss_plat_data *plat_priv)
+{
+	struct cnss_pci_data *pci_priv;
+
+	pci_priv = plat_priv->bus_priv;
+	if (!pci_priv) {
+		cnss_pr_err("mhi satellite could not be disabled since pci_priv is NULL\n");
+		return;
+	}
+
+	switch (plat_priv->bus_type) {
+	case CNSS_BUS_PCI:
+		/* MHI satellite configuration is only for KIWI V2 and
+		 * that too only in DRV mode.
+		 */
+		if (plat_priv->device_id == KIWI_DEVICE_ID &&
+		    plat_priv->device_version.major_version == FW_V2_NUMBER) {
+			cnss_pr_dbg("Remove MHI satellite configuration\n");
+			return cnss_mhi_controller_set_base(pci_priv, 0);
+		}
+		break;
+	default:
+		cnss_pr_dbg("Unsupported bus type: %d, ignore disable mhi satellite cfg\n",
+			    plat_priv->bus_type);
+		return;
+	}
+
+	return;
+}
+#else
+void cnss_bus_disable_mhi_satellite_cfg(struct cnss_plat_data *pci_priv)
+{
+}
+#endif

cnss2/bus.h

@@ -72,5 +72,5 @@ int cnss_bus_get_iova_ipa(struct cnss_plat_data *plat_priv, u64 *addr,
 			  u64 *size);
 int cnss_bus_update_time_sync_period(struct cnss_plat_data *plat_priv,
 				     unsigned int time_sync_period);
-
+void cnss_bus_disable_mhi_satellite_cfg(struct cnss_plat_data *plat_priv);
 #endif /* _CNSS_BUS_H */

cnss2/main.c

@@ -1075,6 +1075,16 @@ int cnss_idle_restart(struct device *dev)
 		goto out;
 	}
 
+	/* In non-DRV mode, remove MHI satellite configuration. Switching to
+	 * non-DRV is supported only once after device reboots and before wifi
+	 * is turned on. We do not allow switching back to DRV.
+	 * To bring device back into DRV, user needs to reboot device.
+	 */
+	if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
+		cnss_pr_dbg("DRV is disabled\n");
+		cnss_bus_disable_mhi_satellite_cfg(plat_priv);
+	}
+
 	mutex_unlock(&plat_priv->driver_ops_lock);
 	return 0;
 

cnss2/pci.c

@@ -715,8 +715,8 @@ static int cnss_mhi_force_reset(struct cnss_pci_data *pci_priv)
 	return mhi_force_reset(pci_priv->mhi_ctrl);
 }
 
-static void cnss_mhi_controller_set_base(struct cnss_pci_data *pci_priv,
-					 phys_addr_t base)
+void cnss_mhi_controller_set_base(struct cnss_pci_data *pci_priv,
+				  phys_addr_t base)
 {
 	return mhi_controller_set_base(pci_priv->mhi_ctrl, base);
 }
@@ -770,8 +770,8 @@ static int cnss_mhi_force_reset(struct cnss_pci_data *pci_priv)
 	return -EOPNOTSUPP;
 }
 
-static void cnss_mhi_controller_set_base(struct cnss_pci_data *pci_priv,
-					 phys_addr_t base)
+void cnss_mhi_controller_set_base(struct cnss_pci_data *pci_priv,
+				  phys_addr_t base)
 {
 }
 #endif /* CONFIG_MHI_BUS_MISC */

cnss2/pci.h

@@ -217,6 +217,8 @@ static inline int cnss_pci_get_drv_connected(void *bus_priv)
 	return atomic_read(&pci_priv->drv_connected);
 }
 
+void cnss_mhi_controller_set_base(struct cnss_pci_data *pci_priv,
+				  phys_addr_t base);
 int cnss_pci_check_link_status(struct cnss_pci_data *pci_priv);
 int cnss_suspend_pci_link(struct cnss_pci_data *pci_priv);
 int cnss_resume_pci_link(struct cnss_pci_data *pci_priv);