main.c 109 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  34. #include "smcinvoke.h"
  35. #include "smcinvoke_object.h"
  36. #include "IClientEnv.h"
  37. #define HW_STATE_UID 0x108
  38. #define HW_OP_GET_STATE 1
  39. #define HW_WIFI_UID 0x508
  40. #define FEATURE_NOT_SUPPORTED 12
  41. #define PERIPHERAL_NOT_FOUND 10
  42. #endif
  43. #define CNSS_DUMP_FORMAT_VER 0x11
  44. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  45. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  46. #define CNSS_DUMP_NAME "CNSS_WLAN"
  47. #define CNSS_DUMP_DESC_SIZE 0x1000
  48. #define CNSS_DUMP_SEG_VER 0x1
  49. #define FILE_SYSTEM_READY 1
  50. #define FW_READY_TIMEOUT 20000
  51. #define FW_ASSERT_TIMEOUT 5000
  52. #define CNSS_EVENT_PENDING 2989
  53. #define POWER_RESET_MIN_DELAY_MS 100
  54. #define CNSS_QUIRKS_DEFAULT 0
  55. #ifdef CONFIG_CNSS_EMULATION
  56. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  57. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  58. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  59. #else
  60. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  61. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  62. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  63. #endif
  64. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  65. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  66. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  67. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  69. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  70. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  71. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  72. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  73. enum cnss_cal_db_op {
  74. CNSS_CAL_DB_UPLOAD,
  75. CNSS_CAL_DB_DOWNLOAD,
  76. CNSS_CAL_DB_INVALID_OP,
  77. };
  78. enum cnss_recovery_type {
  79. CNSS_WLAN_RECOVERY = 0x1,
  80. CNSS_PCSS_RECOVERY = 0x2,
  81. };
  82. static struct cnss_plat_data *plat_env;
  83. static bool cnss_allow_driver_loading;
  84. static DECLARE_RWSEM(cnss_pm_sem);
  85. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  86. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  87. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  88. };
  89. static struct cnss_fw_files FW_FILES_DEFAULT = {
  90. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  91. "utfbd.bin", "epping.bin", "evicted.bin"
  92. };
  93. struct cnss_driver_event {
  94. struct list_head list;
  95. enum cnss_driver_event_type type;
  96. bool sync;
  97. struct completion complete;
  98. int ret;
  99. void *data;
  100. };
  101. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  102. struct cnss_plat_data *plat_priv)
  103. {
  104. plat_env = plat_priv;
  105. }
  106. bool cnss_check_driver_loading_allowed(void)
  107. {
  108. return cnss_allow_driver_loading;
  109. }
  110. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  111. {
  112. return plat_env;
  113. }
  114. /**
  115. * cnss_get_mem_seg_count - Get segment count of memory
  116. * @type: memory type
  117. * @seg: segment count
  118. *
  119. * Return: 0 on success, negative value on failure
  120. */
  121. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  122. {
  123. struct cnss_plat_data *plat_priv;
  124. plat_priv = cnss_get_plat_priv(NULL);
  125. if (!plat_priv)
  126. return -ENODEV;
  127. switch (type) {
  128. case CNSS_REMOTE_MEM_TYPE_FW:
  129. *seg = plat_priv->fw_mem_seg_len;
  130. break;
  131. case CNSS_REMOTE_MEM_TYPE_QDSS:
  132. *seg = plat_priv->qdss_mem_seg_len;
  133. break;
  134. default:
  135. return -EINVAL;
  136. }
  137. return 0;
  138. }
  139. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  140. /**
  141. * cnss_get_mem_segment_info - Get memory info of different type
  142. * @type: memory type
  143. * @segment: array to save the segment info
  144. * @seg: segment count
  145. *
  146. * Return: 0 on success, negative value on failure
  147. */
  148. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  149. struct cnss_mem_segment segment[],
  150. u32 segment_count)
  151. {
  152. struct cnss_plat_data *plat_priv;
  153. u32 i;
  154. plat_priv = cnss_get_plat_priv(NULL);
  155. if (!plat_priv)
  156. return -ENODEV;
  157. switch (type) {
  158. case CNSS_REMOTE_MEM_TYPE_FW:
  159. if (segment_count > plat_priv->fw_mem_seg_len)
  160. segment_count = plat_priv->fw_mem_seg_len;
  161. for (i = 0; i < segment_count; i++) {
  162. segment[i].size = plat_priv->fw_mem[i].size;
  163. segment[i].va = plat_priv->fw_mem[i].va;
  164. segment[i].pa = plat_priv->fw_mem[i].pa;
  165. }
  166. break;
  167. case CNSS_REMOTE_MEM_TYPE_QDSS:
  168. if (segment_count > plat_priv->qdss_mem_seg_len)
  169. segment_count = plat_priv->qdss_mem_seg_len;
  170. for (i = 0; i < segment_count; i++) {
  171. segment[i].size = plat_priv->qdss_mem[i].size;
  172. segment[i].va = plat_priv->qdss_mem[i].va;
  173. segment[i].pa = plat_priv->qdss_mem[i].pa;
  174. }
  175. break;
  176. default:
  177. return -EINVAL;
  178. }
  179. return 0;
  180. }
  181. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  182. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  183. enum cnss_feature_v01 feature)
  184. {
  185. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  186. return -EINVAL;
  187. plat_priv->feature_list |= 1 << feature;
  188. return 0;
  189. }
  190. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  191. enum cnss_feature_v01 feature)
  192. {
  193. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  194. return -EINVAL;
  195. plat_priv->feature_list &= ~(1 << feature);
  196. return 0;
  197. }
  198. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  199. u64 *feature_list)
  200. {
  201. if (unlikely(!plat_priv))
  202. return -EINVAL;
  203. *feature_list = plat_priv->feature_list;
  204. return 0;
  205. }
  206. static int cnss_pm_notify(struct notifier_block *b,
  207. unsigned long event, void *p)
  208. {
  209. switch (event) {
  210. case PM_SUSPEND_PREPARE:
  211. down_write(&cnss_pm_sem);
  212. break;
  213. case PM_POST_SUSPEND:
  214. up_write(&cnss_pm_sem);
  215. break;
  216. }
  217. return NOTIFY_DONE;
  218. }
  219. static struct notifier_block cnss_pm_notifier = {
  220. .notifier_call = cnss_pm_notify,
  221. };
  222. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  223. {
  224. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  225. return;
  226. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  227. plat_priv->driver_state,
  228. atomic_read(&plat_priv->pm_count));
  229. pm_stay_awake(&plat_priv->plat_dev->dev);
  230. }
  231. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  232. {
  233. int r = atomic_dec_return(&plat_priv->pm_count);
  234. WARN_ON(r < 0);
  235. if (r != 0)
  236. return;
  237. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  238. plat_priv->driver_state,
  239. atomic_read(&plat_priv->pm_count));
  240. pm_relax(&plat_priv->plat_dev->dev);
  241. }
  242. void cnss_lock_pm_sem(struct device *dev)
  243. {
  244. down_read(&cnss_pm_sem);
  245. }
  246. EXPORT_SYMBOL(cnss_lock_pm_sem);
  247. void cnss_release_pm_sem(struct device *dev)
  248. {
  249. up_read(&cnss_pm_sem);
  250. }
  251. EXPORT_SYMBOL(cnss_release_pm_sem);
  252. int cnss_get_fw_files_for_target(struct device *dev,
  253. struct cnss_fw_files *pfw_files,
  254. u32 target_type, u32 target_version)
  255. {
  256. if (!pfw_files)
  257. return -ENODEV;
  258. switch (target_version) {
  259. case QCA6174_REV3_VERSION:
  260. case QCA6174_REV3_2_VERSION:
  261. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  262. break;
  263. default:
  264. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  265. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  266. target_type, target_version);
  267. break;
  268. }
  269. return 0;
  270. }
  271. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  272. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  273. {
  274. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  275. if (!plat_priv)
  276. return -ENODEV;
  277. if (!cap)
  278. return -EINVAL;
  279. *cap = plat_priv->cap;
  280. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  281. return 0;
  282. }
  283. EXPORT_SYMBOL(cnss_get_platform_cap);
  284. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  285. {
  286. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  287. if (!plat_priv)
  288. return;
  289. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  290. }
  291. EXPORT_SYMBOL(cnss_request_pm_qos);
  292. void cnss_remove_pm_qos(struct device *dev)
  293. {
  294. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  295. if (!plat_priv)
  296. return;
  297. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  298. }
  299. EXPORT_SYMBOL(cnss_remove_pm_qos);
  300. int cnss_wlan_enable(struct device *dev,
  301. struct cnss_wlan_enable_cfg *config,
  302. enum cnss_driver_mode mode,
  303. const char *host_version)
  304. {
  305. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  306. int ret = 0;
  307. if (!plat_priv)
  308. return -ENODEV;
  309. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  310. return 0;
  311. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  312. return 0;
  313. if (!config || !host_version) {
  314. cnss_pr_err("Invalid config or host_version pointer\n");
  315. return -EINVAL;
  316. }
  317. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  318. mode, config, host_version);
  319. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  320. goto skip_cfg;
  321. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  322. if (ret)
  323. goto out;
  324. skip_cfg:
  325. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  326. out:
  327. return ret;
  328. }
  329. EXPORT_SYMBOL(cnss_wlan_enable);
  330. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  331. {
  332. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  333. int ret = 0;
  334. if (!plat_priv)
  335. return -ENODEV;
  336. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  337. return 0;
  338. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  339. return 0;
  340. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  341. cnss_bus_free_qdss_mem(plat_priv);
  342. return ret;
  343. }
  344. EXPORT_SYMBOL(cnss_wlan_disable);
  345. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  346. u32 data_len, u8 *output)
  347. {
  348. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  349. int ret = 0;
  350. if (!plat_priv) {
  351. cnss_pr_err("plat_priv is NULL!\n");
  352. return -EINVAL;
  353. }
  354. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  355. return 0;
  356. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  357. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  358. plat_priv->driver_state);
  359. ret = -EINVAL;
  360. goto out;
  361. }
  362. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  363. data_len, output);
  364. out:
  365. return ret;
  366. }
  367. EXPORT_SYMBOL(cnss_athdiag_read);
  368. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  369. u32 data_len, u8 *input)
  370. {
  371. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  372. int ret = 0;
  373. if (!plat_priv) {
  374. cnss_pr_err("plat_priv is NULL!\n");
  375. return -EINVAL;
  376. }
  377. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  378. return 0;
  379. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  380. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  381. plat_priv->driver_state);
  382. ret = -EINVAL;
  383. goto out;
  384. }
  385. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  386. data_len, input);
  387. out:
  388. return ret;
  389. }
  390. EXPORT_SYMBOL(cnss_athdiag_write);
  391. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  392. {
  393. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  394. if (!plat_priv)
  395. return -ENODEV;
  396. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  397. return 0;
  398. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  399. }
  400. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  401. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  402. {
  403. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  404. if (!plat_priv)
  405. return -EINVAL;
  406. if (plat_priv->device_id != QCA6490_DEVICE_ID ||
  407. !plat_priv->fw_pcie_gen_switch)
  408. return -EOPNOTSUPP;
  409. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  410. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  411. return -EINVAL;
  412. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  413. plat_priv->pcie_gen_speed = pcie_gen_speed;
  414. return 0;
  415. }
  416. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  417. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  418. {
  419. int ret = 0;
  420. if (!plat_priv)
  421. return -ENODEV;
  422. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  423. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  424. if (ret)
  425. goto out;
  426. if (plat_priv->hds_enabled)
  427. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  428. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  429. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  430. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  431. plat_priv->ctrl_params.bdf_type);
  432. if (ret)
  433. goto out;
  434. ret = cnss_bus_load_m3(plat_priv);
  435. if (ret)
  436. goto out;
  437. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  438. if (ret)
  439. goto out;
  440. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  441. return 0;
  442. out:
  443. return ret;
  444. }
  445. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  446. {
  447. int ret = 0;
  448. if (!plat_priv->antenna) {
  449. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  450. if (ret)
  451. goto out;
  452. }
  453. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  454. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  455. if (ret)
  456. goto out;
  457. }
  458. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  459. if (ret)
  460. goto out;
  461. return 0;
  462. out:
  463. return ret;
  464. }
  465. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  466. {
  467. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  468. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  469. }
  470. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  471. {
  472. u32 i;
  473. int ret = 0;
  474. struct cnss_plat_ipc_daemon_config *cfg;
  475. ret = cnss_qmi_get_dms_mac(plat_priv);
  476. if (ret == 0 && plat_priv->dms.mac_valid)
  477. goto qmi_send;
  478. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  479. * Thus assert on failure to get MAC from DMS even after retries
  480. */
  481. if (plat_priv->use_nv_mac) {
  482. /* Check if Daemon says platform support DMS MAC provisioning */
  483. cfg = cnss_plat_ipc_qmi_daemon_config();
  484. if (cfg) {
  485. if (!cfg->dms_mac_addr_supported) {
  486. cnss_pr_err("DMS MAC address not supported\n");
  487. CNSS_ASSERT(0);
  488. return -EINVAL;
  489. }
  490. }
  491. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  492. if (plat_priv->dms.mac_valid)
  493. break;
  494. ret = cnss_qmi_get_dms_mac(plat_priv);
  495. if (ret == 0)
  496. break;
  497. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  498. }
  499. if (!plat_priv->dms.mac_valid) {
  500. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  501. CNSS_ASSERT(0);
  502. return -EINVAL;
  503. }
  504. }
  505. qmi_send:
  506. if (plat_priv->dms.mac_valid)
  507. ret =
  508. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  509. ARRAY_SIZE(plat_priv->dms.mac));
  510. return ret;
  511. }
  512. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  513. enum cnss_cal_db_op op, u32 *size)
  514. {
  515. int ret = 0;
  516. u32 timeout = cnss_get_timeout(plat_priv,
  517. CNSS_TIMEOUT_DAEMON_CONNECTION);
  518. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  519. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  520. if (op >= CNSS_CAL_DB_INVALID_OP)
  521. return -EINVAL;
  522. if (!plat_priv->cbc_file_download) {
  523. cnss_pr_info("CAL DB file not required as per BDF\n");
  524. return 0;
  525. }
  526. if (*size == 0) {
  527. cnss_pr_err("Invalid cal file size\n");
  528. return -EINVAL;
  529. }
  530. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  531. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  532. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  533. msecs_to_jiffies(timeout));
  534. if (!ret) {
  535. cnss_pr_err("Daemon not yet connected\n");
  536. CNSS_ASSERT(0);
  537. return ret;
  538. }
  539. }
  540. if (!plat_priv->cal_mem->va) {
  541. cnss_pr_err("CAL DB Memory not setup for FW\n");
  542. return -EINVAL;
  543. }
  544. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  545. if (op == CNSS_CAL_DB_DOWNLOAD) {
  546. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  547. ret = cnss_plat_ipc_qmi_file_download(client_id,
  548. CNSS_CAL_DB_FILE_NAME,
  549. plat_priv->cal_mem->va,
  550. size);
  551. } else {
  552. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  553. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  554. CNSS_CAL_DB_FILE_NAME,
  555. plat_priv->cal_mem->va,
  556. *size);
  557. }
  558. if (ret)
  559. cnss_pr_err("Cal DB file %s %s failure\n",
  560. CNSS_CAL_DB_FILE_NAME,
  561. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  562. else
  563. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  564. CNSS_CAL_DB_FILE_NAME,
  565. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  566. *size);
  567. return ret;
  568. }
  569. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  570. {
  571. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  572. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  573. return -EINVAL;
  574. }
  575. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  576. &plat_priv->cal_file_size);
  577. }
  578. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  579. u32 *cal_file_size)
  580. {
  581. /* To download pass the total size of cal DB mem allocated.
  582. * After cal file is download to mem, its size is updated in
  583. * return pointer
  584. */
  585. *cal_file_size = plat_priv->cal_mem->size;
  586. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  587. cal_file_size);
  588. }
  589. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  590. {
  591. int ret = 0;
  592. u32 cal_file_size = 0;
  593. if (!plat_priv)
  594. return -ENODEV;
  595. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  596. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  597. return -EINVAL;
  598. }
  599. cnss_pr_dbg("Processing FW Init Done..\n");
  600. del_timer(&plat_priv->fw_boot_timer);
  601. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  602. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  603. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  604. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  605. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  606. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  607. }
  608. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  609. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  610. CNSS_WALTEST);
  611. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  612. cnss_request_antenna_sharing(plat_priv);
  613. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  614. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  615. plat_priv->cal_time = jiffies;
  616. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  617. CNSS_CALIBRATION);
  618. } else {
  619. ret = cnss_setup_dms_mac(plat_priv);
  620. ret = cnss_bus_call_driver_probe(plat_priv);
  621. }
  622. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  623. goto out;
  624. else if (ret)
  625. goto shutdown;
  626. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  627. return 0;
  628. shutdown:
  629. cnss_bus_dev_shutdown(plat_priv);
  630. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  631. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  632. out:
  633. return ret;
  634. }
  635. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  636. {
  637. switch (type) {
  638. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  639. return "SERVER_ARRIVE";
  640. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  641. return "SERVER_EXIT";
  642. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  643. return "REQUEST_MEM";
  644. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  645. return "FW_MEM_READY";
  646. case CNSS_DRIVER_EVENT_FW_READY:
  647. return "FW_READY";
  648. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  649. return "COLD_BOOT_CAL_START";
  650. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  651. return "COLD_BOOT_CAL_DONE";
  652. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  653. return "REGISTER_DRIVER";
  654. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  655. return "UNREGISTER_DRIVER";
  656. case CNSS_DRIVER_EVENT_RECOVERY:
  657. return "RECOVERY";
  658. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  659. return "FORCE_FW_ASSERT";
  660. case CNSS_DRIVER_EVENT_POWER_UP:
  661. return "POWER_UP";
  662. case CNSS_DRIVER_EVENT_POWER_DOWN:
  663. return "POWER_DOWN";
  664. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  665. return "IDLE_RESTART";
  666. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  667. return "IDLE_SHUTDOWN";
  668. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  669. return "IMS_WFC_CALL_IND";
  670. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  671. return "WLFW_TWC_CFG_IND";
  672. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  673. return "QDSS_TRACE_REQ_MEM";
  674. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  675. return "FW_MEM_FILE_SAVE";
  676. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  677. return "QDSS_TRACE_FREE";
  678. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  679. return "QDSS_TRACE_REQ_DATA";
  680. case CNSS_DRIVER_EVENT_MAX:
  681. return "EVENT_MAX";
  682. }
  683. return "UNKNOWN";
  684. };
  685. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  686. enum cnss_driver_event_type type,
  687. u32 flags, void *data)
  688. {
  689. struct cnss_driver_event *event;
  690. unsigned long irq_flags;
  691. int gfp = GFP_KERNEL;
  692. int ret = 0;
  693. if (!plat_priv)
  694. return -ENODEV;
  695. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  696. cnss_driver_event_to_str(type), type,
  697. flags ? "-sync" : "", plat_priv->driver_state, flags);
  698. if (type >= CNSS_DRIVER_EVENT_MAX) {
  699. cnss_pr_err("Invalid Event type: %d, can't post", type);
  700. return -EINVAL;
  701. }
  702. if (in_interrupt() || irqs_disabled())
  703. gfp = GFP_ATOMIC;
  704. event = kzalloc(sizeof(*event), gfp);
  705. if (!event)
  706. return -ENOMEM;
  707. cnss_pm_stay_awake(plat_priv);
  708. event->type = type;
  709. event->data = data;
  710. init_completion(&event->complete);
  711. event->ret = CNSS_EVENT_PENDING;
  712. event->sync = !!(flags & CNSS_EVENT_SYNC);
  713. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  714. list_add_tail(&event->list, &plat_priv->event_list);
  715. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  716. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  717. if (!(flags & CNSS_EVENT_SYNC))
  718. goto out;
  719. if (flags & CNSS_EVENT_UNKILLABLE)
  720. wait_for_completion(&event->complete);
  721. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  722. ret = wait_for_completion_killable(&event->complete);
  723. else
  724. ret = wait_for_completion_interruptible(&event->complete);
  725. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  726. cnss_driver_event_to_str(type), type,
  727. plat_priv->driver_state, ret, event->ret);
  728. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  729. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  730. event->sync = false;
  731. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  732. ret = -EINTR;
  733. goto out;
  734. }
  735. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  736. ret = event->ret;
  737. kfree(event);
  738. out:
  739. cnss_pm_relax(plat_priv);
  740. return ret;
  741. }
  742. /**
  743. * cnss_get_timeout - Get timeout for corresponding type.
  744. * @plat_priv: Pointer to platform driver context.
  745. * @cnss_timeout_type: Timeout type.
  746. *
  747. * Return: Timeout in milliseconds.
  748. */
  749. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  750. enum cnss_timeout_type timeout_type)
  751. {
  752. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  753. switch (timeout_type) {
  754. case CNSS_TIMEOUT_QMI:
  755. return qmi_timeout;
  756. case CNSS_TIMEOUT_POWER_UP:
  757. return (qmi_timeout << 2);
  758. case CNSS_TIMEOUT_IDLE_RESTART:
  759. /* In idle restart power up sequence, we have fw_boot_timer to
  760. * handle FW initialization failure.
  761. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  762. * account for FW dump collection and FW re-initialization on
  763. * retry.
  764. */
  765. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  766. case CNSS_TIMEOUT_CALIBRATION:
  767. /* Similar to mission mode, in CBC if FW init fails
  768. * fw recovery is tried. Thus return 2x the CBC timeout.
  769. */
  770. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  771. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  772. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  773. case CNSS_TIMEOUT_RDDM:
  774. return CNSS_RDDM_TIMEOUT_MS;
  775. case CNSS_TIMEOUT_RECOVERY:
  776. return RECOVERY_TIMEOUT;
  777. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  778. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  779. default:
  780. return qmi_timeout;
  781. }
  782. }
  783. unsigned int cnss_get_boot_timeout(struct device *dev)
  784. {
  785. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  786. if (!plat_priv) {
  787. cnss_pr_err("plat_priv is NULL\n");
  788. return 0;
  789. }
  790. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  791. }
  792. EXPORT_SYMBOL(cnss_get_boot_timeout);
  793. int cnss_power_up(struct device *dev)
  794. {
  795. int ret = 0;
  796. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  797. unsigned int timeout;
  798. if (!plat_priv) {
  799. cnss_pr_err("plat_priv is NULL\n");
  800. return -ENODEV;
  801. }
  802. cnss_pr_dbg("Powering up device\n");
  803. ret = cnss_driver_event_post(plat_priv,
  804. CNSS_DRIVER_EVENT_POWER_UP,
  805. CNSS_EVENT_SYNC, NULL);
  806. if (ret)
  807. goto out;
  808. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  809. goto out;
  810. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  811. reinit_completion(&plat_priv->power_up_complete);
  812. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  813. msecs_to_jiffies(timeout));
  814. if (!ret) {
  815. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  816. timeout);
  817. ret = -EAGAIN;
  818. goto out;
  819. }
  820. return 0;
  821. out:
  822. return ret;
  823. }
  824. EXPORT_SYMBOL(cnss_power_up);
  825. int cnss_power_down(struct device *dev)
  826. {
  827. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  828. if (!plat_priv) {
  829. cnss_pr_err("plat_priv is NULL\n");
  830. return -ENODEV;
  831. }
  832. cnss_pr_dbg("Powering down device\n");
  833. return cnss_driver_event_post(plat_priv,
  834. CNSS_DRIVER_EVENT_POWER_DOWN,
  835. CNSS_EVENT_SYNC, NULL);
  836. }
  837. EXPORT_SYMBOL(cnss_power_down);
  838. int cnss_idle_restart(struct device *dev)
  839. {
  840. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  841. unsigned int timeout;
  842. int ret = 0;
  843. if (!plat_priv) {
  844. cnss_pr_err("plat_priv is NULL\n");
  845. return -ENODEV;
  846. }
  847. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  848. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  849. return -EBUSY;
  850. }
  851. cnss_pr_dbg("Doing idle restart\n");
  852. reinit_completion(&plat_priv->power_up_complete);
  853. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  854. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  855. ret = -EINVAL;
  856. goto out;
  857. }
  858. ret = cnss_driver_event_post(plat_priv,
  859. CNSS_DRIVER_EVENT_IDLE_RESTART,
  860. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  861. if (ret)
  862. goto out;
  863. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  864. ret = cnss_bus_call_driver_probe(plat_priv);
  865. goto out;
  866. }
  867. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  868. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  869. msecs_to_jiffies(timeout));
  870. if (plat_priv->power_up_error) {
  871. ret = plat_priv->power_up_error;
  872. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  873. cnss_pr_dbg("Power up error:%d, exiting\n",
  874. plat_priv->power_up_error);
  875. goto out;
  876. }
  877. if (!ret) {
  878. /* This exception occurs after attempting retry of FW recovery.
  879. * Thus we can safely power off the device.
  880. */
  881. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  882. timeout);
  883. ret = -ETIMEDOUT;
  884. cnss_power_down(dev);
  885. CNSS_ASSERT(0);
  886. goto out;
  887. }
  888. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  889. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  890. del_timer(&plat_priv->fw_boot_timer);
  891. ret = -EINVAL;
  892. goto out;
  893. }
  894. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  895. * non-DRV is supported only once after device reboots and before wifi
  896. * is turned on. We do not allow switching back to DRV.
  897. * To bring device back into DRV, user needs to reboot device.
  898. */
  899. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  900. cnss_pr_dbg("DRV is disabled\n");
  901. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  902. }
  903. mutex_unlock(&plat_priv->driver_ops_lock);
  904. return 0;
  905. out:
  906. mutex_unlock(&plat_priv->driver_ops_lock);
  907. return ret;
  908. }
  909. EXPORT_SYMBOL(cnss_idle_restart);
  910. int cnss_idle_shutdown(struct device *dev)
  911. {
  912. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  913. unsigned int timeout;
  914. int ret;
  915. if (!plat_priv) {
  916. cnss_pr_err("plat_priv is NULL\n");
  917. return -ENODEV;
  918. }
  919. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  920. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  921. return -EAGAIN;
  922. }
  923. cnss_pr_dbg("Doing idle shutdown\n");
  924. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  925. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  926. goto skip_wait;
  927. reinit_completion(&plat_priv->recovery_complete);
  928. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  929. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  930. msecs_to_jiffies(timeout));
  931. if (!ret) {
  932. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  933. timeout);
  934. CNSS_ASSERT(0);
  935. }
  936. skip_wait:
  937. return cnss_driver_event_post(plat_priv,
  938. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  939. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  940. }
  941. EXPORT_SYMBOL(cnss_idle_shutdown);
  942. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  943. {
  944. int ret = 0;
  945. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  946. if (ret) {
  947. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  948. goto out;
  949. }
  950. ret = cnss_get_clk(plat_priv);
  951. if (ret) {
  952. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  953. goto put_vreg;
  954. }
  955. ret = cnss_get_pinctrl(plat_priv);
  956. if (ret) {
  957. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  958. goto put_clk;
  959. }
  960. return 0;
  961. put_clk:
  962. cnss_put_clk(plat_priv);
  963. put_vreg:
  964. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  965. out:
  966. return ret;
  967. }
  968. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  969. {
  970. cnss_put_clk(plat_priv);
  971. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  972. }
  973. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  974. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  975. unsigned long code,
  976. void *ss_handle)
  977. {
  978. struct cnss_plat_data *plat_priv =
  979. container_of(nb, struct cnss_plat_data, modem_nb);
  980. struct cnss_esoc_info *esoc_info;
  981. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  982. if (!plat_priv)
  983. return NOTIFY_DONE;
  984. esoc_info = &plat_priv->esoc_info;
  985. if (code == SUBSYS_AFTER_POWERUP)
  986. esoc_info->modem_current_status = 1;
  987. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  988. esoc_info->modem_current_status = 0;
  989. else
  990. return NOTIFY_DONE;
  991. if (!cnss_bus_call_driver_modem_status(plat_priv,
  992. esoc_info->modem_current_status))
  993. return NOTIFY_DONE;
  994. return NOTIFY_OK;
  995. }
  996. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  997. {
  998. int ret = 0;
  999. struct device *dev;
  1000. struct cnss_esoc_info *esoc_info;
  1001. struct esoc_desc *esoc_desc;
  1002. const char *client_desc;
  1003. dev = &plat_priv->plat_dev->dev;
  1004. esoc_info = &plat_priv->esoc_info;
  1005. esoc_info->notify_modem_status =
  1006. of_property_read_bool(dev->of_node,
  1007. "qcom,notify-modem-status");
  1008. if (!esoc_info->notify_modem_status)
  1009. goto out;
  1010. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1011. &client_desc);
  1012. if (ret) {
  1013. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1014. } else {
  1015. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1016. if (IS_ERR_OR_NULL(esoc_desc)) {
  1017. ret = PTR_RET(esoc_desc);
  1018. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1019. ret);
  1020. goto out;
  1021. }
  1022. esoc_info->esoc_desc = esoc_desc;
  1023. }
  1024. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1025. esoc_info->modem_current_status = 0;
  1026. esoc_info->modem_notify_handler =
  1027. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1028. esoc_info->esoc_desc->name :
  1029. "modem", &plat_priv->modem_nb);
  1030. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1031. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1032. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1033. ret);
  1034. goto unreg_esoc;
  1035. }
  1036. return 0;
  1037. unreg_esoc:
  1038. if (esoc_info->esoc_desc)
  1039. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1040. out:
  1041. return ret;
  1042. }
  1043. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1044. {
  1045. struct device *dev;
  1046. struct cnss_esoc_info *esoc_info;
  1047. dev = &plat_priv->plat_dev->dev;
  1048. esoc_info = &plat_priv->esoc_info;
  1049. if (esoc_info->notify_modem_status)
  1050. subsys_notif_unregister_notifier
  1051. (esoc_info->modem_notify_handler,
  1052. &plat_priv->modem_nb);
  1053. if (esoc_info->esoc_desc)
  1054. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1055. }
  1056. #else
  1057. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1058. {
  1059. return 0;
  1060. }
  1061. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1062. #endif
  1063. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1064. {
  1065. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1066. int ret = 0;
  1067. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1068. return 0;
  1069. enable_irq(sol_gpio->dev_sol_irq);
  1070. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1071. if (ret)
  1072. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1073. ret);
  1074. return ret;
  1075. }
  1076. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1077. {
  1078. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1079. int ret = 0;
  1080. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1081. return 0;
  1082. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1083. if (ret)
  1084. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1085. ret);
  1086. disable_irq(sol_gpio->dev_sol_irq);
  1087. return ret;
  1088. }
  1089. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1090. {
  1091. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1092. if (sol_gpio->dev_sol_gpio < 0)
  1093. return -EINVAL;
  1094. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1095. }
  1096. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1097. {
  1098. struct cnss_plat_data *plat_priv = data;
  1099. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1100. sol_gpio->dev_sol_counter++;
  1101. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1102. irq, sol_gpio->dev_sol_counter);
  1103. /* Make sure abort current suspend */
  1104. cnss_pm_stay_awake(plat_priv);
  1105. cnss_pm_relax(plat_priv);
  1106. pm_system_wakeup();
  1107. cnss_bus_handle_dev_sol_irq(plat_priv);
  1108. return IRQ_HANDLED;
  1109. }
  1110. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1111. {
  1112. struct device *dev = &plat_priv->plat_dev->dev;
  1113. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1114. int ret = 0;
  1115. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1116. "wlan-dev-sol-gpio", 0);
  1117. if (sol_gpio->dev_sol_gpio < 0)
  1118. goto out;
  1119. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1120. sol_gpio->dev_sol_gpio);
  1121. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1122. if (ret) {
  1123. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1124. ret);
  1125. goto out;
  1126. }
  1127. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1128. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1129. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1130. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1131. if (ret) {
  1132. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1133. goto free_gpio;
  1134. }
  1135. return 0;
  1136. free_gpio:
  1137. gpio_free(sol_gpio->dev_sol_gpio);
  1138. out:
  1139. return ret;
  1140. }
  1141. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1142. {
  1143. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1144. if (sol_gpio->dev_sol_gpio < 0)
  1145. return;
  1146. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1147. gpio_free(sol_gpio->dev_sol_gpio);
  1148. }
  1149. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1150. {
  1151. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1152. if (sol_gpio->host_sol_gpio < 0)
  1153. return -EINVAL;
  1154. if (value)
  1155. cnss_pr_dbg("Assert host SOL GPIO\n");
  1156. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1157. return 0;
  1158. }
  1159. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1160. {
  1161. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1162. if (sol_gpio->host_sol_gpio < 0)
  1163. return -EINVAL;
  1164. return gpio_get_value(sol_gpio->host_sol_gpio);
  1165. }
  1166. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1167. {
  1168. struct device *dev = &plat_priv->plat_dev->dev;
  1169. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1170. int ret = 0;
  1171. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1172. "wlan-host-sol-gpio", 0);
  1173. if (sol_gpio->host_sol_gpio < 0)
  1174. goto out;
  1175. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1176. sol_gpio->host_sol_gpio);
  1177. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1178. if (ret) {
  1179. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1180. ret);
  1181. goto out;
  1182. }
  1183. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1184. return 0;
  1185. out:
  1186. return ret;
  1187. }
  1188. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1189. {
  1190. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1191. if (sol_gpio->host_sol_gpio < 0)
  1192. return;
  1193. gpio_free(sol_gpio->host_sol_gpio);
  1194. }
  1195. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1196. {
  1197. int ret;
  1198. ret = cnss_init_dev_sol_gpio(plat_priv);
  1199. if (ret)
  1200. goto out;
  1201. ret = cnss_init_host_sol_gpio(plat_priv);
  1202. if (ret)
  1203. goto deinit_dev_sol;
  1204. return 0;
  1205. deinit_dev_sol:
  1206. cnss_deinit_dev_sol_gpio(plat_priv);
  1207. out:
  1208. return ret;
  1209. }
  1210. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1211. {
  1212. cnss_deinit_host_sol_gpio(plat_priv);
  1213. cnss_deinit_dev_sol_gpio(plat_priv);
  1214. }
  1215. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1216. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1217. {
  1218. struct cnss_plat_data *plat_priv;
  1219. int ret = 0;
  1220. if (!subsys_desc->dev) {
  1221. cnss_pr_err("dev from subsys_desc is NULL\n");
  1222. return -ENODEV;
  1223. }
  1224. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1225. if (!plat_priv) {
  1226. cnss_pr_err("plat_priv is NULL\n");
  1227. return -ENODEV;
  1228. }
  1229. if (!plat_priv->driver_state) {
  1230. cnss_pr_dbg("Powerup is ignored\n");
  1231. return 0;
  1232. }
  1233. ret = cnss_bus_dev_powerup(plat_priv);
  1234. if (ret)
  1235. __pm_relax(plat_priv->recovery_ws);
  1236. return ret;
  1237. }
  1238. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1239. bool force_stop)
  1240. {
  1241. struct cnss_plat_data *plat_priv;
  1242. if (!subsys_desc->dev) {
  1243. cnss_pr_err("dev from subsys_desc is NULL\n");
  1244. return -ENODEV;
  1245. }
  1246. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1247. if (!plat_priv) {
  1248. cnss_pr_err("plat_priv is NULL\n");
  1249. return -ENODEV;
  1250. }
  1251. if (!plat_priv->driver_state) {
  1252. cnss_pr_dbg("shutdown is ignored\n");
  1253. return 0;
  1254. }
  1255. return cnss_bus_dev_shutdown(plat_priv);
  1256. }
  1257. void cnss_device_crashed(struct device *dev)
  1258. {
  1259. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1260. struct cnss_subsys_info *subsys_info;
  1261. if (!plat_priv)
  1262. return;
  1263. subsys_info = &plat_priv->subsys_info;
  1264. if (subsys_info->subsys_device) {
  1265. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1266. subsys_set_crash_status(subsys_info->subsys_device, true);
  1267. subsystem_restart_dev(subsys_info->subsys_device);
  1268. }
  1269. }
  1270. EXPORT_SYMBOL(cnss_device_crashed);
  1271. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1272. {
  1273. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1274. if (!plat_priv) {
  1275. cnss_pr_err("plat_priv is NULL\n");
  1276. return;
  1277. }
  1278. cnss_bus_dev_crash_shutdown(plat_priv);
  1279. }
  1280. static int cnss_subsys_ramdump(int enable,
  1281. const struct subsys_desc *subsys_desc)
  1282. {
  1283. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1284. if (!plat_priv) {
  1285. cnss_pr_err("plat_priv is NULL\n");
  1286. return -ENODEV;
  1287. }
  1288. if (!enable)
  1289. return 0;
  1290. return cnss_bus_dev_ramdump(plat_priv);
  1291. }
  1292. static void cnss_recovery_work_handler(struct work_struct *work)
  1293. {
  1294. }
  1295. #else
  1296. static void cnss_recovery_work_handler(struct work_struct *work)
  1297. {
  1298. int ret;
  1299. struct cnss_plat_data *plat_priv =
  1300. container_of(work, struct cnss_plat_data, recovery_work);
  1301. if (!plat_priv->recovery_enabled)
  1302. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1303. cnss_bus_dev_shutdown(plat_priv);
  1304. cnss_bus_dev_ramdump(plat_priv);
  1305. msleep(POWER_RESET_MIN_DELAY_MS);
  1306. ret = cnss_bus_dev_powerup(plat_priv);
  1307. if (ret)
  1308. __pm_relax(plat_priv->recovery_ws);
  1309. return;
  1310. }
  1311. void cnss_device_crashed(struct device *dev)
  1312. {
  1313. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1314. if (!plat_priv)
  1315. return;
  1316. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1317. schedule_work(&plat_priv->recovery_work);
  1318. }
  1319. EXPORT_SYMBOL(cnss_device_crashed);
  1320. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1321. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1322. {
  1323. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1324. struct cnss_ramdump_info *ramdump_info;
  1325. if (!plat_priv)
  1326. return NULL;
  1327. ramdump_info = &plat_priv->ramdump_info;
  1328. *size = ramdump_info->ramdump_size;
  1329. return ramdump_info->ramdump_va;
  1330. }
  1331. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1332. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1333. {
  1334. switch (reason) {
  1335. case CNSS_REASON_DEFAULT:
  1336. return "DEFAULT";
  1337. case CNSS_REASON_LINK_DOWN:
  1338. return "LINK_DOWN";
  1339. case CNSS_REASON_RDDM:
  1340. return "RDDM";
  1341. case CNSS_REASON_TIMEOUT:
  1342. return "TIMEOUT";
  1343. }
  1344. return "UNKNOWN";
  1345. };
  1346. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1347. enum cnss_recovery_reason reason)
  1348. {
  1349. plat_priv->recovery_count++;
  1350. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1351. goto self_recovery;
  1352. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1353. cnss_pr_dbg("Skip device recovery\n");
  1354. return 0;
  1355. }
  1356. /* FW recovery sequence has multiple steps and firmware load requires
  1357. * linux PM in awake state. Thus hold the cnss wake source until
  1358. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1359. * time taken in this process.
  1360. */
  1361. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1362. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1363. true);
  1364. switch (reason) {
  1365. case CNSS_REASON_LINK_DOWN:
  1366. if (!cnss_bus_check_link_status(plat_priv)) {
  1367. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1368. return 0;
  1369. }
  1370. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1371. &plat_priv->ctrl_params.quirks))
  1372. goto self_recovery;
  1373. if (!cnss_bus_recover_link_down(plat_priv)) {
  1374. /* clear recovery bit here to avoid skipping
  1375. * the recovery work for RDDM later
  1376. */
  1377. clear_bit(CNSS_DRIVER_RECOVERY,
  1378. &plat_priv->driver_state);
  1379. return 0;
  1380. }
  1381. break;
  1382. case CNSS_REASON_RDDM:
  1383. cnss_bus_collect_dump_info(plat_priv, false);
  1384. break;
  1385. case CNSS_REASON_DEFAULT:
  1386. case CNSS_REASON_TIMEOUT:
  1387. break;
  1388. default:
  1389. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1390. cnss_recovery_reason_to_str(reason), reason);
  1391. break;
  1392. }
  1393. cnss_bus_device_crashed(plat_priv);
  1394. return 0;
  1395. self_recovery:
  1396. cnss_pr_dbg("Going for self recovery\n");
  1397. cnss_bus_dev_shutdown(plat_priv);
  1398. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1399. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1400. &plat_priv->ctrl_params.quirks);
  1401. cnss_bus_dev_powerup(plat_priv);
  1402. return 0;
  1403. }
  1404. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1405. void *data)
  1406. {
  1407. struct cnss_recovery_data *recovery_data = data;
  1408. int ret = 0;
  1409. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1410. cnss_recovery_reason_to_str(recovery_data->reason),
  1411. recovery_data->reason);
  1412. if (!plat_priv->driver_state) {
  1413. cnss_pr_err("Improper driver state, ignore recovery\n");
  1414. ret = -EINVAL;
  1415. goto out;
  1416. }
  1417. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1418. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1419. ret = -EINVAL;
  1420. goto out;
  1421. }
  1422. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1423. cnss_pr_err("Recovery is already in progress\n");
  1424. CNSS_ASSERT(0);
  1425. ret = -EINVAL;
  1426. goto out;
  1427. }
  1428. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1429. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1430. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1431. ret = -EINVAL;
  1432. goto out;
  1433. }
  1434. switch (plat_priv->device_id) {
  1435. case QCA6174_DEVICE_ID:
  1436. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1437. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1438. &plat_priv->driver_state)) {
  1439. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1440. ret = -EINVAL;
  1441. goto out;
  1442. }
  1443. break;
  1444. default:
  1445. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1446. set_bit(CNSS_FW_BOOT_RECOVERY,
  1447. &plat_priv->driver_state);
  1448. }
  1449. break;
  1450. }
  1451. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1452. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1453. out:
  1454. kfree(data);
  1455. return ret;
  1456. }
  1457. int cnss_self_recovery(struct device *dev,
  1458. enum cnss_recovery_reason reason)
  1459. {
  1460. cnss_schedule_recovery(dev, reason);
  1461. return 0;
  1462. }
  1463. EXPORT_SYMBOL(cnss_self_recovery);
  1464. void cnss_schedule_recovery(struct device *dev,
  1465. enum cnss_recovery_reason reason)
  1466. {
  1467. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1468. struct cnss_recovery_data *data;
  1469. int gfp = GFP_KERNEL;
  1470. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1471. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1472. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1473. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1474. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1475. return;
  1476. }
  1477. if (in_interrupt() || irqs_disabled())
  1478. gfp = GFP_ATOMIC;
  1479. data = kzalloc(sizeof(*data), gfp);
  1480. if (!data)
  1481. return;
  1482. data->reason = reason;
  1483. cnss_driver_event_post(plat_priv,
  1484. CNSS_DRIVER_EVENT_RECOVERY,
  1485. 0, data);
  1486. }
  1487. EXPORT_SYMBOL(cnss_schedule_recovery);
  1488. int cnss_force_fw_assert(struct device *dev)
  1489. {
  1490. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1491. if (!plat_priv) {
  1492. cnss_pr_err("plat_priv is NULL\n");
  1493. return -ENODEV;
  1494. }
  1495. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1496. cnss_pr_info("Forced FW assert is not supported\n");
  1497. return -EOPNOTSUPP;
  1498. }
  1499. if (cnss_bus_is_device_down(plat_priv)) {
  1500. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1501. return 0;
  1502. }
  1503. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1504. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1505. return 0;
  1506. }
  1507. if (in_interrupt() || irqs_disabled())
  1508. cnss_driver_event_post(plat_priv,
  1509. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1510. 0, NULL);
  1511. else
  1512. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1513. return 0;
  1514. }
  1515. EXPORT_SYMBOL(cnss_force_fw_assert);
  1516. int cnss_force_collect_rddm(struct device *dev)
  1517. {
  1518. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1519. unsigned int timeout;
  1520. int ret = 0;
  1521. if (!plat_priv) {
  1522. cnss_pr_err("plat_priv is NULL\n");
  1523. return -ENODEV;
  1524. }
  1525. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1526. cnss_pr_info("Force collect rddm is not supported\n");
  1527. return -EOPNOTSUPP;
  1528. }
  1529. if (cnss_bus_is_device_down(plat_priv)) {
  1530. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1531. goto wait_rddm;
  1532. }
  1533. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1534. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1535. goto wait_rddm;
  1536. }
  1537. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1538. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1539. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1540. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1541. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1542. return 0;
  1543. }
  1544. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1545. if (ret)
  1546. return ret;
  1547. wait_rddm:
  1548. reinit_completion(&plat_priv->rddm_complete);
  1549. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1550. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1551. msecs_to_jiffies(timeout));
  1552. if (!ret) {
  1553. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1554. timeout);
  1555. ret = -ETIMEDOUT;
  1556. } else if (ret > 0) {
  1557. ret = 0;
  1558. }
  1559. return ret;
  1560. }
  1561. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1562. int cnss_qmi_send_get(struct device *dev)
  1563. {
  1564. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1565. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1566. return 0;
  1567. return cnss_bus_qmi_send_get(plat_priv);
  1568. }
  1569. EXPORT_SYMBOL(cnss_qmi_send_get);
  1570. int cnss_qmi_send_put(struct device *dev)
  1571. {
  1572. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1573. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1574. return 0;
  1575. return cnss_bus_qmi_send_put(plat_priv);
  1576. }
  1577. EXPORT_SYMBOL(cnss_qmi_send_put);
  1578. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1579. int cmd_len, void *cb_ctx,
  1580. int (*cb)(void *ctx, void *event, int event_len))
  1581. {
  1582. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1583. int ret;
  1584. if (!plat_priv)
  1585. return -ENODEV;
  1586. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1587. return -EINVAL;
  1588. plat_priv->get_info_cb = cb;
  1589. plat_priv->get_info_cb_ctx = cb_ctx;
  1590. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1591. if (ret) {
  1592. plat_priv->get_info_cb = NULL;
  1593. plat_priv->get_info_cb_ctx = NULL;
  1594. }
  1595. return ret;
  1596. }
  1597. EXPORT_SYMBOL(cnss_qmi_send);
  1598. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1599. {
  1600. int ret = 0;
  1601. u32 retry = 0, timeout;
  1602. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1603. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1604. goto out;
  1605. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1606. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1607. goto out;
  1608. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1609. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1610. goto out;
  1611. }
  1612. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1613. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1614. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1615. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1616. CNSS_ASSERT(0);
  1617. return -EINVAL;
  1618. }
  1619. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1620. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1621. break;
  1622. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1623. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1624. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1625. CNSS_ASSERT(0);
  1626. ret = -EINVAL;
  1627. goto mark_cal_fail;
  1628. }
  1629. }
  1630. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1631. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1632. timeout = cnss_get_timeout(plat_priv,
  1633. CNSS_TIMEOUT_CALIBRATION);
  1634. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1635. timeout / 1000);
  1636. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1637. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1638. msecs_to_jiffies(timeout));
  1639. }
  1640. reinit_completion(&plat_priv->cal_complete);
  1641. ret = cnss_bus_dev_powerup(plat_priv);
  1642. mark_cal_fail:
  1643. if (ret) {
  1644. complete(&plat_priv->cal_complete);
  1645. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1646. /* Set CBC done in driver state to mark attempt and note error
  1647. * since calibration cannot be retried at boot.
  1648. */
  1649. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1650. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1651. }
  1652. out:
  1653. return ret;
  1654. }
  1655. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1656. void *data)
  1657. {
  1658. struct cnss_cal_info *cal_info = data;
  1659. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1660. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1661. goto out;
  1662. switch (cal_info->cal_status) {
  1663. case CNSS_CAL_DONE:
  1664. cnss_pr_dbg("Calibration completed successfully\n");
  1665. plat_priv->cal_done = true;
  1666. break;
  1667. case CNSS_CAL_TIMEOUT:
  1668. case CNSS_CAL_FAILURE:
  1669. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1670. cal_info->cal_status);
  1671. break;
  1672. default:
  1673. cnss_pr_err("Unknown calibration status: %u\n",
  1674. cal_info->cal_status);
  1675. break;
  1676. }
  1677. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1678. cnss_bus_free_qdss_mem(plat_priv);
  1679. cnss_release_antenna_sharing(plat_priv);
  1680. cnss_bus_dev_shutdown(plat_priv);
  1681. msleep(POWER_RESET_MIN_DELAY_MS);
  1682. complete(&plat_priv->cal_complete);
  1683. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1684. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1685. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1686. cnss_cal_mem_upload_to_file(plat_priv);
  1687. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1688. goto out;
  1689. cnss_pr_dbg("Schedule WLAN driver load\n");
  1690. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1691. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1692. 0);
  1693. }
  1694. out:
  1695. kfree(data);
  1696. return 0;
  1697. }
  1698. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1699. {
  1700. int ret;
  1701. ret = cnss_bus_dev_powerup(plat_priv);
  1702. if (ret)
  1703. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1704. return ret;
  1705. }
  1706. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1707. {
  1708. cnss_bus_dev_shutdown(plat_priv);
  1709. return 0;
  1710. }
  1711. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1712. {
  1713. int ret = 0;
  1714. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1715. if (ret < 0)
  1716. return ret;
  1717. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1718. }
  1719. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1720. u32 mem_seg_len, u64 pa, u32 size)
  1721. {
  1722. int i = 0;
  1723. u64 offset = 0;
  1724. void *va = NULL;
  1725. u64 local_pa;
  1726. u32 local_size;
  1727. for (i = 0; i < mem_seg_len; i++) {
  1728. local_pa = (u64)fw_mem[i].pa;
  1729. local_size = (u32)fw_mem[i].size;
  1730. if (pa == local_pa && size <= local_size) {
  1731. va = fw_mem[i].va;
  1732. break;
  1733. }
  1734. if (pa > local_pa &&
  1735. pa < local_pa + local_size &&
  1736. pa + size <= local_pa + local_size) {
  1737. offset = pa - local_pa;
  1738. va = fw_mem[i].va + offset;
  1739. break;
  1740. }
  1741. }
  1742. return va;
  1743. }
  1744. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1745. void *data)
  1746. {
  1747. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1748. struct cnss_fw_mem *fw_mem_seg;
  1749. int ret = 0L;
  1750. void *va = NULL;
  1751. u32 i, fw_mem_seg_len;
  1752. switch (event_data->mem_type) {
  1753. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1754. if (!plat_priv->fw_mem_seg_len)
  1755. goto invalid_mem_save;
  1756. fw_mem_seg = plat_priv->fw_mem;
  1757. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1758. break;
  1759. case QMI_WLFW_MEM_QDSS_V01:
  1760. if (!plat_priv->qdss_mem_seg_len)
  1761. goto invalid_mem_save;
  1762. fw_mem_seg = plat_priv->qdss_mem;
  1763. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1764. break;
  1765. default:
  1766. goto invalid_mem_save;
  1767. }
  1768. for (i = 0; i < event_data->mem_seg_len; i++) {
  1769. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1770. event_data->mem_seg[i].addr,
  1771. event_data->mem_seg[i].size);
  1772. if (!va) {
  1773. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1774. &event_data->mem_seg[i].addr,
  1775. event_data->mem_type);
  1776. ret = -EINVAL;
  1777. break;
  1778. }
  1779. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1780. event_data->file_name,
  1781. event_data->mem_seg[i].size);
  1782. if (ret < 0) {
  1783. cnss_pr_err("Fail to save fw mem data: %d\n",
  1784. ret);
  1785. break;
  1786. }
  1787. }
  1788. kfree(data);
  1789. return ret;
  1790. invalid_mem_save:
  1791. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1792. event_data->mem_type);
  1793. kfree(data);
  1794. return -EINVAL;
  1795. }
  1796. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1797. {
  1798. cnss_bus_free_qdss_mem(plat_priv);
  1799. return 0;
  1800. }
  1801. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1802. void *data)
  1803. {
  1804. int ret = 0;
  1805. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1806. if (!plat_priv)
  1807. return -ENODEV;
  1808. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1809. event_data->total_size);
  1810. kfree(data);
  1811. return ret;
  1812. }
  1813. static void cnss_driver_event_work(struct work_struct *work)
  1814. {
  1815. struct cnss_plat_data *plat_priv =
  1816. container_of(work, struct cnss_plat_data, event_work);
  1817. struct cnss_driver_event *event;
  1818. unsigned long flags;
  1819. int ret = 0;
  1820. if (!plat_priv) {
  1821. cnss_pr_err("plat_priv is NULL!\n");
  1822. return;
  1823. }
  1824. cnss_pm_stay_awake(plat_priv);
  1825. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1826. while (!list_empty(&plat_priv->event_list)) {
  1827. event = list_first_entry(&plat_priv->event_list,
  1828. struct cnss_driver_event, list);
  1829. list_del(&event->list);
  1830. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1831. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1832. cnss_driver_event_to_str(event->type),
  1833. event->sync ? "-sync" : "", event->type,
  1834. plat_priv->driver_state);
  1835. switch (event->type) {
  1836. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1837. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1838. break;
  1839. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1840. ret = cnss_wlfw_server_exit(plat_priv);
  1841. break;
  1842. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1843. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1844. if (ret)
  1845. break;
  1846. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1847. break;
  1848. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1849. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1850. break;
  1851. case CNSS_DRIVER_EVENT_FW_READY:
  1852. ret = cnss_fw_ready_hdlr(plat_priv);
  1853. break;
  1854. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1855. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1856. break;
  1857. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1858. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1859. event->data);
  1860. break;
  1861. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1862. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1863. event->data);
  1864. break;
  1865. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1866. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1867. break;
  1868. case CNSS_DRIVER_EVENT_RECOVERY:
  1869. ret = cnss_driver_recovery_hdlr(plat_priv,
  1870. event->data);
  1871. break;
  1872. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1873. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1874. break;
  1875. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1876. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1877. &plat_priv->driver_state);
  1878. /* fall through */
  1879. case CNSS_DRIVER_EVENT_POWER_UP:
  1880. ret = cnss_power_up_hdlr(plat_priv);
  1881. break;
  1882. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1883. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1884. &plat_priv->driver_state);
  1885. /* fall through */
  1886. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1887. ret = cnss_power_down_hdlr(plat_priv);
  1888. break;
  1889. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1890. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1891. event->data);
  1892. break;
  1893. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1894. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1895. event->data);
  1896. break;
  1897. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1898. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  1899. break;
  1900. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1901. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  1902. event->data);
  1903. break;
  1904. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1905. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  1906. break;
  1907. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1908. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  1909. event->data);
  1910. break;
  1911. default:
  1912. cnss_pr_err("Invalid driver event type: %d",
  1913. event->type);
  1914. kfree(event);
  1915. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1916. continue;
  1917. }
  1918. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1919. if (event->sync) {
  1920. event->ret = ret;
  1921. complete(&event->complete);
  1922. continue;
  1923. }
  1924. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1925. kfree(event);
  1926. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1927. }
  1928. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1929. cnss_pm_relax(plat_priv);
  1930. }
  1931. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1932. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1933. {
  1934. int ret = 0;
  1935. struct cnss_subsys_info *subsys_info;
  1936. subsys_info = &plat_priv->subsys_info;
  1937. subsys_info->subsys_desc.name = "wlan";
  1938. subsys_info->subsys_desc.owner = THIS_MODULE;
  1939. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  1940. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  1941. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  1942. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  1943. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  1944. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  1945. if (IS_ERR(subsys_info->subsys_device)) {
  1946. ret = PTR_ERR(subsys_info->subsys_device);
  1947. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  1948. goto out;
  1949. }
  1950. subsys_info->subsys_handle =
  1951. subsystem_get(subsys_info->subsys_desc.name);
  1952. if (!subsys_info->subsys_handle) {
  1953. cnss_pr_err("Failed to get subsys_handle!\n");
  1954. ret = -EINVAL;
  1955. goto unregister_subsys;
  1956. } else if (IS_ERR(subsys_info->subsys_handle)) {
  1957. ret = PTR_ERR(subsys_info->subsys_handle);
  1958. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  1959. goto unregister_subsys;
  1960. }
  1961. return 0;
  1962. unregister_subsys:
  1963. subsys_unregister(subsys_info->subsys_device);
  1964. out:
  1965. return ret;
  1966. }
  1967. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1968. {
  1969. struct cnss_subsys_info *subsys_info;
  1970. subsys_info = &plat_priv->subsys_info;
  1971. subsystem_put(subsys_info->subsys_handle);
  1972. subsys_unregister(subsys_info->subsys_device);
  1973. }
  1974. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1975. {
  1976. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  1977. return create_ramdump_device(subsys_info->subsys_desc.name,
  1978. subsys_info->subsys_desc.dev);
  1979. }
  1980. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1981. void *ramdump_dev)
  1982. {
  1983. destroy_ramdump_device(ramdump_dev);
  1984. }
  1985. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1986. {
  1987. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1988. struct ramdump_segment segment;
  1989. memset(&segment, 0, sizeof(segment));
  1990. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  1991. segment.size = ramdump_info->ramdump_size;
  1992. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  1993. }
  1994. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1995. {
  1996. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  1997. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  1998. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  1999. struct ramdump_segment *ramdump_segs, *s;
  2000. struct cnss_dump_meta_info meta_info = {0};
  2001. int i, ret = 0;
  2002. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2003. sizeof(*ramdump_segs),
  2004. GFP_KERNEL);
  2005. if (!ramdump_segs)
  2006. return -ENOMEM;
  2007. s = ramdump_segs + 1;
  2008. for (i = 0; i < dump_data->nentries; i++) {
  2009. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2010. cnss_pr_err("Unsupported dump type: %d",
  2011. dump_seg->type);
  2012. continue;
  2013. }
  2014. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2015. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2016. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2017. }
  2018. meta_info.entry[dump_seg->type].entry_num++;
  2019. s->address = dump_seg->address;
  2020. s->v_address = (void __iomem *)dump_seg->v_address;
  2021. s->size = dump_seg->size;
  2022. s++;
  2023. dump_seg++;
  2024. }
  2025. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2026. meta_info.version = CNSS_RAMDUMP_VERSION;
  2027. meta_info.chipset = plat_priv->device_id;
  2028. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2029. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2030. ramdump_segs->size = sizeof(meta_info);
  2031. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2032. dump_data->nentries + 1);
  2033. kfree(ramdump_segs);
  2034. return ret;
  2035. }
  2036. #else
  2037. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2038. void *data)
  2039. {
  2040. struct cnss_plat_data *plat_priv =
  2041. container_of(nb, struct cnss_plat_data, panic_nb);
  2042. cnss_bus_dev_crash_shutdown(plat_priv);
  2043. return NOTIFY_DONE;
  2044. }
  2045. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2046. {
  2047. int ret;
  2048. if (!plat_priv)
  2049. return -ENODEV;
  2050. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2051. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2052. &plat_priv->panic_nb);
  2053. if (ret) {
  2054. cnss_pr_err("Failed to register panic handler\n");
  2055. return -EINVAL;
  2056. }
  2057. return 0;
  2058. }
  2059. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2060. {
  2061. int ret;
  2062. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2063. &plat_priv->panic_nb);
  2064. if (ret)
  2065. cnss_pr_err("Failed to unregister panic handler\n");
  2066. }
  2067. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2068. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2069. {
  2070. return &plat_priv->plat_dev->dev;
  2071. }
  2072. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2073. void *ramdump_dev)
  2074. {
  2075. }
  2076. #endif
  2077. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2078. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2079. {
  2080. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2081. struct qcom_dump_segment segment;
  2082. struct list_head head;
  2083. INIT_LIST_HEAD(&head);
  2084. memset(&segment, 0, sizeof(segment));
  2085. segment.va = ramdump_info->ramdump_va;
  2086. segment.size = ramdump_info->ramdump_size;
  2087. list_add(&segment.node, &head);
  2088. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2089. }
  2090. #else
  2091. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2092. {
  2093. return 0;
  2094. }
  2095. /* Using completion event inside dynamically allocated ramdump_desc
  2096. * may result a race between freeing the event after setting it to
  2097. * complete inside dev coredump free callback and the thread that is
  2098. * waiting for completion.
  2099. */
  2100. DECLARE_COMPLETION(dump_done);
  2101. #define TIMEOUT_SAVE_DUMP_MS 30000
  2102. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2103. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2104. { \
  2105. if (class == ELFCLASS32) \
  2106. return sizeof(struct elf32_##__xhdr); \
  2107. else \
  2108. return sizeof(struct elf64_##__xhdr); \
  2109. }
  2110. SIZEOF_ELF_STRUCT(phdr)
  2111. SIZEOF_ELF_STRUCT(hdr)
  2112. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2113. do { \
  2114. if (class == ELFCLASS32) \
  2115. ((struct elf32_##__xhdr *)arg)->member = value; \
  2116. else \
  2117. ((struct elf64_##__xhdr *)arg)->member = value; \
  2118. } while (0)
  2119. #define set_ehdr_property(arg, class, member, value) \
  2120. set_xhdr_property(hdr, arg, class, member, value)
  2121. #define set_phdr_property(arg, class, member, value) \
  2122. set_xhdr_property(phdr, arg, class, member, value)
  2123. /* These replace qcom_ramdump driver APIs called from common API
  2124. * cnss_do_elf_dump() by the ones defined here.
  2125. */
  2126. #define qcom_dump_segment cnss_qcom_dump_segment
  2127. #define qcom_elf_dump cnss_qcom_elf_dump
  2128. #define dump_enabled cnss_dump_enabled
  2129. struct cnss_qcom_dump_segment {
  2130. struct list_head node;
  2131. dma_addr_t da;
  2132. void *va;
  2133. size_t size;
  2134. };
  2135. struct cnss_qcom_ramdump_desc {
  2136. void *data;
  2137. struct completion dump_done;
  2138. };
  2139. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2140. void *data, size_t datalen)
  2141. {
  2142. struct cnss_qcom_ramdump_desc *desc = data;
  2143. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2144. datalen);
  2145. }
  2146. static void cnss_qcom_devcd_freev(void *data)
  2147. {
  2148. struct cnss_qcom_ramdump_desc *desc = data;
  2149. cnss_pr_dbg("Free dump data for dev coredump\n");
  2150. complete(&dump_done);
  2151. vfree(desc->data);
  2152. kfree(desc);
  2153. }
  2154. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2155. gfp_t gfp)
  2156. {
  2157. struct cnss_qcom_ramdump_desc *desc;
  2158. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2159. int ret;
  2160. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2161. if (!desc)
  2162. return -ENOMEM;
  2163. desc->data = data;
  2164. reinit_completion(&dump_done);
  2165. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2166. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2167. ret = wait_for_completion_timeout(&dump_done,
  2168. msecs_to_jiffies(timeout));
  2169. if (!ret)
  2170. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2171. timeout);
  2172. return ret ? 0 : -ETIMEDOUT;
  2173. }
  2174. /* Since the elf32 and elf64 identification is identical apart from
  2175. * the class, use elf32 by default.
  2176. */
  2177. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2178. {
  2179. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2180. ehdr->e_ident[EI_CLASS] = class;
  2181. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2182. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2183. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2184. }
  2185. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2186. unsigned char class)
  2187. {
  2188. struct cnss_qcom_dump_segment *segment;
  2189. void *phdr, *ehdr;
  2190. size_t data_size, offset;
  2191. int phnum = 0;
  2192. void *data;
  2193. void __iomem *ptr;
  2194. if (!segs || list_empty(segs))
  2195. return -EINVAL;
  2196. data_size = sizeof_elf_hdr(class);
  2197. list_for_each_entry(segment, segs, node) {
  2198. data_size += sizeof_elf_phdr(class) + segment->size;
  2199. phnum++;
  2200. }
  2201. data = vmalloc(data_size);
  2202. if (!data)
  2203. return -ENOMEM;
  2204. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2205. ehdr = data;
  2206. memset(ehdr, 0, sizeof_elf_hdr(class));
  2207. init_elf_identification(ehdr, class);
  2208. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2209. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2210. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2211. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2212. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2213. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2214. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2215. phdr = data + sizeof_elf_hdr(class);
  2216. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2217. list_for_each_entry(segment, segs, node) {
  2218. memset(phdr, 0, sizeof_elf_phdr(class));
  2219. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2220. set_phdr_property(phdr, class, p_offset, offset);
  2221. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2222. set_phdr_property(phdr, class, p_paddr, segment->da);
  2223. set_phdr_property(phdr, class, p_filesz, segment->size);
  2224. set_phdr_property(phdr, class, p_memsz, segment->size);
  2225. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2226. set_phdr_property(phdr, class, p_align, 0);
  2227. if (segment->va) {
  2228. memcpy(data + offset, segment->va, segment->size);
  2229. } else {
  2230. ptr = devm_ioremap(dev, segment->da, segment->size);
  2231. if (!ptr) {
  2232. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2233. &segment->da, segment->size);
  2234. memset(data + offset, 0xff, segment->size);
  2235. } else {
  2236. memcpy_fromio(data + offset, ptr,
  2237. segment->size);
  2238. }
  2239. }
  2240. offset += segment->size;
  2241. phdr += sizeof_elf_phdr(class);
  2242. }
  2243. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2244. }
  2245. /* Saving dump to file system is always needed in this case. */
  2246. static bool cnss_dump_enabled(void)
  2247. {
  2248. return true;
  2249. }
  2250. #endif /* CONFIG_QCOM_RAMDUMP */
  2251. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2252. {
  2253. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2254. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2255. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2256. struct qcom_dump_segment *seg;
  2257. struct cnss_dump_meta_info meta_info = {0};
  2258. struct list_head head;
  2259. int i, ret = 0;
  2260. if (!dump_enabled()) {
  2261. cnss_pr_info("Dump collection is not enabled\n");
  2262. return ret;
  2263. }
  2264. INIT_LIST_HEAD(&head);
  2265. for (i = 0; i < dump_data->nentries; i++) {
  2266. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2267. cnss_pr_err("Unsupported dump type: %d",
  2268. dump_seg->type);
  2269. continue;
  2270. }
  2271. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2272. if (!seg)
  2273. continue;
  2274. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2275. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2276. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2277. }
  2278. meta_info.entry[dump_seg->type].entry_num++;
  2279. seg->da = dump_seg->address;
  2280. seg->va = dump_seg->v_address;
  2281. seg->size = dump_seg->size;
  2282. list_add_tail(&seg->node, &head);
  2283. dump_seg++;
  2284. }
  2285. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2286. if (!seg)
  2287. goto do_elf_dump;
  2288. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2289. meta_info.version = CNSS_RAMDUMP_VERSION;
  2290. meta_info.chipset = plat_priv->device_id;
  2291. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2292. seg->va = &meta_info;
  2293. seg->size = sizeof(meta_info);
  2294. list_add(&seg->node, &head);
  2295. do_elf_dump:
  2296. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2297. while (!list_empty(&head)) {
  2298. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2299. list_del(&seg->node);
  2300. kfree(seg);
  2301. }
  2302. return ret;
  2303. }
  2304. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2305. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2306. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2307. {
  2308. struct cnss_ramdump_info *ramdump_info;
  2309. struct msm_dump_entry dump_entry;
  2310. ramdump_info = &plat_priv->ramdump_info;
  2311. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2312. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2313. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2314. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2315. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2316. sizeof(ramdump_info->dump_data.name));
  2317. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2318. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2319. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2320. &dump_entry);
  2321. }
  2322. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2323. {
  2324. int ret = 0;
  2325. struct device *dev;
  2326. struct cnss_ramdump_info *ramdump_info;
  2327. u32 ramdump_size = 0;
  2328. dev = &plat_priv->plat_dev->dev;
  2329. ramdump_info = &plat_priv->ramdump_info;
  2330. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2331. &ramdump_size) == 0) {
  2332. ramdump_info->ramdump_va =
  2333. dma_alloc_coherent(dev, ramdump_size,
  2334. &ramdump_info->ramdump_pa,
  2335. GFP_KERNEL);
  2336. if (ramdump_info->ramdump_va)
  2337. ramdump_info->ramdump_size = ramdump_size;
  2338. }
  2339. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2340. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2341. if (ramdump_info->ramdump_size == 0) {
  2342. cnss_pr_info("Ramdump will not be collected");
  2343. goto out;
  2344. }
  2345. ret = cnss_init_dump_entry(plat_priv);
  2346. if (ret) {
  2347. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2348. goto free_ramdump;
  2349. }
  2350. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2351. if (!ramdump_info->ramdump_dev) {
  2352. cnss_pr_err("Failed to create ramdump device!");
  2353. ret = -ENOMEM;
  2354. goto free_ramdump;
  2355. }
  2356. return 0;
  2357. free_ramdump:
  2358. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2359. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2360. out:
  2361. return ret;
  2362. }
  2363. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2364. {
  2365. struct device *dev;
  2366. struct cnss_ramdump_info *ramdump_info;
  2367. dev = &plat_priv->plat_dev->dev;
  2368. ramdump_info = &plat_priv->ramdump_info;
  2369. if (ramdump_info->ramdump_dev)
  2370. cnss_destroy_ramdump_device(plat_priv,
  2371. ramdump_info->ramdump_dev);
  2372. if (ramdump_info->ramdump_va)
  2373. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2374. ramdump_info->ramdump_va,
  2375. ramdump_info->ramdump_pa);
  2376. }
  2377. /**
  2378. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2379. * @ret: Error returned by msm_dump_data_register_nominidump
  2380. *
  2381. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2382. * ignore failure.
  2383. *
  2384. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2385. */
  2386. static int cnss_ignore_dump_data_reg_fail(int ret)
  2387. {
  2388. return ret;
  2389. }
  2390. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2391. {
  2392. int ret = 0;
  2393. struct cnss_ramdump_info_v2 *info_v2;
  2394. struct cnss_dump_data *dump_data;
  2395. struct msm_dump_entry dump_entry;
  2396. struct device *dev = &plat_priv->plat_dev->dev;
  2397. u32 ramdump_size = 0;
  2398. info_v2 = &plat_priv->ramdump_info_v2;
  2399. dump_data = &info_v2->dump_data;
  2400. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2401. &ramdump_size) == 0)
  2402. info_v2->ramdump_size = ramdump_size;
  2403. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2404. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2405. if (!info_v2->dump_data_vaddr)
  2406. return -ENOMEM;
  2407. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2408. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2409. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2410. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2411. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2412. sizeof(dump_data->name));
  2413. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2414. dump_entry.addr = virt_to_phys(dump_data);
  2415. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2416. &dump_entry);
  2417. if (ret) {
  2418. ret = cnss_ignore_dump_data_reg_fail(ret);
  2419. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2420. ret ? "Error" : "Ignoring", ret);
  2421. goto free_ramdump;
  2422. }
  2423. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2424. if (!info_v2->ramdump_dev) {
  2425. cnss_pr_err("Failed to create ramdump device!\n");
  2426. ret = -ENOMEM;
  2427. goto free_ramdump;
  2428. }
  2429. return 0;
  2430. free_ramdump:
  2431. kfree(info_v2->dump_data_vaddr);
  2432. info_v2->dump_data_vaddr = NULL;
  2433. return ret;
  2434. }
  2435. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2436. {
  2437. struct cnss_ramdump_info_v2 *info_v2;
  2438. info_v2 = &plat_priv->ramdump_info_v2;
  2439. if (info_v2->ramdump_dev)
  2440. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2441. kfree(info_v2->dump_data_vaddr);
  2442. info_v2->dump_data_vaddr = NULL;
  2443. info_v2->dump_data_valid = false;
  2444. }
  2445. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2446. {
  2447. int ret = 0;
  2448. switch (plat_priv->device_id) {
  2449. case QCA6174_DEVICE_ID:
  2450. ret = cnss_register_ramdump_v1(plat_priv);
  2451. break;
  2452. case QCA6290_DEVICE_ID:
  2453. case QCA6390_DEVICE_ID:
  2454. case QCA6490_DEVICE_ID:
  2455. case KIWI_DEVICE_ID:
  2456. case MANGO_DEVICE_ID:
  2457. ret = cnss_register_ramdump_v2(plat_priv);
  2458. break;
  2459. default:
  2460. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2461. ret = -ENODEV;
  2462. break;
  2463. }
  2464. return ret;
  2465. }
  2466. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2467. {
  2468. switch (plat_priv->device_id) {
  2469. case QCA6174_DEVICE_ID:
  2470. cnss_unregister_ramdump_v1(plat_priv);
  2471. break;
  2472. case QCA6290_DEVICE_ID:
  2473. case QCA6390_DEVICE_ID:
  2474. case QCA6490_DEVICE_ID:
  2475. case KIWI_DEVICE_ID:
  2476. case MANGO_DEVICE_ID:
  2477. cnss_unregister_ramdump_v2(plat_priv);
  2478. break;
  2479. default:
  2480. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2481. break;
  2482. }
  2483. }
  2484. #else
  2485. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2486. {
  2487. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2488. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2489. struct device *dev = &plat_priv->plat_dev->dev;
  2490. u32 ramdump_size = 0;
  2491. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2492. &ramdump_size) == 0)
  2493. info_v2->ramdump_size = ramdump_size;
  2494. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2495. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2496. if (!info_v2->dump_data_vaddr)
  2497. return -ENOMEM;
  2498. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2499. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2500. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2501. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2502. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2503. sizeof(dump_data->name));
  2504. info_v2->ramdump_dev = dev;
  2505. return 0;
  2506. }
  2507. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2508. {
  2509. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2510. info_v2->ramdump_dev = NULL;
  2511. kfree(info_v2->dump_data_vaddr);
  2512. info_v2->dump_data_vaddr = NULL;
  2513. info_v2->dump_data_valid = false;
  2514. }
  2515. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2516. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2517. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2518. phys_addr_t *pa, unsigned long attrs)
  2519. {
  2520. struct sg_table sgt;
  2521. int ret;
  2522. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2523. if (ret) {
  2524. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2525. va, &dma, size, attrs);
  2526. return -EINVAL;
  2527. }
  2528. *pa = page_to_phys(sg_page(sgt.sgl));
  2529. sg_free_table(&sgt);
  2530. return 0;
  2531. }
  2532. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2533. enum cnss_fw_dump_type type, int seg_no,
  2534. void *va, phys_addr_t pa, size_t size)
  2535. {
  2536. struct md_region md_entry;
  2537. int ret;
  2538. switch (type) {
  2539. case CNSS_FW_IMAGE:
  2540. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2541. seg_no);
  2542. break;
  2543. case CNSS_FW_RDDM:
  2544. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2545. seg_no);
  2546. break;
  2547. case CNSS_FW_REMOTE_HEAP:
  2548. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2549. seg_no);
  2550. break;
  2551. default:
  2552. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2553. return -EINVAL;
  2554. }
  2555. md_entry.phys_addr = pa;
  2556. md_entry.virt_addr = (uintptr_t)va;
  2557. md_entry.size = size;
  2558. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2559. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2560. md_entry.name, va, &pa, size);
  2561. ret = msm_minidump_add_region(&md_entry);
  2562. if (ret < 0)
  2563. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2564. return ret;
  2565. }
  2566. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2567. enum cnss_fw_dump_type type, int seg_no,
  2568. void *va, phys_addr_t pa, size_t size)
  2569. {
  2570. struct md_region md_entry;
  2571. int ret;
  2572. switch (type) {
  2573. case CNSS_FW_IMAGE:
  2574. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2575. seg_no);
  2576. break;
  2577. case CNSS_FW_RDDM:
  2578. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2579. seg_no);
  2580. break;
  2581. case CNSS_FW_REMOTE_HEAP:
  2582. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2583. seg_no);
  2584. break;
  2585. default:
  2586. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2587. return -EINVAL;
  2588. }
  2589. md_entry.phys_addr = pa;
  2590. md_entry.virt_addr = (uintptr_t)va;
  2591. md_entry.size = size;
  2592. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2593. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2594. md_entry.name, va, &pa, size);
  2595. ret = msm_minidump_remove_region(&md_entry);
  2596. if (ret)
  2597. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2598. ret);
  2599. return ret;
  2600. }
  2601. #else
  2602. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2603. phys_addr_t *pa, unsigned long attrs)
  2604. {
  2605. return 0;
  2606. }
  2607. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2608. enum cnss_fw_dump_type type, int seg_no,
  2609. void *va, phys_addr_t pa, size_t size)
  2610. {
  2611. return 0;
  2612. }
  2613. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2614. enum cnss_fw_dump_type type, int seg_no,
  2615. void *va, phys_addr_t pa, size_t size)
  2616. {
  2617. return 0;
  2618. }
  2619. #endif /* CONFIG_QCOM_MINIDUMP */
  2620. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2621. const struct firmware **fw_entry,
  2622. const char *filename)
  2623. {
  2624. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2625. return request_firmware_direct(fw_entry, filename,
  2626. &plat_priv->plat_dev->dev);
  2627. else
  2628. return firmware_request_nowarn(fw_entry, filename,
  2629. &plat_priv->plat_dev->dev);
  2630. }
  2631. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2632. /**
  2633. * cnss_register_bus_scale() - Setup interconnect voting data
  2634. * @plat_priv: Platform data structure
  2635. *
  2636. * For different interconnect path configured in device tree setup voting data
  2637. * for list of bandwidth requirements.
  2638. *
  2639. * Result: 0 for success. -EINVAL if not configured
  2640. */
  2641. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2642. {
  2643. int ret = -EINVAL;
  2644. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2645. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2646. struct device *dev = &plat_priv->plat_dev->dev;
  2647. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2648. ret = of_property_read_u32(dev->of_node,
  2649. "qcom,icc-path-count",
  2650. &plat_priv->icc.path_count);
  2651. if (ret) {
  2652. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  2653. return 0;
  2654. }
  2655. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2656. "qcom,bus-bw-cfg-count",
  2657. &plat_priv->icc.bus_bw_cfg_count);
  2658. if (ret) {
  2659. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2660. goto cleanup;
  2661. }
  2662. cfg_arr_size = plat_priv->icc.path_count *
  2663. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2664. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2665. if (!cfg_arr) {
  2666. cnss_pr_err("Failed to alloc cfg table mem\n");
  2667. ret = -ENOMEM;
  2668. goto cleanup;
  2669. }
  2670. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2671. "qcom,bus-bw-cfg", cfg_arr,
  2672. cfg_arr_size);
  2673. if (ret) {
  2674. cnss_pr_err("Invalid Bus BW Config Table\n");
  2675. goto cleanup;
  2676. }
  2677. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2678. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2679. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2680. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2681. GFP_KERNEL);
  2682. if (!bus_bw_info) {
  2683. ret = -ENOMEM;
  2684. goto out;
  2685. }
  2686. ret = of_property_read_string_index(dev->of_node,
  2687. "interconnect-names", idx,
  2688. &bus_bw_info->icc_name);
  2689. if (ret)
  2690. goto out;
  2691. bus_bw_info->icc_path =
  2692. of_icc_get(&plat_priv->plat_dev->dev,
  2693. bus_bw_info->icc_name);
  2694. if (IS_ERR(bus_bw_info->icc_path)) {
  2695. ret = PTR_ERR(bus_bw_info->icc_path);
  2696. if (ret != -EPROBE_DEFER) {
  2697. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2698. bus_bw_info->icc_name, ret);
  2699. goto out;
  2700. }
  2701. }
  2702. bus_bw_info->cfg_table =
  2703. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2704. sizeof(*bus_bw_info->cfg_table),
  2705. GFP_KERNEL);
  2706. if (!bus_bw_info->cfg_table) {
  2707. ret = -ENOMEM;
  2708. goto out;
  2709. }
  2710. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2711. bus_bw_info->icc_name);
  2712. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2713. CNSS_ICC_VOTE_MAX);
  2714. i < plat_priv->icc.bus_bw_cfg_count;
  2715. i++, j += 2) {
  2716. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2717. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2718. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2719. i, bus_bw_info->cfg_table[i].avg_bw,
  2720. bus_bw_info->cfg_table[i].peak_bw);
  2721. }
  2722. list_add_tail(&bus_bw_info->list,
  2723. &plat_priv->icc.list_head);
  2724. }
  2725. kfree(cfg_arr);
  2726. return 0;
  2727. out:
  2728. list_for_each_entry_safe(bus_bw_info, tmp,
  2729. &plat_priv->icc.list_head, list) {
  2730. list_del(&bus_bw_info->list);
  2731. }
  2732. cleanup:
  2733. kfree(cfg_arr);
  2734. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2735. return ret;
  2736. }
  2737. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2738. {
  2739. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2740. list_for_each_entry_safe(bus_bw_info, tmp,
  2741. &plat_priv->icc.list_head, list) {
  2742. list_del(&bus_bw_info->list);
  2743. if (bus_bw_info->icc_path)
  2744. icc_put(bus_bw_info->icc_path);
  2745. }
  2746. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2747. }
  2748. #else
  2749. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2750. {
  2751. return 0;
  2752. }
  2753. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2754. #endif /* CONFIG_INTERCONNECT */
  2755. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2756. {
  2757. struct cnss_plat_data *plat_priv = cb_ctx;
  2758. if (!plat_priv) {
  2759. cnss_pr_err("%s: Invalid context\n", __func__);
  2760. return;
  2761. }
  2762. if (status) {
  2763. cnss_pr_info("CNSS Daemon connected\n");
  2764. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2765. complete(&plat_priv->daemon_connected);
  2766. } else {
  2767. cnss_pr_info("CNSS Daemon disconnected\n");
  2768. reinit_completion(&plat_priv->daemon_connected);
  2769. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2770. }
  2771. }
  2772. static ssize_t enable_hds_store(struct device *dev,
  2773. struct device_attribute *attr,
  2774. const char *buf, size_t count)
  2775. {
  2776. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2777. unsigned int enable_hds = 0;
  2778. if (!plat_priv)
  2779. return -ENODEV;
  2780. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2781. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2782. return -EINVAL;
  2783. }
  2784. if (enable_hds)
  2785. plat_priv->hds_enabled = true;
  2786. else
  2787. plat_priv->hds_enabled = false;
  2788. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2789. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2790. return count;
  2791. }
  2792. static ssize_t recovery_show(struct device *dev,
  2793. struct device_attribute *attr,
  2794. char *buf)
  2795. {
  2796. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2797. u32 buf_size = PAGE_SIZE;
  2798. u32 curr_len = 0;
  2799. u32 buf_written = 0;
  2800. if (!plat_priv)
  2801. return -ENODEV;
  2802. buf_written = scnprintf(buf, buf_size,
  2803. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  2804. "BIT0 -- wlan fw recovery\n"
  2805. "BIT1 -- wlan pcss recovery\n"
  2806. "---------------------------------\n");
  2807. curr_len += buf_written;
  2808. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2809. "WLAN recovery %s[%d]\n",
  2810. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  2811. plat_priv->recovery_enabled);
  2812. curr_len += buf_written;
  2813. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2814. "WLAN PCSS recovery %s[%d]\n",
  2815. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  2816. plat_priv->recovery_pcss_enabled);
  2817. curr_len += buf_written;
  2818. /*
  2819. * Now size of curr_len is not over page size for sure,
  2820. * later if new item or none-fixed size item added, need
  2821. * add check to make sure curr_len is not over page size.
  2822. */
  2823. return curr_len;
  2824. }
  2825. static ssize_t time_sync_period_show(struct device *dev,
  2826. struct device_attribute *attr,
  2827. char *buf)
  2828. {
  2829. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2830. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  2831. plat_priv->ctrl_params.time_sync_period);
  2832. }
  2833. static ssize_t time_sync_period_store(struct device *dev,
  2834. struct device_attribute *attr,
  2835. const char *buf, size_t count)
  2836. {
  2837. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2838. unsigned int time_sync_period = 0;
  2839. if (!plat_priv)
  2840. return -ENODEV;
  2841. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  2842. cnss_pr_err("Invalid time sync sysfs command\n");
  2843. return -EINVAL;
  2844. }
  2845. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  2846. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  2847. return count;
  2848. }
  2849. static ssize_t recovery_store(struct device *dev,
  2850. struct device_attribute *attr,
  2851. const char *buf, size_t count)
  2852. {
  2853. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2854. unsigned int recovery = 0;
  2855. int ret;
  2856. if (!plat_priv)
  2857. return -ENODEV;
  2858. if (sscanf(buf, "%du", &recovery) != 1) {
  2859. cnss_pr_err("Invalid recovery sysfs command\n");
  2860. return -EINVAL;
  2861. }
  2862. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  2863. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  2864. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2865. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2866. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  2867. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  2868. ret = cnss_send_subsys_restart_level_msg(plat_priv);
  2869. if (ret < 0) {
  2870. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  2871. plat_priv->recovery_pcss_enabled = false;
  2872. return -EINVAL;
  2873. }
  2874. return count;
  2875. }
  2876. static ssize_t shutdown_store(struct device *dev,
  2877. struct device_attribute *attr,
  2878. const char *buf, size_t count)
  2879. {
  2880. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2881. if (plat_priv) {
  2882. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2883. del_timer(&plat_priv->fw_boot_timer);
  2884. complete_all(&plat_priv->power_up_complete);
  2885. complete_all(&plat_priv->cal_complete);
  2886. }
  2887. cnss_pr_dbg("Received shutdown notification\n");
  2888. return count;
  2889. }
  2890. static ssize_t fs_ready_store(struct device *dev,
  2891. struct device_attribute *attr,
  2892. const char *buf, size_t count)
  2893. {
  2894. int fs_ready = 0;
  2895. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2896. if (sscanf(buf, "%du", &fs_ready) != 1)
  2897. return -EINVAL;
  2898. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  2899. fs_ready, count);
  2900. if (!plat_priv) {
  2901. cnss_pr_err("plat_priv is NULL\n");
  2902. return count;
  2903. }
  2904. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  2905. cnss_pr_dbg("QMI is bypassed\n");
  2906. return count;
  2907. }
  2908. switch (plat_priv->device_id) {
  2909. case QCA6290_DEVICE_ID:
  2910. case QCA6390_DEVICE_ID:
  2911. case QCA6490_DEVICE_ID:
  2912. case KIWI_DEVICE_ID:
  2913. case MANGO_DEVICE_ID:
  2914. break;
  2915. default:
  2916. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2917. plat_priv->device_id);
  2918. return count;
  2919. }
  2920. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  2921. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  2922. cnss_driver_event_post(plat_priv,
  2923. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  2924. 0, NULL);
  2925. }
  2926. return count;
  2927. }
  2928. static ssize_t qdss_trace_start_store(struct device *dev,
  2929. struct device_attribute *attr,
  2930. const char *buf, size_t count)
  2931. {
  2932. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2933. wlfw_qdss_trace_start(plat_priv);
  2934. cnss_pr_dbg("Received QDSS start command\n");
  2935. return count;
  2936. }
  2937. static ssize_t qdss_trace_stop_store(struct device *dev,
  2938. struct device_attribute *attr,
  2939. const char *buf, size_t count)
  2940. {
  2941. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2942. u32 option = 0;
  2943. if (sscanf(buf, "%du", &option) != 1)
  2944. return -EINVAL;
  2945. wlfw_qdss_trace_stop(plat_priv, option);
  2946. cnss_pr_dbg("Received QDSS stop command\n");
  2947. return count;
  2948. }
  2949. static ssize_t qdss_conf_download_store(struct device *dev,
  2950. struct device_attribute *attr,
  2951. const char *buf, size_t count)
  2952. {
  2953. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2954. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  2955. cnss_pr_dbg("Received QDSS download config command\n");
  2956. return count;
  2957. }
  2958. static ssize_t hw_trace_override_store(struct device *dev,
  2959. struct device_attribute *attr,
  2960. const char *buf, size_t count)
  2961. {
  2962. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2963. int tmp = 0;
  2964. if (sscanf(buf, "%du", &tmp) != 1)
  2965. return -EINVAL;
  2966. plat_priv->hw_trc_override = tmp;
  2967. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2968. return count;
  2969. }
  2970. static ssize_t charger_mode_store(struct device *dev,
  2971. struct device_attribute *attr,
  2972. const char *buf, size_t count)
  2973. {
  2974. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2975. int tmp = 0;
  2976. if (sscanf(buf, "%du", &tmp) != 1)
  2977. return -EINVAL;
  2978. plat_priv->charger_mode = tmp;
  2979. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  2980. return count;
  2981. }
  2982. static DEVICE_ATTR_WO(fs_ready);
  2983. static DEVICE_ATTR_WO(shutdown);
  2984. static DEVICE_ATTR_RW(recovery);
  2985. static DEVICE_ATTR_WO(enable_hds);
  2986. static DEVICE_ATTR_WO(qdss_trace_start);
  2987. static DEVICE_ATTR_WO(qdss_trace_stop);
  2988. static DEVICE_ATTR_WO(qdss_conf_download);
  2989. static DEVICE_ATTR_WO(hw_trace_override);
  2990. static DEVICE_ATTR_WO(charger_mode);
  2991. static DEVICE_ATTR_RW(time_sync_period);
  2992. static struct attribute *cnss_attrs[] = {
  2993. &dev_attr_fs_ready.attr,
  2994. &dev_attr_shutdown.attr,
  2995. &dev_attr_recovery.attr,
  2996. &dev_attr_enable_hds.attr,
  2997. &dev_attr_qdss_trace_start.attr,
  2998. &dev_attr_qdss_trace_stop.attr,
  2999. &dev_attr_qdss_conf_download.attr,
  3000. &dev_attr_hw_trace_override.attr,
  3001. &dev_attr_charger_mode.attr,
  3002. &dev_attr_time_sync_period.attr,
  3003. NULL,
  3004. };
  3005. static struct attribute_group cnss_attr_group = {
  3006. .attrs = cnss_attrs,
  3007. };
  3008. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3009. {
  3010. struct device *dev = &plat_priv->plat_dev->dev;
  3011. int ret;
  3012. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  3013. if (ret) {
  3014. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3015. ret);
  3016. goto out;
  3017. }
  3018. /* This is only for backward compatibility. */
  3019. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  3020. if (ret) {
  3021. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3022. ret);
  3023. goto rm_cnss_link;
  3024. }
  3025. return 0;
  3026. rm_cnss_link:
  3027. sysfs_remove_link(kernel_kobj, "cnss");
  3028. out:
  3029. return ret;
  3030. }
  3031. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3032. {
  3033. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  3034. sysfs_remove_link(kernel_kobj, "cnss");
  3035. }
  3036. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3037. {
  3038. int ret = 0;
  3039. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3040. &cnss_attr_group);
  3041. if (ret) {
  3042. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3043. ret);
  3044. goto out;
  3045. }
  3046. cnss_create_sysfs_link(plat_priv);
  3047. return 0;
  3048. out:
  3049. return ret;
  3050. }
  3051. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3052. {
  3053. cnss_remove_sysfs_link(plat_priv);
  3054. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3055. }
  3056. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3057. {
  3058. spin_lock_init(&plat_priv->event_lock);
  3059. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3060. WQ_UNBOUND, 1);
  3061. if (!plat_priv->event_wq) {
  3062. cnss_pr_err("Failed to create event workqueue!\n");
  3063. return -EFAULT;
  3064. }
  3065. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3066. INIT_LIST_HEAD(&plat_priv->event_list);
  3067. return 0;
  3068. }
  3069. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3070. {
  3071. destroy_workqueue(plat_priv->event_wq);
  3072. }
  3073. static int cnss_reboot_notifier(struct notifier_block *nb,
  3074. unsigned long action,
  3075. void *data)
  3076. {
  3077. struct cnss_plat_data *plat_priv =
  3078. container_of(nb, struct cnss_plat_data, reboot_nb);
  3079. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3080. del_timer(&plat_priv->fw_boot_timer);
  3081. complete_all(&plat_priv->power_up_complete);
  3082. complete_all(&plat_priv->cal_complete);
  3083. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3084. return NOTIFY_DONE;
  3085. }
  3086. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3087. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3088. {
  3089. struct Object client_env;
  3090. struct Object app_object;
  3091. u32 wifi_uid = HW_WIFI_UID;
  3092. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3093. int ret;
  3094. u8 state = 0;
  3095. /* get rootObj */
  3096. ret = get_client_env_object(&client_env);
  3097. if (ret) {
  3098. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3099. goto end;
  3100. }
  3101. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3102. if (ret) {
  3103. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3104. if (ret == FEATURE_NOT_SUPPORTED) {
  3105. ret = 0; /* Do not Assert */
  3106. cnss_pr_dbg("Secure HW feature not supported\n");
  3107. }
  3108. goto exit_release_clientenv;
  3109. }
  3110. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3111. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3112. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3113. ObjectCounts_pack(1, 1, 0, 0));
  3114. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3115. if (ret) {
  3116. if (ret == PERIPHERAL_NOT_FOUND) {
  3117. ret = 0; /* Do not Assert */
  3118. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3119. }
  3120. goto exit_release_app_obj;
  3121. }
  3122. if (state == 1)
  3123. set_bit(CNSS_WLAN_HW_DISABLED,
  3124. &plat_priv->driver_state);
  3125. else
  3126. clear_bit(CNSS_WLAN_HW_DISABLED,
  3127. &plat_priv->driver_state);
  3128. exit_release_app_obj:
  3129. Object_release(app_object);
  3130. exit_release_clientenv:
  3131. Object_release(client_env);
  3132. end:
  3133. if (ret) {
  3134. cnss_pr_err("Unable to get HW disable status\n");
  3135. CNSS_ASSERT(0);
  3136. }
  3137. return ret;
  3138. }
  3139. #else
  3140. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3141. {
  3142. return 0;
  3143. }
  3144. #endif
  3145. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3146. {
  3147. int ret;
  3148. ret = cnss_init_sol_gpio(plat_priv);
  3149. if (ret)
  3150. return ret;
  3151. timer_setup(&plat_priv->fw_boot_timer,
  3152. cnss_bus_fw_boot_timeout_hdlr, 0);
  3153. ret = register_pm_notifier(&cnss_pm_notifier);
  3154. if (ret)
  3155. cnss_pr_err("Failed to register PM notifier, err = %d\n", ret);
  3156. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3157. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3158. if (ret)
  3159. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3160. ret);
  3161. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3162. if (ret)
  3163. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3164. ret);
  3165. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3166. init_completion(&plat_priv->power_up_complete);
  3167. init_completion(&plat_priv->cal_complete);
  3168. init_completion(&plat_priv->rddm_complete);
  3169. init_completion(&plat_priv->recovery_complete);
  3170. init_completion(&plat_priv->daemon_connected);
  3171. mutex_init(&plat_priv->dev_lock);
  3172. mutex_init(&plat_priv->driver_ops_lock);
  3173. plat_priv->recovery_ws =
  3174. wakeup_source_register(&plat_priv->plat_dev->dev,
  3175. "CNSS_FW_RECOVERY");
  3176. if (!plat_priv->recovery_ws)
  3177. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3178. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3179. cnss_daemon_connection_update_cb,
  3180. plat_priv);
  3181. if (ret)
  3182. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3183. ret);
  3184. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3185. return 0;
  3186. }
  3187. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3188. {
  3189. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3190. plat_priv);
  3191. complete_all(&plat_priv->recovery_complete);
  3192. complete_all(&plat_priv->rddm_complete);
  3193. complete_all(&plat_priv->cal_complete);
  3194. complete_all(&plat_priv->power_up_complete);
  3195. complete_all(&plat_priv->daemon_connected);
  3196. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3197. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3198. unregister_pm_notifier(&cnss_pm_notifier);
  3199. del_timer(&plat_priv->fw_boot_timer);
  3200. wakeup_source_unregister(plat_priv->recovery_ws);
  3201. cnss_deinit_sol_gpio(plat_priv);
  3202. kfree(plat_priv->sram_dump);
  3203. }
  3204. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3205. {
  3206. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3207. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3208. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3209. "qcom,wlan-cbc-enabled");
  3210. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3211. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3212. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3213. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3214. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3215. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3216. * enabled by default
  3217. */
  3218. plat_priv->adsp_pc_enabled = true;
  3219. }
  3220. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3221. {
  3222. struct device *dev = &plat_priv->plat_dev->dev;
  3223. plat_priv->use_pm_domain =
  3224. of_property_read_bool(dev->of_node, "use-pm-domain");
  3225. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3226. }
  3227. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3228. {
  3229. struct device *dev = &plat_priv->plat_dev->dev;
  3230. plat_priv->set_wlaon_pwr_ctrl =
  3231. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3232. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3233. plat_priv->set_wlaon_pwr_ctrl);
  3234. }
  3235. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3236. {
  3237. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3238. "qcom,converged-dt") ||
  3239. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3240. "qcom,same-dt-multi-dev") ||
  3241. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3242. "qcom,multi-wlan-exchg"));
  3243. }
  3244. static const struct platform_device_id cnss_platform_id_table[] = {
  3245. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3246. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3247. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3248. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3249. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3250. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3251. { .name = "qcaconv", .driver_data = 0, },
  3252. { },
  3253. };
  3254. static const struct of_device_id cnss_of_match_table[] = {
  3255. {
  3256. .compatible = "qcom,cnss",
  3257. .data = (void *)&cnss_platform_id_table[0]},
  3258. {
  3259. .compatible = "qcom,cnss-qca6290",
  3260. .data = (void *)&cnss_platform_id_table[1]},
  3261. {
  3262. .compatible = "qcom,cnss-qca6390",
  3263. .data = (void *)&cnss_platform_id_table[2]},
  3264. {
  3265. .compatible = "qcom,cnss-qca6490",
  3266. .data = (void *)&cnss_platform_id_table[3]},
  3267. {
  3268. .compatible = "qcom,cnss-kiwi",
  3269. .data = (void *)&cnss_platform_id_table[4]},
  3270. {
  3271. .compatible = "qcom,cnss-mango",
  3272. .data = (void *)&cnss_platform_id_table[5]},
  3273. {
  3274. .compatible = "qcom,cnss-qca-converged",
  3275. .data = (void *)&cnss_platform_id_table[6]},
  3276. { },
  3277. };
  3278. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3279. static inline bool
  3280. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3281. {
  3282. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3283. "use-nv-mac");
  3284. }
  3285. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3286. {
  3287. struct device_node *child;
  3288. u32 id, i;
  3289. int id_n, device_identifier_gpio, ret;
  3290. u8 gpio_value;
  3291. if (!plat_priv->is_converged_dt)
  3292. return 0;
  3293. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3294. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3295. if (ret) {
  3296. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3297. return ret;
  3298. }
  3299. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3300. gpio_value = gpio_get_value(device_identifier_gpio);
  3301. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3302. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3303. child) {
  3304. if (strcmp(child->name, "chip_cfg"))
  3305. continue;
  3306. id_n = of_property_count_u32_elems(child, "supported-ids");
  3307. if (id_n <= 0) {
  3308. cnss_pr_err("Device id is NOT set\n");
  3309. return -EINVAL;
  3310. }
  3311. for (i = 0; i < id_n; i++) {
  3312. ret = of_property_read_u32_index(child,
  3313. "supported-ids",
  3314. i, &id);
  3315. if (ret) {
  3316. cnss_pr_err("Failed to read supported ids\n");
  3317. return -EINVAL;
  3318. }
  3319. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3320. plat_priv->plat_dev->dev.of_node = child;
  3321. plat_priv->device_id = QCA6490_DEVICE_ID;
  3322. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3323. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3324. child->name, i, id);
  3325. return 0;
  3326. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3327. plat_priv->plat_dev->dev.of_node = child;
  3328. plat_priv->device_id = KIWI_DEVICE_ID;
  3329. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3330. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3331. child->name, i, id);
  3332. return 0;
  3333. }
  3334. }
  3335. }
  3336. return -EINVAL;
  3337. }
  3338. static inline bool
  3339. cnss_is_converged_dt(struct cnss_plat_data *plat_priv)
  3340. {
  3341. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3342. "qcom,converged-dt");
  3343. }
  3344. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3345. {
  3346. int ret = 0;
  3347. int retry = 0;
  3348. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3349. return 0;
  3350. retry:
  3351. ret = cnss_power_on_device(plat_priv);
  3352. if (ret)
  3353. goto end;
  3354. ret = cnss_bus_init(plat_priv);
  3355. if (ret) {
  3356. if ((ret != -EPROBE_DEFER) &&
  3357. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3358. cnss_power_off_device(plat_priv);
  3359. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3360. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3361. goto retry;
  3362. }
  3363. goto power_off;
  3364. }
  3365. return 0;
  3366. power_off:
  3367. cnss_power_off_device(plat_priv);
  3368. end:
  3369. return ret;
  3370. }
  3371. int cnss_wlan_hw_enable(void)
  3372. {
  3373. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3374. int ret = 0;
  3375. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3376. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3377. goto register_driver;
  3378. ret = cnss_wlan_device_init(plat_priv);
  3379. if (ret) {
  3380. CNSS_ASSERT(0);
  3381. return ret;
  3382. }
  3383. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3384. cnss_driver_event_post(plat_priv,
  3385. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3386. 0, NULL);
  3387. register_driver:
  3388. if (plat_priv->driver_ops)
  3389. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3390. return ret;
  3391. }
  3392. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3393. static int cnss_probe(struct platform_device *plat_dev)
  3394. {
  3395. int ret = 0;
  3396. struct cnss_plat_data *plat_priv;
  3397. const struct of_device_id *of_id;
  3398. const struct platform_device_id *device_id;
  3399. if (cnss_get_plat_priv(plat_dev)) {
  3400. cnss_pr_err("Driver is already initialized!\n");
  3401. ret = -EEXIST;
  3402. goto out;
  3403. }
  3404. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3405. if (!of_id || !of_id->data) {
  3406. cnss_pr_err("Failed to find of match device!\n");
  3407. ret = -ENODEV;
  3408. goto out;
  3409. }
  3410. device_id = of_id->data;
  3411. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3412. GFP_KERNEL);
  3413. if (!plat_priv) {
  3414. ret = -ENOMEM;
  3415. goto out;
  3416. }
  3417. plat_priv->plat_dev = plat_dev;
  3418. plat_priv->device_id = device_id->driver_data;
  3419. plat_priv->is_converged_dt = cnss_is_converged_dt(plat_priv);
  3420. plat_priv->use_fw_path_with_prefix =
  3421. cnss_use_fw_path_with_prefix(plat_priv);
  3422. ret = cnss_get_dev_cfg_node(plat_priv);
  3423. if (ret) {
  3424. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3425. goto reset_plat_dev;
  3426. }
  3427. plat_priv->bus_type = cnss_get_bus_type(plat_priv->device_id);
  3428. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3429. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  3430. cnss_set_plat_priv(plat_dev, plat_priv);
  3431. platform_set_drvdata(plat_dev, plat_priv);
  3432. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3433. INIT_LIST_HEAD(&plat_priv->clk_list);
  3434. cnss_get_pm_domain_info(plat_priv);
  3435. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3436. cnss_power_misc_params_init(plat_priv);
  3437. cnss_get_tcs_info(plat_priv);
  3438. cnss_get_cpr_info(plat_priv);
  3439. cnss_aop_mbox_init(plat_priv);
  3440. cnss_init_control_params(plat_priv);
  3441. ret = cnss_get_resources(plat_priv);
  3442. if (ret)
  3443. goto reset_ctx;
  3444. ret = cnss_register_esoc(plat_priv);
  3445. if (ret)
  3446. goto free_res;
  3447. ret = cnss_register_bus_scale(plat_priv);
  3448. if (ret)
  3449. goto unreg_esoc;
  3450. ret = cnss_create_sysfs(plat_priv);
  3451. if (ret)
  3452. goto unreg_bus_scale;
  3453. ret = cnss_event_work_init(plat_priv);
  3454. if (ret)
  3455. goto remove_sysfs;
  3456. ret = cnss_qmi_init(plat_priv);
  3457. if (ret)
  3458. goto deinit_event_work;
  3459. ret = cnss_dms_init(plat_priv);
  3460. if (ret)
  3461. goto deinit_qmi;
  3462. ret = cnss_debugfs_create(plat_priv);
  3463. if (ret)
  3464. goto deinit_dms;
  3465. ret = cnss_misc_init(plat_priv);
  3466. if (ret)
  3467. goto destroy_debugfs;
  3468. ret = cnss_wlan_hw_disable_check(plat_priv);
  3469. if (ret)
  3470. goto deinit_misc;
  3471. /* Make sure all platform related init are done before
  3472. * device power on and bus init.
  3473. */
  3474. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  3475. ret = cnss_wlan_device_init(plat_priv);
  3476. if (ret)
  3477. goto deinit_misc;
  3478. } else {
  3479. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  3480. }
  3481. cnss_register_coex_service(plat_priv);
  3482. cnss_register_ims_service(plat_priv);
  3483. ret = cnss_genl_init();
  3484. if (ret < 0)
  3485. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3486. cnss_pr_info("Platform driver probed successfully.\n");
  3487. return 0;
  3488. deinit_misc:
  3489. cnss_misc_deinit(plat_priv);
  3490. destroy_debugfs:
  3491. cnss_debugfs_destroy(plat_priv);
  3492. deinit_dms:
  3493. cnss_dms_deinit(plat_priv);
  3494. deinit_qmi:
  3495. cnss_qmi_deinit(plat_priv);
  3496. deinit_event_work:
  3497. cnss_event_work_deinit(plat_priv);
  3498. remove_sysfs:
  3499. cnss_remove_sysfs(plat_priv);
  3500. unreg_bus_scale:
  3501. cnss_unregister_bus_scale(plat_priv);
  3502. unreg_esoc:
  3503. cnss_unregister_esoc(plat_priv);
  3504. free_res:
  3505. cnss_put_resources(plat_priv);
  3506. reset_ctx:
  3507. platform_set_drvdata(plat_dev, NULL);
  3508. reset_plat_dev:
  3509. cnss_set_plat_priv(plat_dev, NULL);
  3510. out:
  3511. return ret;
  3512. }
  3513. static int cnss_remove(struct platform_device *plat_dev)
  3514. {
  3515. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3516. cnss_genl_exit();
  3517. cnss_unregister_ims_service(plat_priv);
  3518. cnss_unregister_coex_service(plat_priv);
  3519. cnss_bus_deinit(plat_priv);
  3520. cnss_misc_deinit(plat_priv);
  3521. cnss_debugfs_destroy(plat_priv);
  3522. cnss_dms_deinit(plat_priv);
  3523. cnss_qmi_deinit(plat_priv);
  3524. cnss_event_work_deinit(plat_priv);
  3525. cnss_remove_sysfs(plat_priv);
  3526. cnss_unregister_bus_scale(plat_priv);
  3527. cnss_unregister_esoc(plat_priv);
  3528. cnss_put_resources(plat_priv);
  3529. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3530. mbox_free_channel(plat_priv->mbox_chan);
  3531. platform_set_drvdata(plat_dev, NULL);
  3532. plat_env = NULL;
  3533. return 0;
  3534. }
  3535. static struct platform_driver cnss_platform_driver = {
  3536. .probe = cnss_probe,
  3537. .remove = cnss_remove,
  3538. .driver = {
  3539. .name = "cnss2",
  3540. .of_match_table = cnss_of_match_table,
  3541. #ifdef CONFIG_CNSS_ASYNC
  3542. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3543. #endif
  3544. },
  3545. };
  3546. static bool cnss_check_compatible_node(void)
  3547. {
  3548. struct device_node *dn = NULL;
  3549. for_each_matching_node(dn, cnss_of_match_table) {
  3550. if (of_device_is_available(dn)) {
  3551. cnss_allow_driver_loading = true;
  3552. return true;
  3553. }
  3554. }
  3555. return false;
  3556. }
  3557. /**
  3558. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3559. *
  3560. * Valid device tree node means a node with "compatible" property from the
  3561. * device match table and "status" property is not disabled.
  3562. *
  3563. * Return: true if valid device tree node found, false if not found
  3564. */
  3565. static bool cnss_is_valid_dt_node_found(void)
  3566. {
  3567. struct device_node *dn = NULL;
  3568. for_each_matching_node(dn, cnss_of_match_table) {
  3569. if (of_device_is_available(dn))
  3570. break;
  3571. }
  3572. if (dn)
  3573. return true;
  3574. return false;
  3575. }
  3576. static int __init cnss_initialize(void)
  3577. {
  3578. int ret = 0;
  3579. if (!cnss_is_valid_dt_node_found())
  3580. return -ENODEV;
  3581. if (!cnss_check_compatible_node())
  3582. return ret;
  3583. cnss_debug_init();
  3584. ret = platform_driver_register(&cnss_platform_driver);
  3585. if (ret)
  3586. cnss_debug_deinit();
  3587. return ret;
  3588. }
  3589. static void __exit cnss_exit(void)
  3590. {
  3591. platform_driver_unregister(&cnss_platform_driver);
  3592. cnss_debug_deinit();
  3593. }
  3594. module_init(cnss_initialize);
  3595. module_exit(cnss_exit);
  3596. MODULE_LICENSE("GPL v2");
  3597. MODULE_DESCRIPTION("CNSS2 Platform Driver");