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qcacmn: Rename hif_callbacks and remove unwanted header files in source files

Selaa lähdekoodia 
Rename hif_callbacks structure to hif_driver_state_callbacks and remove
get_monotonic callback and use qdf API to get monotonic time.

Remove following unwanted header files in the hif source files.
osdep.h, athdefs.h, a_types.h, osapi_linux.h.

Change-Id: Ib7a03cab1b056a33b39247989fa3dfca41c85f77
CRs-Fixed: 967765
This commit is contained in:
Komal Seelam
2016-03-02 15:18:25 +05:30
committed by Vishwajith Upendra
vanhempi 39ac6ff576
commit 7508012ea9
14 muutettua tiedostoa jossa 81 lisäystä ja 130 poistoa
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116
hif/inc/regtable_pcie.h
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2011-2015 The Linux Foundation. All rights reserved.
* Copyright (c) 2011-2016 The Linux Foundation. All rights reserved.
*
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
*
@@ -700,65 +700,65 @@ struct targetdef_s {
#endif
struct hostdef_s {
A_UINT32 d_INT_STATUS_ENABLE_ERROR_LSB;
A_UINT32 d_INT_STATUS_ENABLE_ERROR_MASK;
A_UINT32 d_INT_STATUS_ENABLE_CPU_LSB;
A_UINT32 d_INT_STATUS_ENABLE_CPU_MASK;
A_UINT32 d_INT_STATUS_ENABLE_COUNTER_LSB;
A_UINT32 d_INT_STATUS_ENABLE_COUNTER_MASK;
A_UINT32 d_INT_STATUS_ENABLE_MBOX_DATA_LSB;
A_UINT32 d_INT_STATUS_ENABLE_MBOX_DATA_MASK;
A_UINT32 d_ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB;
A_UINT32 d_ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK;
A_UINT32 d_ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB;
A_UINT32 d_ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK;
A_UINT32 d_COUNTER_INT_STATUS_ENABLE_BIT_LSB;
A_UINT32 d_COUNTER_INT_STATUS_ENABLE_BIT_MASK;
A_UINT32 d_INT_STATUS_ENABLE_ADDRESS;
A_UINT32 d_CPU_INT_STATUS_ENABLE_BIT_LSB;
A_UINT32 d_CPU_INT_STATUS_ENABLE_BIT_MASK;
A_UINT32 d_HOST_INT_STATUS_ADDRESS;
A_UINT32 d_CPU_INT_STATUS_ADDRESS;
A_UINT32 d_ERROR_INT_STATUS_ADDRESS;
A_UINT32 d_ERROR_INT_STATUS_WAKEUP_MASK;
A_UINT32 d_ERROR_INT_STATUS_WAKEUP_LSB;
A_UINT32 d_ERROR_INT_STATUS_RX_UNDERFLOW_MASK;
A_UINT32 d_ERROR_INT_STATUS_RX_UNDERFLOW_LSB;
A_UINT32 d_ERROR_INT_STATUS_TX_OVERFLOW_MASK;
A_UINT32 d_ERROR_INT_STATUS_TX_OVERFLOW_LSB;
A_UINT32 d_COUNT_DEC_ADDRESS;
A_UINT32 d_HOST_INT_STATUS_CPU_MASK;
A_UINT32 d_HOST_INT_STATUS_CPU_LSB;
A_UINT32 d_HOST_INT_STATUS_ERROR_MASK;
A_UINT32 d_HOST_INT_STATUS_ERROR_LSB;
A_UINT32 d_HOST_INT_STATUS_COUNTER_MASK;
A_UINT32 d_HOST_INT_STATUS_COUNTER_LSB;
A_UINT32 d_RX_LOOKAHEAD_VALID_ADDRESS;
A_UINT32 d_WINDOW_DATA_ADDRESS;
A_UINT32 d_WINDOW_READ_ADDR_ADDRESS;
A_UINT32 d_WINDOW_WRITE_ADDR_ADDRESS;
A_UINT32 d_SOC_GLOBAL_RESET_ADDRESS;
A_UINT32 d_RTC_STATE_ADDRESS;
A_UINT32 d_RTC_STATE_COLD_RESET_MASK;
A_UINT32 d_PCIE_LOCAL_BASE_ADDRESS;
A_UINT32 d_PCIE_SOC_WAKE_RESET;
A_UINT32 d_PCIE_SOC_WAKE_ADDRESS;
A_UINT32 d_PCIE_SOC_WAKE_V_MASK;
A_UINT32 d_RTC_STATE_V_MASK;
A_UINT32 d_RTC_STATE_V_LSB;
A_UINT32 d_FW_IND_EVENT_PENDING;
A_UINT32 d_FW_IND_INITIALIZED;
A_UINT32 d_FW_IND_HELPER;
A_UINT32 d_RTC_STATE_V_ON;
uint32_t d_INT_STATUS_ENABLE_ERROR_LSB;
uint32_t d_INT_STATUS_ENABLE_ERROR_MASK;
uint32_t d_INT_STATUS_ENABLE_CPU_LSB;
uint32_t d_INT_STATUS_ENABLE_CPU_MASK;
uint32_t d_INT_STATUS_ENABLE_COUNTER_LSB;
uint32_t d_INT_STATUS_ENABLE_COUNTER_MASK;
uint32_t d_INT_STATUS_ENABLE_MBOX_DATA_LSB;
uint32_t d_INT_STATUS_ENABLE_MBOX_DATA_MASK;
uint32_t d_ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB;
uint32_t d_ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK;
uint32_t d_ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB;
uint32_t d_ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK;
uint32_t d_COUNTER_INT_STATUS_ENABLE_BIT_LSB;
uint32_t d_COUNTER_INT_STATUS_ENABLE_BIT_MASK;
uint32_t d_INT_STATUS_ENABLE_ADDRESS;
uint32_t d_CPU_INT_STATUS_ENABLE_BIT_LSB;
uint32_t d_CPU_INT_STATUS_ENABLE_BIT_MASK;
uint32_t d_HOST_INT_STATUS_ADDRESS;
uint32_t d_CPU_INT_STATUS_ADDRESS;
uint32_t d_ERROR_INT_STATUS_ADDRESS;
uint32_t d_ERROR_INT_STATUS_WAKEUP_MASK;
uint32_t d_ERROR_INT_STATUS_WAKEUP_LSB;
uint32_t d_ERROR_INT_STATUS_RX_UNDERFLOW_MASK;
uint32_t d_ERROR_INT_STATUS_RX_UNDERFLOW_LSB;
uint32_t d_ERROR_INT_STATUS_TX_OVERFLOW_MASK;
uint32_t d_ERROR_INT_STATUS_TX_OVERFLOW_LSB;
uint32_t d_COUNT_DEC_ADDRESS;
uint32_t d_HOST_INT_STATUS_CPU_MASK;
uint32_t d_HOST_INT_STATUS_CPU_LSB;
uint32_t d_HOST_INT_STATUS_ERROR_MASK;
uint32_t d_HOST_INT_STATUS_ERROR_LSB;
uint32_t d_HOST_INT_STATUS_COUNTER_MASK;
uint32_t d_HOST_INT_STATUS_COUNTER_LSB;
uint32_t d_RX_LOOKAHEAD_VALID_ADDRESS;
uint32_t d_WINDOW_DATA_ADDRESS;
uint32_t d_WINDOW_READ_ADDR_ADDRESS;
uint32_t d_WINDOW_WRITE_ADDR_ADDRESS;
uint32_t d_SOC_GLOBAL_RESET_ADDRESS;
uint32_t d_RTC_STATE_ADDRESS;
uint32_t d_RTC_STATE_COLD_RESET_MASK;
uint32_t d_PCIE_LOCAL_BASE_ADDRESS;
uint32_t d_PCIE_SOC_WAKE_RESET;
uint32_t d_PCIE_SOC_WAKE_ADDRESS;
uint32_t d_PCIE_SOC_WAKE_V_MASK;
uint32_t d_RTC_STATE_V_MASK;
uint32_t d_RTC_STATE_V_LSB;
uint32_t d_FW_IND_EVENT_PENDING;
uint32_t d_FW_IND_INITIALIZED;
uint32_t d_FW_IND_HELPER;
uint32_t d_RTC_STATE_V_ON;
#if defined(SDIO_3_0)
A_UINT32 d_HOST_INT_STATUS_MBOX_DATA_MASK;
A_UINT32 d_HOST_INT_STATUS_MBOX_DATA_LSB;
uint32_t d_HOST_INT_STATUS_MBOX_DATA_MASK;
uint32_t d_HOST_INT_STATUS_MBOX_DATA_LSB;
#endif
A_UINT32 d_PCIE_SOC_RDY_STATUS_ADDRESS;
A_UINT32 d_PCIE_SOC_RDY_STATUS_BAR_MASK;
A_UINT32 d_SOC_PCIE_BASE_ADDRESS;
A_UINT32 d_MSI_MAGIC_ADR_ADDRESS;
A_UINT32 d_MSI_MAGIC_ADDRESS;
uint32_t d_PCIE_SOC_RDY_STATUS_ADDRESS;
uint32_t d_PCIE_SOC_RDY_STATUS_BAR_MASK;
uint32_t d_SOC_PCIE_BASE_ADDRESS;
uint32_t d_MSI_MAGIC_ADR_ADDRESS;
uint32_t d_MSI_MAGIC_ADDRESS;
uint32_t d_HOST_CE_COUNT;
uint32_t d_ENABLE_MSI;
uint32_t d_MUX_ID_MASK;