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qcacmn: Change HAL APIs for the new 11AX header

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Change some HAL API to correspond to the header changes that got
modified for the Napier 11AX HW.

Change-Id: I514b18bc2a92ad11d95c1079ba8ef4b96b7bc6eb
CRs-Fixed: 2124274
This commit is contained in:
psimha
2017-10-10 14:12:28 -07:00
committed by snandini
parent a12b4b305c
commit 6d62ef4e59
3 changed files with 109 additions and 2 deletions
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16
dp/wifi3.0/hal_rx.h
View File

@@ -1394,6 +1394,7 @@ hal_rx_msdu_start_get_pkt_type(uint8_t *buf)
* Return: uint32_t(nss) * Return: uint32_t(nss)
*/ */
#if !defined(QCA_WIFI_QCA6290_11AX)
static inline uint32_t static inline uint32_t
hal_rx_msdu_start_nss_get(uint8_t *buf) hal_rx_msdu_start_nss_get(uint8_t *buf)
{ {
@@ -1405,6 +1406,13 @@ hal_rx_msdu_start_nss_get(uint8_t *buf)
nss = HAL_RX_MSDU_START_NSS_GET(msdu_start); nss = HAL_RX_MSDU_START_NSS_GET(msdu_start);
return nss; return nss;
} }
#else
static inline uint32_t
hal_rx_msdu_start_nss_get(uint8_t *buf)
{
return 0;
}
#endif
#define HAL_RX_MPDU_GET_TODS(_rx_mpdu_info) \ #define HAL_RX_MPDU_GET_TODS(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
@@ -2556,7 +2564,6 @@ static void hal_rx_dump_msdu_start_tlv(struct rx_msdu_start *msdu_start,
"ip_frag: %d\n" "ip_frag: %d\n"
"tcp_only_ack: %d\n" "tcp_only_ack: %d\n"
"da_is_bcast_mcast: %d\n" "da_is_bcast_mcast: %d\n"
"toeplitz_hash: %d\n"
"ip4_protocol_ip6_next_header: %d\n" "ip4_protocol_ip6_next_header: %d\n"
"toeplitz_hash_2_or_4: %d\n" "toeplitz_hash_2_or_4: %d\n"
"flow_id_toeplitz: %d\n" "flow_id_toeplitz: %d\n"
@@ -2567,7 +2574,10 @@ static void hal_rx_dump_msdu_start_tlv(struct rx_msdu_start *msdu_start,
"rate_mcs: %d\n" "rate_mcs: %d\n"
"receive_bandwidth: %d\n" "receive_bandwidth: %d\n"
"reception_type: %d\n" "reception_type: %d\n"
#if !defined(QCA_WIFI_QCA6290_11AX)
"toeplitz_hash: %d\n"
"nss: %d\n" "nss: %d\n"
#endif
"ppdu_start_timestamp: %d\n" "ppdu_start_timestamp: %d\n"
"sw_phy_meta_data: %d\n", "sw_phy_meta_data: %d\n",
msdu_start->rxpcu_mpdu_filter_in_category, msdu_start->rxpcu_mpdu_filter_in_category,
@@ -2587,7 +2597,6 @@ static void hal_rx_dump_msdu_start_tlv(struct rx_msdu_start *msdu_start,
msdu_start->ip_frag, msdu_start->ip_frag,
msdu_start->tcp_only_ack, msdu_start->tcp_only_ack,
msdu_start->da_is_bcast_mcast, msdu_start->da_is_bcast_mcast,
msdu_start->toeplitz_hash,
msdu_start->ip4_protocol_ip6_next_header, msdu_start->ip4_protocol_ip6_next_header,
msdu_start->toeplitz_hash_2_or_4, msdu_start->toeplitz_hash_2_or_4,
msdu_start->flow_id_toeplitz, msdu_start->flow_id_toeplitz,
@@ -2598,7 +2607,10 @@ static void hal_rx_dump_msdu_start_tlv(struct rx_msdu_start *msdu_start,
msdu_start->rate_mcs, msdu_start->rate_mcs,
msdu_start->receive_bandwidth, msdu_start->receive_bandwidth,
msdu_start->reception_type, msdu_start->reception_type,
#if !defined(QCA_WIFI_QCA6290_11AX)
msdu_start->toeplitz_hash,
msdu_start->nss, msdu_start->nss,
#endif
msdu_start->ppdu_start_timestamp, msdu_start->ppdu_start_timestamp,
msdu_start->sw_phy_meta_data); msdu_start->sw_phy_meta_data);
} }

12
hal/wifi3.0/hal_api_mon.h
View File

@@ -386,7 +386,9 @@ void hal_rx_mon_hw_desc_get_mpdu_status(void *hw_desc_addr,
reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, SGI); reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, SGI);
rs->sgi = sgi_hw_to_cdp[reg_value]; rs->sgi = sgi_hw_to_cdp[reg_value];
#if !defined(QCA_WIFI_QCA6290_11AX)
rs->nr_ant = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, NSS); rs->nr_ant = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, NSS);
#endif
reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, PKT_TYPE); reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, PKT_TYPE);
switch (reg_value) { switch (reg_value) {
@@ -400,8 +402,12 @@ void hal_rx_mon_hw_desc_get_mpdu_status(void *hw_desc_addr,
reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5,
RECEIVE_BANDWIDTH); RECEIVE_BANDWIDTH);
rs->vht_flag_values2 = reg_value; rs->vht_flag_values2 = reg_value;
#if !defined(QCA_WIFI_QCA6290_11AX)
nss = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, NSS); nss = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, NSS);
nss = nss + 1; nss = nss + 1;
#else
nss = 0;
#endif
rs->vht_flag_values3[0] = (rs->mcs << 4) | nss ; rs->vht_flag_values3[0] = (rs->mcs << 4) | nss ;
break; break;
case HAL_RX_PKT_TYPE_11AX: case HAL_RX_PKT_TYPE_11AX:
@@ -729,7 +735,13 @@ hal_rx_status_get_tlv_info(void *rx_tlv, struct hal_rx_ppdu_info *ppdu_info)
ppdu_info->rx_status.rssi_comb = HAL_RX_GET(rssi_info_tlv, ppdu_info->rx_status.rssi_comb = HAL_RX_GET(rssi_info_tlv,
PHYRX_RSSI_LEGACY_35, RSSI_COMB); PHYRX_RSSI_LEGACY_35, RSSI_COMB);
ppdu_info->rx_status.bw = HAL_RX_GET(rssi_info_tlv, ppdu_info->rx_status.bw = HAL_RX_GET(rssi_info_tlv,
#if !defined(QCA_WIFI_QCA6290_11AX)
PHYRX_RSSI_LEGACY_35, RECEIVE_BANDWIDTH); PHYRX_RSSI_LEGACY_35, RECEIVE_BANDWIDTH);
#else
PHYRX_RSSI_LEGACY_0, RECEIVE_BANDWIDTH);
#endif
ppdu_info->rx_status.preamble_type = HAL_RX_GET(rssi_info_tlv,
PHYRX_RSSI_LEGACY_0, RECEPTION_TYPE);
ppdu_info->rx_status.he_re = 0; ppdu_info->rx_status.he_re = 0;
value = HAL_RX_GET(rssi_info_tlv, value = HAL_RX_GET(rssi_info_tlv,

83
hal/wifi3.0/hal_tx.h
View File

@@ -78,6 +78,7 @@ do { \
#define HAL_TX_TID_BITS_MASK ((1 << HAL_TX_BITS_PER_TID) - 1) #define HAL_TX_TID_BITS_MASK ((1 << HAL_TX_BITS_PER_TID) - 1)
#define HAL_TX_NUM_DSCP_PER_REGISTER 10 #define HAL_TX_NUM_DSCP_PER_REGISTER 10
#define HAL_MAX_HW_DSCP_TID_MAPS 2 #define HAL_MAX_HW_DSCP_TID_MAPS 2
#define HAL_MAX_HW_DSCP_TID_MAPS_11AX 32
#define HTT_META_HEADER_LEN_BYTES 64 #define HTT_META_HEADER_LEN_BYTES 64
#define HAL_TX_EXT_DESC_WITH_META_DATA \ #define HAL_TX_EXT_DESC_WITH_META_DATA \
@@ -459,6 +460,7 @@ static inline void hal_tx_desc_set_to_fw(void *desc, uint8_t to_fw)
* *
* Return: void * Return: void
*/ */
#if !defined(QCA_WIFI_QCA6290_11AX)
static inline void hal_tx_desc_set_dscp_tid_table_id(void *desc, static inline void hal_tx_desc_set_dscp_tid_table_id(void *desc,
uint8_t id) uint8_t id)
{ {
@@ -467,6 +469,16 @@ static inline void hal_tx_desc_set_dscp_tid_table_id(void *desc,
HAL_TX_SM(TCL_DATA_CMD_3, HAL_TX_SM(TCL_DATA_CMD_3,
DSCP_TO_TID_PRIORITY_TABLE_ID, id); DSCP_TO_TID_PRIORITY_TABLE_ID, id);
} }
#else
static inline void hal_tx_desc_set_dscp_tid_table_id(void *desc,
uint8_t id)
{
HAL_SET_FLD(desc, TCL_DATA_CMD_5,
DSCP_TID_TABLE_NUM) |=
HAL_TX_SM(TCL_DATA_CMD_5,
DSCP_TID_TABLE_NUM, id);
}
#endif
/** /**
* hal_tx_desc_set_mesh_en - Set mesh_enable flag in Tx descriptor * hal_tx_desc_set_mesh_en - Set mesh_enable flag in Tx descriptor
@@ -968,6 +980,7 @@ static inline void hal_tx_comp_get_htt_desc(void *hw_desc, uint8_t *htt_desc)
qdf_mem_copy(htt_desc, desc, HAL_TX_COMP_HTT_STATUS_LEN); qdf_mem_copy(htt_desc, desc, HAL_TX_COMP_HTT_STATUS_LEN);
} }
#if !defined(QCA_WIFI_QCA6290_11AX)
/** /**
* hal_tx_set_dscp_tid_map_default() - Configure default DSCP to TID map table * hal_tx_set_dscp_tid_map_default() - Configure default DSCP to TID map table
* @soc: HAL SoC context * @soc: HAL SoC context
@@ -1061,6 +1074,76 @@ static inline void hal_tx_update_dscp_tid(void *hal_soc, uint8_t tid,
HAL_REG_WRITE(soc, addr, HAL_REG_WRITE(soc, addr,
(regval & HWIO_TCL_R0_DSCP_TID1_MAP_1_RMSK)); (regval & HWIO_TCL_R0_DSCP_TID1_MAP_1_RMSK));
} }
#else
/**
* hal_tx_set_dscp_tid_map_default() - Configure default DSCP to TID map table
* @soc: HAL SoC context
* @map: DSCP-TID mapping table
* @id: mapping table ID - 0-31
*
* DSCP are mapped to 8 TID values using TID values programmed
* in any of the 32 DSCP_TID_MAPS (id = 0-31).
*
* Return: none
*/
static inline void hal_tx_set_dscp_tid_map(void *hal_soc, uint8_t *map,
uint8_t id)
{
int i;
uint32_t addr;
uint32_t value;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX) {
return;
}
addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id);
for (i = 0; i < 64; i += 10) {
value = (map[i] |
(map[i+1] << 0x3) |
(map[i+2] << 0x6) |
(map[i+3] << 0x9) |
(map[i+4] << 0xc) |
(map[i+5] << 0xf) |
(map[i+6] << 0x12) |
(map[i+7] << 0x15) |
(map[i+8] << 0x18) |
(map[i+9] << 0x1b));
HAL_REG_WRITE(soc, addr,
(value & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
addr += 4;
}
}
static inline void hal_tx_update_dscp_tid(void *hal_soc, uint8_t tid,
uint8_t id, uint8_t dscp)
{
int index;
uint32_t addr;
uint32_t value;
uint32_t regval;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id);
index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER;
addr += 4 * (dscp/HAL_TX_NUM_DSCP_PER_REGISTER);
value = tid << (HAL_TX_BITS_PER_TID * index);
regval = HAL_REG_READ(soc, addr);
regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index));
regval |= value;
HAL_REG_WRITE(soc, addr,
(regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
}
#endif
/** /**
* hal_tx_init_data_ring() - Initialize all the TCL Descriptors in SRNG * hal_tx_init_data_ring() - Initialize all the TCL Descriptors in SRNG