disp: msm: dsi: fix dsi pll dividers

Updating DSI PLL byte clock dividers as per HW recommendation. Change-Id: I9dbe7a04f813676a7690d0cadc52d7ed19ca4871 Signed-off-by: Santosh Kumar Aenugu <santoshkumar@codeaurora.org>
2021-04-22 12:08:24 -07:00
parent 72f7dfe428
commit 6add9d0fc0
3 changed files with 88 additions and 27 deletions
--- a/msm/dsi/dsi_pll.h
+++ b/msm/dsi/dsi_pll.h
@@ -190,8 +190,8 @@ struct dsi_pll_vco_calc {
 };

 struct dsi_pll_div_table {
-	u32 min_hz;
-	u32 max_hz;
+	u64 min_hz;
+	u64 max_hz;
 	int pll_div;
 	int phy_div;
 };