From 6add9d0fc07a96dfffe60cab4ce3fe4ff582a36d Mon Sep 17 00:00:00 2001 From: Santosh Kumar Aenugu Date: Thu, 22 Apr 2021 12:08:24 -0700 Subject: [PATCH] disp: msm: dsi: fix dsi pll dividers Updating DSI PLL byte clock dividers as per HW recommendation. Change-Id: I9dbe7a04f813676a7690d0cadc52d7ed19ca4871 Signed-off-by: Santosh Kumar Aenugu --- msm/dsi/dsi_pll.h | 4 +- msm/dsi/dsi_pll_5nm.c | 23 ++++++++--- msm/dsi/dsi_pll_5nm.h | 88 +++++++++++++++++++++++++++++++++---------- 3 files changed, 88 insertions(+), 27 deletions(-) diff --git a/msm/dsi/dsi_pll.h b/msm/dsi/dsi_pll.h index 834752cfdc..40fc3b6716 100644 --- a/msm/dsi/dsi_pll.h +++ b/msm/dsi/dsi_pll.h @@ -190,8 +190,8 @@ struct dsi_pll_vco_calc { }; struct dsi_pll_div_table { - u32 min_hz; - u32 max_hz; + u64 min_hz; + u64 max_hz; int pll_div; int phy_div; }; diff --git a/msm/dsi/dsi_pll_5nm.c b/msm/dsi/dsi_pll_5nm.c index 38d328204d..eebc6557ef 100644 --- a/msm/dsi/dsi_pll_5nm.c +++ b/msm/dsi/dsi_pll_5nm.c @@ -1004,16 +1004,29 @@ static int dsi_pll_5nm_set_byteclk_div(struct dsi_pll_resource *pll, int table_size; u32 pll_post_div = 0, phy_post_div = 0; struct dsi_pll_div_table *table; - u32 bitclk_rate; + u64 bitclk_rate; + u64 const phy_rate_split = 1500000000UL; if (pll->type == DSI_PHY_TYPE_DPHY) { bitclk_rate = pll->byteclk_rate * 8; - table_size = ARRAY_SIZE(pll_5nm_dphy); - table = pll_5nm_dphy; + + if (bitclk_rate <= phy_rate_split) { + table = pll_5nm_dphy_lb; + table_size = ARRAY_SIZE(pll_5nm_dphy_lb); + } else { + table = pll_5nm_dphy_hb; + table_size = ARRAY_SIZE(pll_5nm_dphy_hb); + } } else { bitclk_rate = pll->byteclk_rate * 7; - table_size = ARRAY_SIZE(pll_5nm_cphy); - table = pll_5nm_cphy; + + if (bitclk_rate <= phy_rate_split) { + table = pll_5nm_cphy_lb; + table_size = ARRAY_SIZE(pll_5nm_cphy_lb); + } else { + table = pll_5nm_cphy_hb; + table_size = ARRAY_SIZE(pll_5nm_cphy_hb); + } } for (i = 0; i < table_size; i++) { diff --git a/msm/dsi/dsi_pll_5nm.h b/msm/dsi/dsi_pll_5nm.h index 113a9cdc85..9a0dd38927 100644 --- a/msm/dsi/dsi_pll_5nm.h +++ b/msm/dsi/dsi_pll_5nm.h @@ -225,26 +225,74 @@ enum { DSI_PLL_MAX }; -struct dsi_pll_div_table pll_5nm_dphy[] = { - {60000000, 86670000, 2, 5}, - {86670000, 97500000, 1, 9}, - {97500000, 111430000, 8, 1}, - {111430000, 130000000, 1, 7}, - {130000000, 156000000, 2, 3}, - {150000000, 195000000, 1, 5}, - {195000000, 260000000, 4, 1}, - {260000000, 390000000, 1, 3}, - {390000000, 780000000, 2, 1}, - {780000000, 3500000000, 1, 1} +struct dsi_pll_div_table pll_5nm_dphy_lb[] = { + {27270000, 30000000, 2, 11}, + {30000000, 33330000, 4, 5}, + {33330000, 37500000, 2, 9}, + {37500000, 40000000, 8, 2}, + {40000000, 42860000, 1, 15}, + {42860000, 46150000, 2, 7}, + {46150000, 50000000, 1, 13}, + {50000000, 54550000, 4, 3}, + {54550000, 60000000, 1, 11}, + {60000000, 66670000, 2, 5}, + {66670000, 75000000, 1, 9}, + {75000000, 85710000, 8, 1}, + {85710000, 100000000, 1, 7}, + {100000000, 120000000, 2, 3}, + {120000000, 150000000, 1, 5}, + {150000000, 200000000, 4, 1}, + {200000000, 300000000, 1, 3}, + {300000000, 600000000, 2, 1}, + {600000000, 1500000000, 1, 1} }; -struct dsi_pll_div_table pll_5nm_cphy[] = { - {60000000, 97500000, 2, 5}, - {97500000, 130000000, 8, 1}, - {130000000, 156000000, 2, 3}, - {156000000, 195000000, 1, 5}, - {195000000, 260000000, 4, 1}, - {260000000, 390000000, 1, 3}, - {390000000, 780000000, 2, 1}, - {780000000, 3500000000, 1, 1} +struct dsi_pll_div_table pll_5nm_dphy_hb[] = { + {68180000, 75000000, 2, 11}, + {75000000, 83330000, 4, 5}, + {83330000, 93750000, 2, 9}, + {93750000, 100000000, 8, 2}, + {100000000, 107140000, 1, 15}, + {107140000, 115380000, 2, 7}, + {115380000, 125000000, 1, 13}, + {125000000, 136360000, 4, 3}, + {136360000, 150000000, 1, 11}, + {150000000, 166670000, 2, 5}, + {166670000, 187500000, 1, 9}, + {187500000, 214290000, 8, 1}, + {214290000, 250000000, 1, 7}, + {250000000, 300000000, 2, 3}, + {300000000, 375000000, 1, 5}, + {375000000, 500000000, 4, 1}, + {500000000, 750000000, 1, 3}, + {750000000, 1500000000, 2, 1}, + {1500000000, 5000000000, 1, 1} +}; + +struct dsi_pll_div_table pll_5nm_cphy_lb[] = { + {30000000, 37500000, 4, 5}, + {37500000, 50000000, 8, 2}, + {50000000, 60000000, 4, 3}, + {60000000, 75000000, 2, 5}, + {75000000, 100000000, 8, 1}, + {100000000, 120000000, 2, 3}, + {120000000, 150000000, 1, 5}, + {150000000, 200000000, 4, 1}, + {200000000, 300000000, 1, 3}, + {300000000, 600000000, 2, 1}, + {600000000, 1500000000, 1, 1} +}; + +struct dsi_pll_div_table pll_5nm_cphy_hb[] = { + {75000000, 93750000, 4, 5}, + {93750000, 12500000, 8, 2}, + {125000000, 150000000, 4, 3}, + {150000000, 187500000, 2, 5}, + {187500000, 250000000, 8, 1}, + {250000000, 300000000, 2, 3}, + {300000000, 375000000, 1, 5}, + {375000000, 500000000, 4, 1}, + {500000000, 750000000, 1, 3}, + {750000000, 1500000000, 2, 1}, + {1500000000, 5000000000, 1, 1} };