qcacmn: Add hal_rx_msdu_end_sa_sw_peer_id_get API
Implement hal_rx_msdu_end_sa_sw_peer_id API based on the chipset as the macro to retrieve sa_sw_peer_id value is chipset dependent. Change-Id: I2efd1f851539bbffc8f75c7662045c1f4a3c4469 CRs-Fixed: 2522133
This commit is contained in:

committed by
nshrivas

parent
56022cb6e1
commit
685045eb9c
@@ -409,6 +409,7 @@ struct hal_hw_txrx_ops {
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uint32_t (*hal_rx_tid_get)(hal_soc_handle_t hal_soc_hdl, uint8_t *buf);
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uint32_t (*hal_rx_tid_get)(hal_soc_handle_t hal_soc_hdl, uint8_t *buf);
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uint32_t (*hal_rx_hw_desc_get_ppduid_get)(void *hw_desc_addr);
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uint32_t (*hal_rx_hw_desc_get_ppduid_get)(void *hw_desc_addr);
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uint32_t (*hal_rx_mpdu_start_mpdu_qos_control_valid_get)(uint8_t *buf);
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uint32_t (*hal_rx_mpdu_start_mpdu_qos_control_valid_get)(uint8_t *buf);
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uint32_t (*hal_rx_msdu_end_sa_sw_peer_id_get)(uint8_t *buf);
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};
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};
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/**
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/**
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@@ -1045,31 +1045,6 @@ hal_rx_msdu_end_sa_is_valid_get(hal_soc_handle_t hal_soc_hdl,
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return hal_soc->ops->hal_rx_msdu_end_sa_is_valid_get(buf);
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return hal_soc->ops->hal_rx_msdu_end_sa_is_valid_get(buf);
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}
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}
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#define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_msdu_end) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_16_SA_SW_PEER_ID_OFFSET)), \
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RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \
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RX_MSDU_END_16_SA_SW_PEER_ID_LSB))
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/**
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* hal_rx_msdu_end_sa_sw_peer_id_get(): API to get the
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* sa_sw_peer_id from rx_msdu_end TLV
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*
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* @ buf: pointer to the start of RX PKT TLV headers
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* Return: sa_sw_peer_id index
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*/
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static inline uint32_t
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hal_rx_msdu_end_sa_sw_peer_id_get(uint8_t *buf)
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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uint32_t sa_sw_peer_id;
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sa_sw_peer_id = HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end);
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return sa_sw_peer_id;
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}
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#define HAL_RX_MSDU_START_MSDU_LEN_GET(_rx_msdu_start) \
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#define HAL_RX_MSDU_START_MSDU_LEN_GET(_rx_msdu_start) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
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RX_MSDU_START_1_MSDU_LENGTH_OFFSET)), \
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RX_MSDU_START_1_MSDU_LENGTH_OFFSET)), \
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@@ -3334,4 +3309,29 @@ uint32_t hal_rx_hw_desc_get_ppduid_get(hal_soc_handle_t hal_soc_hdl,
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return hal_soc->ops->hal_rx_hw_desc_get_ppduid_get(hw_desc_addr);
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return hal_soc->ops->hal_rx_hw_desc_get_ppduid_get(hw_desc_addr);
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}
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}
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/**
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* hal_rx_msdu_end_sa_sw_peer_id_get() - get sw peer id
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* @hal_soc_hdl: hal_soc handle
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* @buf: rx tlv address
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*
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* Return: sw peer id
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*/
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static inline
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uint32_t hal_rx_msdu_end_sa_sw_peer_id_get(hal_soc_handle_t hal_soc_hdl,
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uint8_t *buf)
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{
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struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
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if ((!hal_soc) || (!hal_soc->ops)) {
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hal_err("hal handle is NULL");
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QDF_BUG(0);
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return QDF_STATUS_E_INVAL;
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}
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if (hal_soc->ops->hal_rx_msdu_end_sa_sw_peer_id_get)
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return hal_soc->ops->hal_rx_msdu_end_sa_sw_peer_id_get(buf);
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return QDF_STATUS_E_INVAL;
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}
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#endif /* _HAL_RX_H */
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#endif /* _HAL_RX_H */
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@@ -725,6 +725,21 @@ hal_rx_mpdu_start_mpdu_qos_control_valid_get_6290(uint8_t *buf)
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&mpdu_start->rx_mpdu_info_details);
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&mpdu_start->rx_mpdu_info_details);
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}
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}
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/**
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* hal_rx_msdu_end_sa_sw_peer_id_get_6290(): API to get the
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* sa_sw_peer_id from rx_msdu_end TLV
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* @buf: pointer to the start of RX PKT TLV headers
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*
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* Return: sa_sw_peer_id index
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*/
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static inline uint32_t
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hal_rx_msdu_end_sa_sw_peer_id_get_6290(uint8_t *buf)
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end);
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}
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struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
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struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
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/* init and setup */
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/* init and setup */
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hal_srng_dst_hw_init_generic,
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hal_srng_dst_hw_init_generic,
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@@ -791,6 +806,7 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
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hal_rx_tid_get_6290,
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hal_rx_tid_get_6290,
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hal_rx_hw_desc_get_ppduid_get_6290,
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hal_rx_hw_desc_get_ppduid_get_6290,
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hal_rx_mpdu_start_mpdu_qos_control_valid_get_6290,
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hal_rx_mpdu_start_mpdu_qos_control_valid_get_6290,
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hal_rx_msdu_end_sa_sw_peer_id_get_6290,
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};
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};
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struct hal_hw_srng_config hw_srng_table_6290[] = {
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struct hal_hw_srng_config hw_srng_table_6290[] = {
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@@ -227,6 +227,12 @@
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_MASK, \
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_MASK, \
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_LSB))
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_LSB))
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#define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_msdu_end) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_16_SA_SW_PEER_ID_OFFSET)), \
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RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \
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RX_MSDU_END_16_SA_SW_PEER_ID_LSB))
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#if defined(QCA_WIFI_QCA6290_11AX)
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#if defined(QCA_WIFI_QCA6290_11AX)
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#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
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#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
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(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
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(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
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@@ -722,6 +722,23 @@ hal_rx_mpdu_start_mpdu_qos_control_valid_get_6390(uint8_t *buf)
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return HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(
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return HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(
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&mpdu_start->rx_mpdu_info_details);
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&mpdu_start->rx_mpdu_info_details);
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}
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}
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/**
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* hal_rx_msdu_end_sa_sw_peer_id_get_6390(): API to get the
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* sa_sw_peer_id from rx_msdu_end TLV
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* @buf: pointer to the start of RX PKT TLV headers
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*
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* Return: sa_sw_peer_id index
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*/
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static inline uint32_t
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hal_rx_msdu_end_sa_sw_peer_id_get_6390(uint8_t *buf)
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end);
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}
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struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
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struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
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/* init and setup */
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/* init and setup */
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hal_srng_dst_hw_init_generic,
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hal_srng_dst_hw_init_generic,
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@@ -788,6 +805,7 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
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hal_rx_tid_get_6390,
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hal_rx_tid_get_6390,
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hal_rx_hw_desc_get_ppduid_get_6390,
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hal_rx_hw_desc_get_ppduid_get_6390,
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hal_rx_mpdu_start_mpdu_qos_control_valid_get_6390,
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hal_rx_mpdu_start_mpdu_qos_control_valid_get_6390,
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hal_rx_msdu_end_sa_sw_peer_id_get_6390,
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};
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};
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struct hal_hw_srng_config hw_srng_table_6390[] = {
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struct hal_hw_srng_config hw_srng_table_6390[] = {
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@@ -233,6 +233,12 @@
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_MASK, \
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_MASK, \
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_LSB))
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_LSB))
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#define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_msdu_end) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_16_SA_SW_PEER_ID_OFFSET)), \
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RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \
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RX_MSDU_END_16_SA_SW_PEER_ID_LSB))
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/*
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/*
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* hal_rx_msdu_start_nss_get_6390(): API to get the NSS
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* hal_rx_msdu_start_nss_get_6390(): API to get the NSS
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* Interval from rx_msdu_start
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* Interval from rx_msdu_start
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@@ -637,4 +637,5 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
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hal_rx_tid_get_6490,
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hal_rx_tid_get_6490,
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hal_rx_hw_desc_get_ppduid_get_6490,
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hal_rx_hw_desc_get_ppduid_get_6490,
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NULL,
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NULL,
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NULL,
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};
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};
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@@ -207,3 +207,9 @@
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RX_MPDU_INFO_11_MPDU_QOS_CONTROL_VALID_OFFSET)),\
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RX_MPDU_INFO_11_MPDU_QOS_CONTROL_VALID_OFFSET)),\
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RX_MPDU_INFO_11_MPDU_QOS_CONTROL_VALID_MASK, \
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RX_MPDU_INFO_11_MPDU_QOS_CONTROL_VALID_MASK, \
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RX_MPDU_INFO_11_MPDU_QOS_CONTROL_VALID_LSB))
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RX_MPDU_INFO_11_MPDU_QOS_CONTROL_VALID_LSB))
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#define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_msdu_end) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_14_SA_SW_PEER_ID_OFFSET)), \
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RX_MSDU_END_14_SA_SW_PEER_ID_MASK, \
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RX_MSDU_END_14_SA_SW_PEER_ID_LSB))
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@@ -721,6 +721,22 @@ hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v1(uint8_t *buf)
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&mpdu_start->rx_mpdu_info_details);
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&mpdu_start->rx_mpdu_info_details);
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}
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}
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/**
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* hal_rx_msdu_end_sa_sw_peer_id_get_8074v1(): API to get the
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* sa_sw_peer_id from rx_msdu_end TLV
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* @buf: pointer to the start of RX PKT TLV headers
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*
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* Return: sa_sw_peer_id index
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*/
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static inline uint32_t
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hal_rx_msdu_end_sa_sw_peer_id_get_8074v1(uint8_t *buf)
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end);
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}
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struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
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struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
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/* init and setup */
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/* init and setup */
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@@ -788,6 +804,7 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
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hal_rx_tid_get_8074v1,
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hal_rx_tid_get_8074v1,
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hal_rx_hw_desc_get_ppduid_get_8074v1,
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hal_rx_hw_desc_get_ppduid_get_8074v1,
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hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v1,
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hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v1,
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hal_rx_msdu_end_sa_sw_peer_id_get_8074v1,
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};
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};
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struct hal_hw_srng_config hw_srng_table_8074[] = {
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struct hal_hw_srng_config hw_srng_table_8074[] = {
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@@ -215,6 +215,12 @@
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_OFFSET)), \
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_OFFSET)), \
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_MASK, \
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_MASK, \
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_LSB))
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RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_LSB))
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#define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_msdu_end) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_16_SA_SW_PEER_ID_OFFSET)), \
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RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \
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RX_MSDU_END_16_SA_SW_PEER_ID_LSB))
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/*
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/*
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* hal_rx_msdu_start_nss_get_8074(): API to get the NSS
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* hal_rx_msdu_start_nss_get_8074(): API to get the NSS
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* Interval from rx_msdu_start
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* Interval from rx_msdu_start
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@@ -718,6 +718,22 @@ hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v2(uint8_t *buf)
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&mpdu_start->rx_mpdu_info_details);
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&mpdu_start->rx_mpdu_info_details);
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}
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}
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/**
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* hal_rx_msdu_end_sa_sw_peer_id_get_8074v2(): API to get the
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* sa_sw_peer_id from rx_msdu_end TLV
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* @buf: pointer to the start of RX PKT TLV headers
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*
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* Return: sa_sw_peer_id index
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*/
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static inline uint32_t
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hal_rx_msdu_end_sa_sw_peer_id_get_8074v2(uint8_t *buf)
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end);
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}
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struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
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struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
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/* init and setup */
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/* init and setup */
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@@ -785,6 +801,7 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
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hal_rx_tid_get_8074v2,
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hal_rx_tid_get_8074v2,
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hal_rx_hw_desc_get_ppduid_get_8074v2,
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hal_rx_hw_desc_get_ppduid_get_8074v2,
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hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v2,
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hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v2,
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hal_rx_msdu_end_sa_sw_peer_id_get_8074v2,
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};
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};
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||||||
struct hal_hw_srng_config hw_srng_table_8074v2[] = {
|
struct hal_hw_srng_config hw_srng_table_8074v2[] = {
|
||||||
|
@@ -224,6 +224,13 @@
|
|||||||
RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_OFFSET)), \
|
RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_OFFSET)), \
|
||||||
RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_MASK, \
|
RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_MASK, \
|
||||||
RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_LSB))
|
RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_LSB))
|
||||||
|
|
||||||
|
#define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_msdu_end) \
|
||||||
|
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
|
||||||
|
RX_MSDU_END_16_SA_SW_PEER_ID_OFFSET)), \
|
||||||
|
RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \
|
||||||
|
RX_MSDU_END_16_SA_SW_PEER_ID_LSB))
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS
|
* hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS
|
||||||
* Interval from rx_msdu_start
|
* Interval from rx_msdu_start
|
||||||
|
@@ -727,6 +727,22 @@ hal_rx_mpdu_start_mpdu_qos_control_valid_get_9000(uint8_t *buf)
|
|||||||
&mpdu_start->rx_mpdu_info_details);
|
&mpdu_start->rx_mpdu_info_details);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* hal_rx_msdu_end_sa_sw_peer_id_get_9000(): API to get the
|
||||||
|
* sa_sw_peer_id from rx_msdu_end TLV
|
||||||
|
* @buf: pointer to the start of RX PKT TLV headers
|
||||||
|
*
|
||||||
|
* Return: sa_sw_peer_id index
|
||||||
|
*/
|
||||||
|
static inline uint32_t
|
||||||
|
hal_rx_msdu_end_sa_sw_peer_id_get_9000(uint8_t *buf)
|
||||||
|
{
|
||||||
|
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
|
||||||
|
struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
|
||||||
|
|
||||||
|
return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end);
|
||||||
|
}
|
||||||
|
|
||||||
struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
|
struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
|
||||||
|
|
||||||
/* init and setup */
|
/* init and setup */
|
||||||
@@ -794,6 +810,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
|
|||||||
hal_rx_tid_get_9000,
|
hal_rx_tid_get_9000,
|
||||||
hal_rx_hw_desc_get_ppduid_get_9000,
|
hal_rx_hw_desc_get_ppduid_get_9000,
|
||||||
hal_rx_mpdu_start_mpdu_qos_control_valid_9000,
|
hal_rx_mpdu_start_mpdu_qos_control_valid_9000,
|
||||||
|
hal_rx_msdu_end_sa_sw_peer_id_get_9000,
|
||||||
};
|
};
|
||||||
|
|
||||||
struct hal_hw_srng_config hw_srng_table_9000[] = {
|
struct hal_hw_srng_config hw_srng_table_9000[] = {
|
||||||
|
Reference in New Issue
Block a user