disp: msm: sde: clean up INTF2 interrupt masks

Clean up stale mask bits which were deprecated from
the HW for the past few generations.

Change-Id: Id6bc20557d1047f7bffbb9641248dfbe0170daf0
Signed-off-by: Jeykumar Sankaran <[email protected]>

msm/sde/sde_hw_interrupts.c

@@ -81,31 +81,6 @@
 #define SDE_INTR_INTF_2_VSYNC BIT(29)
 #define SDE_INTR_INTF_3_VSYNC BIT(31)
 
-/**
- * Pingpong Secondary interrupt status bit definitions
- */
-#define SDE_INTR_PING_PONG_S0_AUTOREFRESH_DONE BIT(0)
-#define SDE_INTR_PING_PONG_S0_WR_PTR BIT(4)
-#define SDE_INTR_PING_PONG_S0_RD_PTR BIT(8)
-#define SDE_INTR_PING_PONG_S0_TEAR_DETECTED BIT(22)
-#define SDE_INTR_PING_PONG_S0_TE_DETECTED BIT(28)
-
-/**
- * Pingpong TEAR detection interrupt status bit definitions
- */
-#define SDE_INTR_PING_PONG_0_TEAR_DETECTED BIT(16)
-#define SDE_INTR_PING_PONG_1_TEAR_DETECTED BIT(17)
-#define SDE_INTR_PING_PONG_2_TEAR_DETECTED BIT(18)
-#define SDE_INTR_PING_PONG_3_TEAR_DETECTED BIT(19)
-
-/**
- * Pingpong TE detection interrupt status bit definitions
- */
-#define SDE_INTR_PING_PONG_0_TE_DETECTED BIT(24)
-#define SDE_INTR_PING_PONG_1_TE_DETECTED BIT(25)
-#define SDE_INTR_PING_PONG_2_TE_DETECTED BIT(26)
-#define SDE_INTR_PING_PONG_3_TE_DETECTED BIT(27)
-
 /**
  * Ctl start interrupt status bit definitions
  */
@@ -119,11 +94,6 @@
 /**
  * Concurrent WB overflow interrupt status bit definitions
  */
-#define SDE_INTR_CWB_1_OVERFLOW BIT(8)
-#define SDE_INTR_CWB_2_OVERFLOW BIT(14)
-#define SDE_INTR_CWB_3_OVERFLOW BIT(15)
-#define SDE_INTR_CWB_4_OVERFLOW BIT(20)
-#define SDE_INTR_CWB_5_OVERFLOW BIT(21)
 #define SDE_INTR_CWB_OVERFLOW BIT(29)
 
 /**
@@ -300,17 +270,6 @@ static struct sde_irq_type sde_irq_intr_map[] = {
 };
 
 static struct sde_irq_type sde_irq_intr2_map[] = {
-
-	{ SDE_IRQ_TYPE_PING_PONG_AUTO_REF, PINGPONG_S0,
-		SDE_INTR_PING_PONG_S0_AUTOREFRESH_DONE, -1},
-	{ SDE_IRQ_TYPE_PING_PONG_WR_PTR, PINGPONG_S0,
-		SDE_INTR_PING_PONG_S0_WR_PTR, -1},
-
-	{ SDE_IRQ_TYPE_CWB_OVERFLOW, CWB_1, SDE_INTR_CWB_1_OVERFLOW, -1},
-
-	{ SDE_IRQ_TYPE_PING_PONG_RD_PTR, PINGPONG_S0,
-		SDE_INTR_PING_PONG_S0_RD_PTR, -1},
-
 	{ SDE_IRQ_TYPE_CTL_START, CTL_0,
 		SDE_INTR_CTL_0_START, -1},
 	{ SDE_IRQ_TYPE_CTL_START, CTL_1,
@@ -324,36 +283,6 @@ static struct sde_irq_type sde_irq_intr2_map[] = {
 	{ SDE_IRQ_TYPE_CTL_START, CTL_5,
 		SDE_INTR_CTL_5_START, -1},
 
-	{ SDE_IRQ_TYPE_CWB_OVERFLOW, CWB_2, SDE_INTR_CWB_2_OVERFLOW, -1},
-	{ SDE_IRQ_TYPE_CWB_OVERFLOW, CWB_3, SDE_INTR_CWB_3_OVERFLOW, -1},
-
-	{ SDE_IRQ_TYPE_PING_PONG_TEAR_CHECK, PINGPONG_0,
-		SDE_INTR_PING_PONG_0_TEAR_DETECTED, -1},
-	{ SDE_IRQ_TYPE_PING_PONG_TEAR_CHECK, PINGPONG_1,
-		SDE_INTR_PING_PONG_1_TEAR_DETECTED, -1},
-	{ SDE_IRQ_TYPE_PING_PONG_TEAR_CHECK, PINGPONG_2,
-		SDE_INTR_PING_PONG_2_TEAR_DETECTED, -1},
-	{ SDE_IRQ_TYPE_PING_PONG_TEAR_CHECK, PINGPONG_3,
-		SDE_INTR_PING_PONG_3_TEAR_DETECTED, -1},
-
-	{ SDE_IRQ_TYPE_CWB_OVERFLOW, CWB_4, SDE_INTR_CWB_4_OVERFLOW, -1},
-	{ SDE_IRQ_TYPE_CWB_OVERFLOW, CWB_5, SDE_INTR_CWB_5_OVERFLOW, -1},
-
-	{ SDE_IRQ_TYPE_PING_PONG_TEAR_CHECK, PINGPONG_S0,
-		SDE_INTR_PING_PONG_S0_TEAR_DETECTED, -1},
-
-	{ SDE_IRQ_TYPE_PING_PONG_TE_CHECK, PINGPONG_0,
-		SDE_INTR_PING_PONG_0_TE_DETECTED, -1},
-	{ SDE_IRQ_TYPE_PING_PONG_TE_CHECK, PINGPONG_1,
-		SDE_INTR_PING_PONG_1_TE_DETECTED, -1},
-	{ SDE_IRQ_TYPE_PING_PONG_TE_CHECK, PINGPONG_2,
-		SDE_INTR_PING_PONG_2_TE_DETECTED, -1},
-	{ SDE_IRQ_TYPE_PING_PONG_TE_CHECK, PINGPONG_3,
-		SDE_INTR_PING_PONG_3_TE_DETECTED, -1},
-
-	{ SDE_IRQ_TYPE_PING_PONG_TE_CHECK, PINGPONG_S0,
-		SDE_INTR_PING_PONG_S0_TE_DETECTED, -1},
-
 	{ SDE_IRQ_TYPE_CWB_OVERFLOW, PINGPONG_CWB_0, SDE_INTR_CWB_OVERFLOW, -1},
 
 	{ SDE_IRQ_TYPE_PING_PONG_COMP, PINGPONG_4,