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Merge "msm: camera: ope: Update for new IQ modules" into camera-kernel.lnx.5.0

Haritha Chintalapati 4 年之前
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4c06d9bc13

+ 1 - 1
drivers/cam_ope/ope_hw_mgr/ope_hw/ope_hw.h

@@ -14,7 +14,7 @@
 
 
 #define MAX_RD_CLIENTS   3
 #define MAX_RD_CLIENTS   3
 #define MAX_WR_CLIENTS   8
 #define MAX_WR_CLIENTS   8
-#define MAX_PP_CLIENTS   29
+#define MAX_PP_CLIENTS   32
 
 
 #define MAX_RW_CLIENTS   (MAX_RD_CLIENTS + MAX_WR_CLIENTS)
 #define MAX_RW_CLIENTS   (MAX_RD_CLIENTS + MAX_WR_CLIENTS)
 
 

+ 9 - 0
drivers/cam_ope/ope_hw_mgr/ope_hw/ope_hw_100.h

@@ -726,6 +726,15 @@ static struct cam_ope_pp_reg ope_pp_reg = {
 		{
 		{
 			.hw_status = 0x3C04,
 			.hw_status = 0x3C04,
 		},
 		},
+		{
+			.hw_status = 0x3E04,
+		},
+		{
+			.hw_status = 0x4004,
+		},
+		{
+			.hw_status = 0x4204,
+		},
 	},
 	},
 };
 };
 
 

+ 18 - 0
drivers/cam_ope/ope_hw_mgr/ope_hw/top/ope_top.c

@@ -34,8 +34,12 @@ static int cam_ope_top_dump_debug_reg(struct ope_hw *ope_hw_info)
 {
 {
 	uint32_t i, val[3];
 	uint32_t i, val[3];
 	struct cam_ope_top_reg *top_reg;
 	struct cam_ope_top_reg *top_reg;
+	struct cam_ope_pp_reg *pp_reg;
+	uint32_t pp_hw_status = 0;
 
 
 	top_reg = ope_hw_info->top_reg;
 	top_reg = ope_hw_info->top_reg;
+	pp_reg = ope_hw_info->pp_reg;
+
 	for (i = 0; i < top_reg->num_debug_registers; i = i+3) {
 	for (i = 0; i < top_reg->num_debug_registers; i = i+3) {
 		val[0] = cam_io_r_mb(top_reg->base +
 		val[0] = cam_io_r_mb(top_reg->base +
 			top_reg->debug_regs[i].offset);
 			top_reg->debug_regs[i].offset);
@@ -53,6 +57,20 @@ static int cam_ope_top_dump_debug_reg(struct ope_hw *ope_hw_info)
 	CAM_INFO(CAM_OPE, "scrath reg: 0x%x, stripe_idx: %d",
 	CAM_INFO(CAM_OPE, "scrath reg: 0x%x, stripe_idx: %d",
 		top_reg->offset + top_reg->scratch_reg,
 		top_reg->offset + top_reg->scratch_reg,
 		cam_io_r_mb(top_reg->base + top_reg->scratch_reg));
 		cam_io_r_mb(top_reg->base + top_reg->scratch_reg));
+
+	for (i = 0; i < pp_reg->num_clients ; i++) {
+		pp_hw_status = 0;
+		pp_hw_status =
+			cam_io_r_mb(pp_reg->base +
+				pp_reg->pp_clients[i]
+					.hw_status);
+
+		if (pp_hw_status)
+			CAM_ERR(CAM_OPE,
+				"ope pp hw_status offset 0x%x val 0x%x",
+				pp_reg->pp_clients[i].hw_status,
+				pp_hw_status);
+	}
 	return 0;
 	return 0;
 }
 }