Merge "msm: camera: ope: Update for new IQ modules" into camera-kernel.lnx.5.0
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4c06d9bc13
@@ -14,7 +14,7 @@
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#define MAX_RD_CLIENTS 3
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#define MAX_WR_CLIENTS 8
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#define MAX_PP_CLIENTS 29
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#define MAX_PP_CLIENTS 32
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#define MAX_RW_CLIENTS (MAX_RD_CLIENTS + MAX_WR_CLIENTS)
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@@ -726,6 +726,15 @@ static struct cam_ope_pp_reg ope_pp_reg = {
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{
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.hw_status = 0x3C04,
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},
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{
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.hw_status = 0x3E04,
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},
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{
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.hw_status = 0x4004,
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},
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{
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.hw_status = 0x4204,
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},
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},
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};
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@@ -34,8 +34,12 @@ static int cam_ope_top_dump_debug_reg(struct ope_hw *ope_hw_info)
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{
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uint32_t i, val[3];
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struct cam_ope_top_reg *top_reg;
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struct cam_ope_pp_reg *pp_reg;
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uint32_t pp_hw_status = 0;
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top_reg = ope_hw_info->top_reg;
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pp_reg = ope_hw_info->pp_reg;
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for (i = 0; i < top_reg->num_debug_registers; i = i+3) {
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val[0] = cam_io_r_mb(top_reg->base +
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top_reg->debug_regs[i].offset);
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@@ -53,6 +57,20 @@ static int cam_ope_top_dump_debug_reg(struct ope_hw *ope_hw_info)
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CAM_INFO(CAM_OPE, "scrath reg: 0x%x, stripe_idx: %d",
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top_reg->offset + top_reg->scratch_reg,
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cam_io_r_mb(top_reg->base + top_reg->scratch_reg));
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for (i = 0; i < pp_reg->num_clients ; i++) {
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pp_hw_status = 0;
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pp_hw_status =
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cam_io_r_mb(pp_reg->base +
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pp_reg->pp_clients[i]
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.hw_status);
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if (pp_hw_status)
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CAM_ERR(CAM_OPE,
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"ope pp hw_status offset 0x%x val 0x%x",
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pp_reg->pp_clients[i].hw_status,
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pp_hw_status);
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}
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return 0;
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}
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