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qcacmn: Fix batch interrupt threshold logic for WCN6450

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Unlike lithium family, batch interrupt thresholds for Rhine targets
are not based on the entry size (descriptor size in dwords); Instead
the configuration should be a simple integer value. If interrupt has
to be raised after every copy transaction then batch counter threshold
shall be set to 1, so on and so forth.

Change-Id: Ic51f361c5f079d48668ec9b46dd79f04bcb43b14
CRs-Fixed: 3659426
This commit is contained in:
Manikanta Pubbisetty
2023-11-08 14:55:22 +05:30
committed by Ravindra Konda
parent eef8ab17ed
commit 4bafb26a4c
1 changed files with 2 additions and 4 deletions
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6
hif/src/ce/ce_service_legacy.c
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@@ -1418,9 +1418,8 @@ static void ce_legacy_src_ring_setup(struct hif_softc *scn, uint32_t ce_id,
if (!(CE_ATTR_DISABLE_INTR & attr->flags)) {
/* In 8us units */
timer_thrs = CE_SRC_BATCH_TIMER_THRESHOLD >> 3;
/* Batch counter threshold 1 in Dwrod units */
count_thrs = (CE_SRC_BATCH_COUNTER_THRESHOLD *
(sizeof(struct CE_src_desc) >> 2));
count_thrs = CE_SRC_BATCH_COUNTER_THRESHOLD;
ce_legacy_msi_param_setup(scn, ctrl_addr, ce_id, attr);
ce_legacy_src_intr_thres_setup(scn, ctrl_addr, attr,
timer_thrs, count_thrs);
@@ -1470,7 +1469,6 @@ static void ce_legacy_dest_ring_setup(struct hif_softc *scn, uint32_t ce_id,
if (!(CE_ATTR_DISABLE_INTR & attr->flags)) {
/* In 8us units */
timer_thrs = CE_DST_BATCH_TIMER_THRESHOLD >> 3;
/* Batch counter threshold 1 in Dwrod units */
count_thrs = CE_DST_BATCH_COUNTER_THRESHOLD;
ce_legacy_msi_param_setup(scn, ctrl_addr, ce_id, attr);