Merge "msm: camera: isp: Add new ports for TFE" into camera-kernel.lnx.5.0

drivers/cam_isp/cam_isp_context.c

@@ -616,6 +616,14 @@ static const char *__cam_isp_tfe_resource_handle_id_to_type(
 		return "STATS_BF";
 	case CAM_ISP_TFE_OUT_RES_STATS_AWB_BG:
 		return "STATS_AWB_BG";
+	case CAM_ISP_TFE_OUT_RES_STATS_RS:
+		return "STATS_RS";
+	case CAM_ISP_TFE_OUT_RES_DS4:
+		return "DS_4";
+	case CAM_ISP_TFE_OUT_RES_DS16:
+		return "DS_16";
+	case CAM_ISP_TFE_OUT_RES_AI:
+		return "AI";
 	default:
 		return "CAM_ISP_Invalid_Resource_Type";
 	}

drivers/cam_isp/isp_hw_mgr/cam_tfe_hw_mgr.c

@@ -1651,9 +1651,16 @@ static int cam_tfe_hw_mgr_preprocess_port(
 	uint32_t i;
 	struct cam_isp_tfe_out_port_info      *out_port;
 	struct cam_tfe_hw_mgr                 *tfe_hw_mgr;
+	struct cam_hw_intf                    *tfe_device;
+	bool pdaf_rdi2_mux_en = false;
 
 	tfe_hw_mgr = tfe_ctx->hw_mgr;
+	tfe_device = tfe_hw_mgr->tfe_devices[0]->hw_intf;
 
+	tfe_device->hw_ops.process_cmd(tfe_device->hw_priv,
+		CAM_ISP_HW_CMD_IS_PDAF_RDI2_MUX_EN,
+		&pdaf_rdi2_mux_en,
+		sizeof(pdaf_rdi2_mux_en));
 
 	for (i = 0; i < in_port->num_out_res; i++) {
 		out_port = &in_port->data[i];
@@ -1670,8 +1677,9 @@ static int cam_tfe_hw_mgr_preprocess_port(
 		}
 	}
 
-	if (*pdaf_enable && rdi2_enable) {
-		CAM_ERR(CAM_ISP, "invalid outports both RDI2 and PDAF enabled");
+	if (pdaf_rdi2_mux_en && *pdaf_enable && rdi2_enable) {
+		CAM_ERR(CAM_ISP,
+			"invalid outports both RDI2 and PDAF enabled");
 		return -EINVAL;
 	}
 

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_isp_hw.h

@@ -147,6 +147,7 @@ enum cam_isp_hw_cmd_type {
 	CAM_ISP_HW_CMD_BUF_UPDATE,
 	CAM_ISP_HW_CMD_BUF_UPDATE_RM,
 	CAM_ISP_HW_NOTIFY_OVERFLOW,
+	CAM_ISP_HW_CMD_IS_PDAF_RDI2_MUX_EN,
 	CAM_ISP_HW_CMD_MAX,
 };
 

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe.c

@@ -1,10 +1,11 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  */
 
 #include <linux/module.h>
 #include "cam_tfe530.h"
+#include "cam_tfe640.h"
 #include "cam_tfe_hw_intf.h"
 #include "cam_tfe_core.h"
 #include "cam_tfe_dev.h"
@@ -15,6 +16,10 @@ static const struct of_device_id cam_tfe_dt_match[] = {
 		.compatible = "qcom,tfe530",
 		.data = &cam_tfe530,
 	},
+	{
+		.compatible = "qcom,tfe640",
+		.data = &cam_tfe640,
+	},
 	{}
 };
 MODULE_DEVICE_TABLE(of, cam_tfe_dt_match);

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe530.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  */
 
 
@@ -11,38 +11,46 @@
 
 
 static struct cam_tfe_top_reg_offset_common  tfe530_top_commong_reg  = {
-	.hw_version                   = 0x00001000,
-	.hw_capability                = 0x00001004,
-	.lens_feature                 = 0x00001008,
-	.stats_feature                = 0x0000100C,
-	.zoom_feature                 = 0x00001010,
-	.global_reset_cmd             = 0x00001014,
-	.core_cgc_ctrl                = 0x00001018,
-	.ahb_cgc_ctrl                 = 0x0000101C,
-	.core_cfg_0                   = 0x00001024,
-	.core_cfg_1                   = 0x00001028,
-	.reg_update_cmd               = 0x0000102C,
-	.diag_config                  = 0x00001060,
-	.diag_sensor_status_0         = 0x00001064,
-	.diag_sensor_status_1         = 0x00001068,
-	.diag_sensor_frame_cnt_status = 0x0000106C,
-	.violation_status             = 0x00001070,
-	.stats_throttle_cnt_cfg_0     = 0x00001074,
-	.stats_throttle_cnt_cfg_1     = 0x00001078,
-	.debug_0                      = 0x000010A0,
-	.debug_1                      = 0x000010A4,
-	.debug_2                      = 0x000010A8,
-	.debug_3                      = 0x000010AC,
-	.debug_cfg                    = 0x000010DC,
-	.perf_cnt_cfg                 = 0x000010E0,
-	.perf_pixel_count             = 0x000010E4,
-	.perf_line_count              = 0x000010E8,
-	.perf_stall_count             = 0x000010EC,
-	.perf_always_count            = 0x000010F0,
-	.perf_count_status            = 0x000010F4,
-	.diag_min_hbi_error_shift     = 15,
-	.diag_neq_hbi_shift           = 14,
-	.diag_sensor_hbi_mask         = 0x3FFF,
+	.hw_version                             = 0x00001000,
+	.hw_capability                          = 0x00001004,
+	.lens_feature                           = 0x00001008,
+	.stats_feature                          = 0x0000100C,
+	.zoom_feature                           = 0x00001010,
+	.global_reset_cmd                       = 0x00001014,
+	.core_cgc_ctrl                          = 0x00001018,
+	.ahb_cgc_ctrl                           = 0x0000101C,
+	.core_cfg_0                             = 0x00001024,
+	.core_cfg_1                             = 0x00001028,
+	.reg_update_cmd                         = 0x0000102C,
+	.diag_config                            = 0x00001060,
+	.diag_sensor_status_0                   = 0x00001064,
+	.diag_sensor_status_1                   = 0x00001068,
+	.diag_sensor_frame_cnt_status           = 0x0000106C,
+	.violation_status                       = 0x00001070,
+	.stats_throttle_cnt_cfg_0               = 0x00001074,
+	.stats_throttle_cnt_cfg_1               = 0x00001078,
+	.num_debug_reg                          = 4,
+	.debug_reg = {
+		0x000010A0,
+		0x000010A4,
+		0x000010A8,
+		0x000010AC,
+	},
+	.debug_cfg                              = 0x000010DC,
+	.num_perf_cfg                           = 1,
+	.perf_cfg = {
+		{
+			.perf_cnt_cfg           = 0x000010E0,
+			.perf_pixel_count       = 0x000010E4,
+			.perf_line_count        = 0x000010E8,
+			.perf_stall_count       = 0x000010EC,
+			.perf_always_count      = 0x000010F0,
+			.perf_count_status      = 0x000010F4,
+		},
+	},
+	.diag_min_hbi_error_shift               = 15,
+	.diag_neq_hbi_shift                     = 14,
+	.diag_sensor_hbi_mask                   = 0x3FFF,
 };
 
 static struct cam_tfe_camif_reg  tfe530_camif_reg = {
@@ -459,7 +467,7 @@ static struct cam_tfe_bus_hw_info  tfe530_bus_hw_info = {
 		.violation_shift  = 30,
 		.image_size_violation = 31,
 	},
-	.num_client = CAM_TFE_BUS_MAX_CLIENTS,
+	.num_client = 10,
 	.bus_client_reg = {
 		/* BUS Client 0 BAYER */
 		{
@@ -742,7 +750,7 @@ static struct cam_tfe_bus_hw_info  tfe530_bus_hw_info = {
 			.client_name           = "RDI2/PADF",
 		},
 	},
-	.num_out  = CAM_TFE_BUS_TFE_OUT_MAX,
+	.num_out  = 11,
 	.tfe_out_hw_info = {
 		{
 			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_RDI0,
@@ -833,6 +841,7 @@ static struct cam_tfe_bus_hw_info  tfe530_bus_hw_info = {
 			.mid              = 22,
 		},
 	},
+	.num_comp_grp             = 8,
 	.comp_done_shift          = 8,
 	.top_bus_wr_irq_shift     = 1,
 	.comp_buf_done_mask = 0xFF00,
@@ -842,6 +851,7 @@ static struct cam_tfe_bus_hw_info  tfe530_bus_hw_info = {
 		0x00000000,
 	},
 	.support_consumed_addr = true,
+	.pdaf_rdi2_mux_en = true,
 };
 
 struct cam_tfe_hw_info cam_tfe530 = {

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe640.h

@@ -0,0 +1,1235 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ */
+
+
+#ifndef _CAM_TFE640_H_
+#define _CAM_TFE640_H_
+#include "cam_tfe_core.h"
+#include "cam_tfe_bus.h"
+
+
+static struct cam_tfe_top_reg_offset_common  tfe640_top_commong_reg  = {
+	.hw_version                             = 0x00001800,
+	.hw_capability                          = 0x00001804,
+	.lens_feature                           = 0x00001808,
+	.stats_feature                          = 0x0000180C,
+	.zoom_feature                           = 0x00001810,
+	.global_reset_cmd                       = 0x00001814,
+	.core_cgc_ctrl                          = 0x00001818,
+	.ahb_cgc_ctrl                           = 0x0000181C,
+	.core_cfg_0                             = 0x00001824,
+	.reg_update_cmd                         = 0x0000182C,
+	.diag_config                            = 0x00001860,
+	.diag_sensor_status_0                   = 0x00001864,
+	.diag_sensor_status_1                   = 0x00001868,
+	.diag_sensor_frame_cnt_status           = 0x0000186C,
+	.violation_status                       = 0x00001870,
+	.stats_throttle_cnt_cfg_0               = 0x00001874,
+	.stats_throttle_cnt_cfg_1               = 0x00001878,
+	.num_debug_reg                          = 10,
+	.debug_reg = {
+		0x000018A0,
+		0x000018A4,
+		0x000018A8,
+		0x000018AC,
+		0x000018B0,
+		0x000018B4,
+		0x000018B8,
+		0x000018BC,
+		0x000018C0,
+		0x000018C4,
+	},
+	.debug_cfg                              = 0x000018DC,
+	.num_perf_cfg                           = 2,
+	.perf_cfg = {
+		{
+			.perf_cnt_cfg           = 0x000018E0,
+			.perf_pixel_count       = 0x000018E4,
+			.perf_line_count        = 0x000018E8,
+			.perf_stall_count       = 0x000018EC,
+			.perf_always_count      = 0x000018F0,
+			.perf_count_status      = 0x000018F4,
+		},
+		{
+			.perf_cnt_cfg           = 0x000018F8,
+			.perf_pixel_count       = 0x000018FC,
+			.perf_line_count        = 0x00001900,
+			.perf_stall_count       = 0x00001904,
+			.perf_always_count      = 0x00001908,
+			.perf_count_status      = 0x0000190C,
+		},
+	},
+	.diag_min_hbi_error_shift               = 15,
+	.diag_neq_hbi_shift                     = 14,
+	.diag_sensor_hbi_mask                   = 0x3FFF,
+};
+
+static struct cam_tfe_camif_reg  tfe640_camif_reg = {
+	.hw_version                   = 0x00001C00,
+	.hw_status                    = 0x00001C04,
+	.module_cfg                   = 0x00001C60,
+	.pdaf_raw_crop_width_cfg      = 0x00001C68,
+	.pdaf_raw_crop_height_cfg     = 0x00001C6C,
+	.line_skip_pattern            = 0x00001C70,
+	.pixel_skip_pattern           = 0x00001C74,
+	.period_cfg                   = 0x00001C78,
+	.irq_subsample_pattern        = 0x00001C7C,
+	.epoch_irq_cfg                = 0x00001C80,
+	.debug_1                      = 0x00001DF0,
+	.debug_0                      = 0x00001DF4,
+	.test_bus_ctrl                = 0x00001DF8,
+	.spare                        = 0x00001DFC,
+	.reg_update_cmd               = 0x0000182C,
+};
+
+static struct cam_tfe_camif_reg_data tfe640_camif_reg_data = {
+	.extern_reg_update_mask       = 0x00000001,
+	.dual_tfe_pix_en_shift        = 0x00000001,
+	.extern_reg_update_shift      = 0x0,
+	.dual_tfe_sync_sel_shift      = 18,
+	.delay_line_en_shift          = 8,
+	.pixel_pattern_shift          = 24,
+	.pixel_pattern_mask           = 0x7000000,
+	.module_enable_shift          = 0,
+	.pix_out_enable_shift         = 8,
+	.pdaf_output_enable_shift     = 9,
+	.dsp_mode_shift               = 0,
+	.dsp_mode_mask                = 0,
+	.dsp_en_shift                 = 0,
+	.dsp_en_mask                  = 0,
+	.reg_update_cmd_data          = 0x1,
+	.epoch_line_cfg               = 0x00140014,
+	.sof_irq_mask                 = 0x00000001,
+	.epoch0_irq_mask              = 0x00000004,
+	.epoch1_irq_mask              = 0x00000008,
+	.eof_irq_mask                 = 0x00000002,
+	.reg_update_irq_mask          = 0x00000001,
+	.error_irq_mask0              = 0x00010100,
+	.error_irq_mask2              = 0x00000023,
+	.subscribe_irq_mask           = {
+		0x00000000,
+		0x00000007,
+		0x00000000,
+	},
+	.enable_diagnostic_hw         = 0x1,
+	.perf_cnt_start_cmd_shift     = 0,
+	.perf_cnt_continuous_shift    = 2,
+	.perf_client_sel_shift        = 8,
+	.perf_window_start_shift      = 16,
+	.perf_window_end_shift        = 20,
+};
+
+static struct cam_tfe_rdi_reg  tfe640_rdi0_reg = {
+	.rdi_hw_version              = 0x00001E00,
+	.rdi_hw_status               = 0x00001E04,
+	.rdi_module_config           = 0x00001E60,
+	.rdi_skip_period             = 0x00001E68,
+	.rdi_irq_subsample_pattern   = 0x00001E6C,
+	.rdi_epoch_irq               = 0x00001E70,
+	.rdi_debug_1                 = 0x00001FF0,
+	.rdi_debug_0                 = 0x00001FF4,
+	.rdi_test_bus_ctrl           = 0x00001FF8,
+	.rdi_spare                   = 0x00001FFC,
+	.reg_update_cmd              = 0x0000182C,
+};
+
+static struct cam_tfe_rdi_reg_data tfe640_rdi0_reg_data = {
+	.reg_update_cmd_data         = 0x2,
+	.epoch_line_cfg              = 0x00140014,
+	.pixel_pattern_shift         = 24,
+	.pixel_pattern_mask          = 0x07000000,
+	.rdi_out_enable_shift        = 0,
+
+	.sof_irq_mask                = 0x00000010,
+	.epoch0_irq_mask             = 0x00000040,
+	.epoch1_irq_mask             = 0x00000080,
+	.eof_irq_mask                = 0x00000020,
+	.error_irq_mask0             = 0x00020200,
+	.error_irq_mask2             = 0x00000004,
+	.subscribe_irq_mask          = {
+		0x00000000,
+		0x00000030,
+		0x00000000,
+	},
+	.enable_diagnostic_hw        = 0x1,
+	.diag_sensor_sel             = 0x1,
+	.diag_sensor_shift           = 0x1,
+};
+
+static struct cam_tfe_rdi_reg  tfe640_rdi1_reg = {
+	.rdi_hw_version              = 0x00002000,
+	.rdi_hw_status               = 0x00002004,
+	.rdi_module_config           = 0x00002060,
+	.rdi_skip_period             = 0x00002068,
+	.rdi_irq_subsample_pattern   = 0x0000206C,
+	.rdi_epoch_irq               = 0x00002070,
+	.rdi_debug_1                 = 0x000021F0,
+	.rdi_debug_0                 = 0x000021F4,
+	.rdi_test_bus_ctrl           = 0x000021F8,
+	.rdi_spare                   = 0x000021FC,
+	.reg_update_cmd              = 0x0000182C,
+};
+
+static struct cam_tfe_rdi_reg_data tfe640_rdi1_reg_data = {
+	.reg_update_cmd_data         = 0x4,
+	.epoch_line_cfg              = 0x00140014,
+	.pixel_pattern_shift         = 24,
+	.pixel_pattern_mask          = 0x07000000,
+	.rdi_out_enable_shift        = 0,
+
+	.sof_irq_mask                = 0x00000100,
+	.epoch0_irq_mask             = 0x00000400,
+	.epoch1_irq_mask             = 0x00000800,
+	.eof_irq_mask                = 0x00000200,
+	.error_irq_mask0             = 0x00040400,
+	.error_irq_mask2             = 0x00000008,
+	.subscribe_irq_mask          = {
+		0x00000000,
+		0x00000300,
+		0x00000000,
+	},
+	.enable_diagnostic_hw        = 0x1,
+	.diag_sensor_sel             = 0x2,
+	.diag_sensor_shift           = 0x1,
+};
+
+static struct cam_tfe_rdi_reg  tfe640_rdi2_reg = {
+	.rdi_hw_version              = 0x00002200,
+	.rdi_hw_status               = 0x00002204,
+	.rdi_module_config           = 0x00002260,
+	.rdi_skip_period             = 0x00002268,
+	.rdi_irq_subsample_pattern   = 0x0000226C,
+	.rdi_epoch_irq               = 0x00002270,
+	.rdi_debug_1                 = 0x000023F0,
+	.rdi_debug_0                 = 0x000023F4,
+	.rdi_test_bus_ctrl           = 0x000023F8,
+	.rdi_spare                   = 0x000023FC,
+	.reg_update_cmd              = 0x0000182C,
+};
+
+static struct cam_tfe_rdi_reg_data tfe640_rdi2_reg_data = {
+	.reg_update_cmd_data         = 0x8,
+	.epoch_line_cfg              = 0x00140014,
+	.pixel_pattern_shift         = 24,
+	.pixel_pattern_mask          = 0x07000000,
+	.rdi_out_enable_shift        = 0,
+
+	.sof_irq_mask                = 0x00001000,
+	.epoch0_irq_mask             = 0x00004000,
+	.epoch1_irq_mask             = 0x00008000,
+	.eof_irq_mask                = 0x00002000,
+	.error_irq_mask0             = 0x00080800,
+	.error_irq_mask2             = 0x00000004,
+	.subscribe_irq_mask          = {
+		0x00000000,
+		0x00003000,
+		0x00000000,
+	},
+	.enable_diagnostic_hw        = 0x1,
+	.diag_sensor_sel             = 0x3,
+	.diag_sensor_shift           = 0x1,
+
+};
+
+static struct cam_tfe_clc_hw_status  tfe640_clc_hw_info[CAM_TFE_MAX_CLC] = {
+	{
+		.name = "CLC_CAMIF",
+		.hw_status_reg = 0x1C04,
+	},
+	{
+		.name = "CLC_RDI0_CAMIF",
+		.hw_status_reg = 0x1E04,
+	},
+	{
+		.name = "CLC_RDI1_CAMIF",
+		.hw_status_reg = 0x2004,
+	},
+	{
+		.name = "CLC_RDI2_CAMIF",
+		.hw_status_reg = 0x2204,
+	},
+	{
+		.name = "CLC_CHANNEL_GAIN",
+		.hw_status_reg = 0x6004,
+	},
+	{
+		.name = "CLC_BPC_PDPC",
+		.hw_status_reg = 0x6204,
+	},
+	{
+		.name = "CLC_LCS",
+		.hw_status_reg = 0x6404,
+	},
+	{
+		.name = "CLC_SHARED_LB",
+		.hw_status_reg = 0x6604,
+	},
+	{
+		.name = "CLC_WB_BDS",
+		.hw_status_reg = 0x6804,
+	},
+	{
+		.name = "CLC_CROP_RND_CLAMP_POST_BDS",
+		.hw_status_reg = 0x6A04,
+	},
+	{
+		.name = "CLC_BLS",
+		.hw_status_reg = 0x6C04,
+	},
+	{
+		.name = "CLC_BAYER_GLUT",
+		.hw_status_reg = 0x6E04,
+	},
+	{
+		.name = "CLC_BAYER_DS4",
+		.hw_status_reg = 0x7004,
+	},
+	{
+		.name = "CLC_COLOR_XFORM_DS4",
+		.hw_status_reg = 0x7204,
+	},
+	{
+		.name = "CLC_CHROMA_DS2",
+		.hw_status_reg = 0x7404,
+	},
+	{
+		.name = "CLC_CROP_RND_CLAMP_Y_DS4",
+		.hw_status_reg = 0x7604,
+	},
+	{
+		.name = "CLC_CROP_RND_CLAMP_C_DS4",
+		.hw_status_reg = 0x7804,
+	},
+	{
+		.name = "CLC_R2PD_DS4",
+		.hw_status_reg = 0x7A04,
+	},
+	{
+		.name = "CLC_DOWNSCALE_4TO1_Y",
+		.hw_status_reg = 0x7C04,
+	},
+	{
+		.name = "CLC_DOWNSCALE_4TO1_C",
+		.hw_status_reg = 0x7E04,
+	},
+	{
+		.name = "CLC_CROP_RND_CLAMP_Y_DS16",
+		.hw_status_reg = 0x8004,
+	},
+	{
+		.name = "CLC_CROP_RND_CLAMP_C_DS16",
+		.hw_status_reg = 0x8204,
+	},
+	{
+		.name = "CLC_R2PD_DS16",
+		.hw_status_reg = 0x8404,
+	},
+	{
+		.name = "CLC_WB_GAIN",
+		.hw_status_reg = 0x8604,
+	},
+	{
+		.name = "CLC_BAYER_DS2",
+		.hw_status_reg = 0x8804,
+	},
+	{
+		.name = "CLC_GTM",
+		.hw_status_reg = 0x8A04,
+	},
+	{
+		.name = "CLC_COLOR_XFORM_AI_DS",
+		.hw_status_reg = 0x8C04,
+	},
+	{
+		.name = "CLC_DOWNSCALE_MN_Y",
+		.hw_status_reg = 0x8E04,
+	},
+	{
+		.name = "CLC_DOWNSCALE_MN_C",
+		.hw_status_reg = 0x9004,
+	},
+	{
+		.name = "CLC_CROP_RND_CLAMP_Y_AI_DS",
+		.hw_status_reg = 0x9204,
+	},
+	{
+		.name = "CLC_CROP_RND_CLAMP_C_AI_DS",
+		.hw_status_reg = 0x9404,
+	},
+	{
+		.name = "CLC_CROP_RND_CLAMP_IDEAL_RAW",
+		.hw_status_reg = 0x9604,
+	},
+	{
+		.name = "CLC_ABF",
+		.hw_status_reg = 0x9804,
+	},
+	{
+		.name = "CLC_STATS_BG",
+		.hw_status_reg = 0x9A04,
+	},
+	{
+		.name = "CLC_STATS_BHIST",
+		.hw_status_reg = 0x9C04,
+	},
+	{
+		.name = "CLC_STATS_AWB_BG",
+		.hw_status_reg = 0x9E04,
+	},
+	{
+		.name = "CLC_STATS_AEC_BG",
+		.hw_status_reg = 0xA004,
+	},
+	{
+		.name = "CLC_STATS_BAF",
+		.hw_status_reg = 0xA204,
+	},
+	{
+		.name = "CLC_STATS_RS",
+		.hw_status_reg = 0xA404,
+	},
+};
+
+static struct  cam_tfe_top_hw_info tfe640_top_hw_info = {
+	.common_reg = &tfe640_top_commong_reg,
+	.camif_hw_info = {
+		.camif_reg = &tfe640_camif_reg,
+		.reg_data  = &tfe640_camif_reg_data,
+	},
+	.rdi_hw_info  = {
+		{
+			.rdi_reg  = &tfe640_rdi0_reg,
+			.reg_data = &tfe640_rdi0_reg_data,
+		},
+		{
+			.rdi_reg  = &tfe640_rdi1_reg,
+			.reg_data = &tfe640_rdi1_reg_data,
+		},
+		{
+			.rdi_reg  = &tfe640_rdi2_reg,
+			.reg_data = &tfe640_rdi2_reg_data,
+		},
+	},
+	.in_port = {
+		CAM_TFE_CAMIF_VER_1_0,
+		CAM_TFE_RDI_VER_1_0,
+		CAM_TFE_RDI_VER_1_0,
+		CAM_TFE_RDI_VER_1_0
+	},
+	.reg_dump_data  = {
+		.num_reg_dump_entries    = 19,
+		.num_lut_dump_entries    = 0,
+		.bus_start_addr          = 0x2000,
+		.bus_write_top_end_addr  = 0x2120,
+		.bus_client_start_addr   = 0x2200,
+		.bus_client_offset       = 0x100,
+		.num_bus_clients         = 10,
+		.reg_entry = {
+			{
+				.start_offset = 0x1000,
+				.end_offset   = 0x10F4,
+			},
+			{
+				.start_offset = 0x1260,
+				.end_offset   = 0x1280,
+			},
+			{
+				.start_offset = 0x13F0,
+				.end_offset   = 0x13FC,
+			},
+			{
+				.start_offset = 0x1460,
+				.end_offset   = 0x1470,
+			},
+			{
+				.start_offset = 0x15F0,
+				.end_offset   = 0x15FC,
+			},
+			{
+				.start_offset = 0x1660,
+				.end_offset   = 0x1670,
+			},
+			{
+				.start_offset = 0x17F0,
+				.end_offset   = 0x17FC,
+			},
+			{
+				.start_offset = 0x1860,
+				.end_offset   = 0x1870,
+			},
+			{
+				.start_offset = 0x19F0,
+				.end_offset   = 0x19FC,
+			},
+			{
+				.start_offset = 0x2660,
+				.end_offset   = 0x2694,
+			},
+			{
+				.start_offset = 0x2860,
+				.end_offset   = 0x2884,
+			},
+			{
+				.start_offset = 0x2A60,
+				.end_offset   = 0X2B34,
+			},
+			{
+				.start_offset = 0x2C60,
+				.end_offset   = 0X2C80,
+			},
+			{
+				.start_offset = 0x2E60,
+				.end_offset   = 0X2E7C,
+			},
+			{
+				.start_offset = 0x3060,
+				.end_offset   = 0X3110,
+			},
+			{
+				.start_offset = 0x3260,
+				.end_offset   = 0X3278,
+			},
+			{
+				.start_offset = 0x3460,
+				.end_offset   = 0X3478,
+			},
+			{
+				.start_offset = 0x3660,
+				.end_offset   = 0X3684,
+			},
+			{
+				.start_offset = 0x3860,
+				.end_offset   = 0X3884,
+			},
+		},
+		.lut_entry = {
+			{
+				.lut_word_size = 1,
+				.lut_bank_sel  = 0x40,
+				.lut_addr_size = 180,
+				.dmi_reg_offset = 0x2800,
+			},
+			{
+				.lut_word_size = 1,
+				.lut_bank_sel  = 0x41,
+				.lut_addr_size = 180,
+				.dmi_reg_offset = 0x3000,
+			},
+		},
+	},
+};
+
+static struct cam_tfe_bus_hw_info  tfe640_bus_hw_info = {
+	.common_reg = {
+		.hw_version  = 0x00003000,
+		.cgc_ovd     = 0x00003008,
+		.comp_cfg_0  = 0x0000300C,
+		.comp_cfg_1  = 0x00003010,
+		.frameheader_cfg  = {
+			0x00003034,
+			0x00003038,
+			0x0000303C,
+			0x00003040,
+		},
+		.pwr_iso_cfg = 0x0000305C,
+		.overflow_status_clear = 0x00003060,
+		.ccif_violation_status = 0x00003064,
+		.overflow_status       = 0x00003068,
+		.image_size_violation_status = 0x00003070,
+		.perf_count_cfg = {
+			0x00003074,
+			0x00003078,
+			0x0000307C,
+			0x00003080,
+			0x00003084,
+			0x00003088,
+			0x0000308C,
+			0x00003090,
+		},
+		.perf_count_val = {
+			0x00003094,
+			0x00003098,
+			0x0000309C,
+			0x000030A0,
+			0x000030A4,
+			0x000030A8,
+			0x000030AC,
+			0x000030B0,
+		},
+		.perf_count_status = 0x000030B4,
+		.debug_status_top_cfg = 0x000030D4,
+		.debug_status_top = 0x000030D8,
+		.test_bus_ctrl = 0x000030DC,
+		.irq_mask = {
+			0x00003018,
+			0x0000301C,
+		},
+		.irq_clear = {
+			0x00003020,
+			0x00003024,
+		},
+		.irq_status = {
+			0x00003028,
+			0x0000302C,
+		},
+		.irq_cmd = 0x00003030,
+		.cons_violation_shift = 28,
+		.violation_shift  = 30,
+		.image_size_violation = 31,
+	},
+	.num_client = 16,
+	.bus_client_reg = {
+		/* BUS Client 0 BAYER */
+		{
+			.cfg                   = 0x00003200,
+			.image_addr            = 0x00003204,
+			.frame_incr            = 0x00003208,
+			.image_cfg_0           = 0x0000320C,
+			.image_cfg_1           = 0x00003210,
+			.image_cfg_2           = 0x00003214,
+			.packer_cfg            = 0x00003218,
+			.bw_limit              = 0x0000321C,
+			.frame_header_addr     = 0x00003220,
+			.frame_header_incr     = 0x00003224,
+			.frame_header_cfg      = 0x00003228,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003230,
+			.irq_subsample_pattern = 0x00003234,
+			.framedrop_period      = 0x00003238,
+			.framedrop_pattern     = 0x0000323C,
+			.addr_status_0         = 0x00003268,
+			.addr_status_1         = 0x0000326C,
+			.addr_status_2         = 0x00003270,
+			.addr_status_3         = 0x00003274,
+			.debug_status_cfg      = 0x00003278,
+			.debug_status_0        = 0x0000327C,
+			.debug_status_1        = 0x00003280,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_0,
+			.client_name           = "BAYER",
+		},
+		/* BUS Client 1 IDEAL RAW*/
+		{
+			.cfg                   = 0x00003300,
+			.image_addr            = 0x00003304,
+			.frame_incr            = 0x00003308,
+			.image_cfg_0           = 0x0000330C,
+			.image_cfg_1           = 0x00003310,
+			.image_cfg_2           = 0x00003314,
+			.packer_cfg            = 0x00003318,
+			.bw_limit              = 0x0000331C,
+			.frame_header_addr     = 0x00003320,
+			.frame_header_incr     = 0x00003324,
+			.frame_header_cfg      = 0x00003328,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003330,
+			.irq_subsample_pattern = 0x00003334,
+			.framedrop_period      = 0x00003338,
+			.framedrop_pattern     = 0x0000333C,
+			.addr_status_0         = 0x00003368,
+			.addr_status_1         = 0x0000336C,
+			.addr_status_2         = 0x00003370,
+			.addr_status_3         = 0x00003374,
+			.debug_status_cfg      = 0x00003378,
+			.debug_status_0        = 0x0000337C,
+			.debug_status_1        = 0x00003380,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_1,
+			.client_name           = "IDEAL_RAW",
+		},
+		/* BUS Client 2 Stats BE Tintless */
+		{
+			.cfg                   = 0x00003400,
+			.image_addr            = 0x00003404,
+			.frame_incr            = 0x00003408,
+			.image_cfg_0           = 0x0000340C,
+			.image_cfg_1           = 0x00003410,
+			.image_cfg_2           = 0x00003414,
+			.packer_cfg            = 0x00003418,
+			.bw_limit              = 0x0000341C,
+			.frame_header_addr     = 0x00003420,
+			.frame_header_incr     = 0x00003424,
+			.frame_header_cfg      = 0x00003428,
+			.line_done_cfg         = 0x00003400,
+			.irq_subsample_period  = 0x00003430,
+			.irq_subsample_pattern = 0x00003434,
+			.framedrop_period      = 0x00003438,
+			.framedrop_pattern     = 0x0000343C,
+			.addr_status_0         = 0x00003468,
+			.addr_status_1         = 0x0000346C,
+			.addr_status_2         = 0x00003470,
+			.addr_status_3         = 0x00003474,
+			.debug_status_cfg      = 0x00003478,
+			.debug_status_0        = 0x0000347C,
+			.debug_status_1        = 0x00003480,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_2,
+			.client_name           = "STATS BE TINTLESS",
+		},
+		/* BUS Client 3 Stats Bhist */
+		{
+			.cfg                   = 0x00003500,
+			.image_addr            = 0x00003504,
+			.frame_incr            = 0x00003508,
+			.image_cfg_0           = 0x0000350C,
+			.image_cfg_1           = 0x00003510,
+			.image_cfg_2           = 0x00003514,
+			.packer_cfg            = 0x00003518,
+			.bw_limit              = 0x0000351C,
+			.frame_header_addr     = 0x00003520,
+			.frame_header_incr     = 0x00003524,
+			.frame_header_cfg      = 0x00003528,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003530,
+			.irq_subsample_pattern = 0x00003534,
+			.framedrop_period      = 0x00003538,
+			.framedrop_pattern     = 0x0000353C,
+			.addr_status_0         = 0x00003568,
+			.addr_status_1         = 0x0000356C,
+			.addr_status_2         = 0x00003570,
+			.addr_status_3         = 0x00003574,
+			.debug_status_cfg      = 0x00003578,
+			.debug_status_0        = 0x0000357C,
+			.debug_status_1        = 0x00003580,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_2,
+			.client_name           = "STATS BHIST",
+		},
+		/* BUS Client 4 Stats AWB BG */
+		{
+			.cfg                   = 0x00003600,
+			.image_addr            = 0x00003604,
+			.frame_incr            = 0x00003608,
+			.image_cfg_0           = 0x0000360C,
+			.image_cfg_1           = 0x00003610,
+			.image_cfg_2           = 0x00003614,
+			.packer_cfg            = 0x00003618,
+			.bw_limit              = 0x0000361C,
+			.frame_header_addr     = 0x00003620,
+			.frame_header_incr     = 0x00003624,
+			.frame_header_cfg      = 0x00003628,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003630,
+			.irq_subsample_pattern = 0x00003634,
+			.framedrop_period      = 0x00003638,
+			.framedrop_pattern     = 0x0000363C,
+			.addr_status_0         = 0x00003668,
+			.addr_status_1         = 0x0000366C,
+			.addr_status_2         = 0x00003670,
+			.addr_status_3         = 0x00003674,
+			.debug_status_cfg      = 0x00003678,
+			.debug_status_0        = 0x0000367C,
+			.debug_status_1        = 0x00003680,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_3,
+			.client_name           = "STATS AWB BG",
+		},
+		/* BUS Client 5 Stats AEC BG */
+		{
+			.cfg                   = 0x00003700,
+			.image_addr            = 0x00003704,
+			.frame_incr            = 0x00003708,
+			.image_cfg_0           = 0x0000370C,
+			.image_cfg_1           = 0x00003710,
+			.image_cfg_2           = 0x00003714,
+			.packer_cfg            = 0x00003718,
+			.bw_limit              = 0x0000371C,
+			.frame_header_addr     = 0x00003720,
+			.frame_header_incr     = 0x00003724,
+			.frame_header_cfg      = 0x00003728,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003730,
+			.irq_subsample_pattern = 0x00003734,
+			.framedrop_period      = 0x00003738,
+			.framedrop_pattern     = 0x0000373C,
+			.addr_status_0         = 0x00003768,
+			.addr_status_1         = 0x0000376C,
+			.addr_status_2         = 0x00003770,
+			.addr_status_3         = 0x00003774,
+			.debug_status_cfg      = 0x00003778,
+			.debug_status_0        = 0x0000377C,
+			.debug_status_1        = 0x00003780,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_3,
+			.client_name           = "STATS AEC BG",
+		},
+		/* BUS Client 6 Stats BAF */
+		{
+			.cfg                   = 0x00003800,
+			.image_addr            = 0x00003804,
+			.frame_incr            = 0x00003808,
+			.image_cfg_0           = 0x0000380C,
+			.image_cfg_1           = 0x00003810,
+			.image_cfg_2           = 0x00003814,
+			.packer_cfg            = 0x00003818,
+			.bw_limit              = 0x0000381C,
+			.frame_header_addr     = 0x00003820,
+			.frame_header_incr     = 0x00003824,
+			.frame_header_cfg      = 0x00003828,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003830,
+			.irq_subsample_pattern = 0x00003834,
+			.framedrop_period      = 0x00003838,
+			.framedrop_pattern     = 0x0000383C,
+			.addr_status_0         = 0x00003868,
+			.addr_status_1         = 0x0000386C,
+			.addr_status_2         = 0x00003870,
+			.addr_status_3         = 0x00003874,
+			.debug_status_cfg      = 0x00003878,
+			.debug_status_0        = 0x0000387C,
+			.debug_status_1        = 0x00003880,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_4,
+			.client_name           = "STATS BAF",
+		},
+		/* BUS Client 7 RDI0 */
+		{
+			.cfg                   = 0x00003900,
+			.image_addr            = 0x00003904,
+			.frame_incr            = 0x00003908,
+			.image_cfg_0           = 0x0000390C,
+			.image_cfg_1           = 0x00003910,
+			.image_cfg_2           = 0x00003914,
+			.packer_cfg            = 0x00003918,
+			.bw_limit              = 0x0000391C,
+			.frame_header_addr     = 0x00003920,
+			.frame_header_incr     = 0x00003924,
+			.frame_header_cfg      = 0x00003928,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003930,
+			.irq_subsample_pattern = 0x00003934,
+			.framedrop_period      = 0x00003938,
+			.framedrop_pattern     = 0x0000393C,
+			.addr_status_0         = 0x00003968,
+			.addr_status_1         = 0x0000396C,
+			.addr_status_2         = 0x00003970,
+			.addr_status_3         = 0x00003974,
+			.debug_status_cfg      = 0x00003978,
+			.debug_status_0        = 0x0000397C,
+			.debug_status_1        = 0x00003980,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_5,
+			.client_name           = "RDI0",
+		},
+		/* BUS Client 8 RDI1 */
+		{
+			.cfg                   = 0x00003A00,
+			.image_addr            = 0x00003A04,
+			.frame_incr            = 0x00003A08,
+			.image_cfg_0           = 0x00003A0C,
+			.image_cfg_1           = 0x00003A10,
+			.image_cfg_2           = 0x00003A14,
+			.packer_cfg            = 0x00003A18,
+			.bw_limit              = 0x00003A1C,
+			.frame_header_addr     = 0x00003A20,
+			.frame_header_incr     = 0x00003A24,
+			.frame_header_cfg      = 0x00003A28,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003A30,
+			.irq_subsample_pattern = 0x00003A34,
+			.framedrop_period      = 0x00003A38,
+			.framedrop_pattern     = 0x00003A3C,
+			.addr_status_0         = 0x00003A68,
+			.addr_status_1         = 0x00003A6C,
+			.addr_status_2         = 0x00003A70,
+			.addr_status_3         = 0x00003A74,
+			.debug_status_cfg      = 0x00003A78,
+			.debug_status_0        = 0x00003A7C,
+			.debug_status_1        = 0x00003A80,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_6,
+			.client_name           = "RDI1",
+		},
+		/* BUS Client 9 RDI2 */
+		{
+			.cfg                   = 0x00003B00,
+			.image_addr            = 0x00003B04,
+			.frame_incr            = 0x00003B08,
+			.image_cfg_0           = 0x00003B0C,
+			.image_cfg_1           = 0x00003B10,
+			.image_cfg_2           = 0x00003B14,
+			.packer_cfg            = 0x00003B18,
+			.bw_limit              = 0x00003B1C,
+			.frame_header_addr     = 0x00003B20,
+			.frame_header_incr     = 0x00003B24,
+			.frame_header_cfg      = 0x00003B28,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003B30,
+			.irq_subsample_pattern = 0x00003B34,
+			.framedrop_period      = 0x00003B38,
+			.framedrop_pattern     = 0x00003B3C,
+			.addr_status_0         = 0x00003B68,
+			.addr_status_1         = 0x00003B6C,
+			.addr_status_2         = 0x00003B70,
+			.addr_status_3         = 0x00003B74,
+			.debug_status_cfg      = 0x00003B78,
+			.debug_status_0        = 0x00003B7C,
+			.debug_status_1        = 0x00003B80,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_7,
+			.client_name           = "RDI2",
+		},
+		/* BUS Client 10 PDAF */
+		{
+			.cfg                   = 0x00003C00,
+			.image_addr            = 0x00003C04,
+			.frame_incr            = 0x00003C08,
+			.image_cfg_0           = 0x00003C0C,
+			.image_cfg_1           = 0x00003C10,
+			.image_cfg_2           = 0x00003C14,
+			.packer_cfg            = 0x00003C18,
+			.bw_limit              = 0x00003C1C,
+			.frame_header_addr     = 0x00003C20,
+			.frame_header_incr     = 0x00003C24,
+			.frame_header_cfg      = 0x00003C28,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003C30,
+			.irq_subsample_pattern = 0x00003C34,
+			.framedrop_period      = 0x00003C38,
+			.framedrop_pattern     = 0x00003C3C,
+			.addr_status_0         = 0x00003C68,
+			.addr_status_1         = 0x00003C6C,
+			.addr_status_2         = 0x00003C70,
+			.addr_status_3         = 0x00003C74,
+			.debug_status_cfg      = 0x00003C78,
+			.debug_status_0        = 0x00003C7C,
+			.debug_status_1        = 0x00003C80,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_8,
+			.client_name           = "PDAF",
+		},
+		/* BUS Client 11 DS4 */
+		{
+			.cfg                   = 0x00003D00,
+			.image_addr            = 0x00003D04,
+			.frame_incr            = 0x00003D08,
+			.image_cfg_0           = 0x00003D0C,
+			.image_cfg_1           = 0x00003D10,
+			.image_cfg_2           = 0x00003D14,
+			.packer_cfg            = 0x00003D18,
+			.bw_limit              = 0x00003D1C,
+			.frame_header_addr     = 0x00003D20,
+			.frame_header_incr     = 0x00003D24,
+			.frame_header_cfg      = 0x00003D28,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003D30,
+			.irq_subsample_pattern = 0x00003D34,
+			.framedrop_period      = 0x00003D38,
+			.framedrop_pattern     = 0x00003D3C,
+			.addr_status_0         = 0x00003D68,
+			.addr_status_1         = 0x00003D6C,
+			.addr_status_2         = 0x00003D70,
+			.addr_status_3         = 0x00003D74,
+			.debug_status_cfg      = 0x00003D78,
+			.debug_status_0        = 0x00003D7C,
+			.debug_status_1        = 0x00003D80,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_0,
+			.client_name           = "DS4",
+		},
+		/* BUS Client 12 DS16 */
+		{
+			.cfg                   = 0x00003E00,
+			.image_addr            = 0x00003E04,
+			.frame_incr            = 0x00003E08,
+			.image_cfg_0           = 0x00003E0C,
+			.image_cfg_1           = 0x00003E10,
+			.image_cfg_2           = 0x00003E14,
+			.packer_cfg            = 0x00003E18,
+			.bw_limit              = 0x00003E1C,
+			.frame_header_addr     = 0x00003E20,
+			.frame_header_incr     = 0x00003E24,
+			.frame_header_cfg      = 0x00003E28,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003E30,
+			.irq_subsample_pattern = 0x00003E34,
+			.framedrop_period      = 0x00003E38,
+			.framedrop_pattern     = 0x00003E3C,
+			.addr_status_0         = 0x00003E68,
+			.addr_status_1         = 0x00003E6C,
+			.addr_status_2         = 0x00003E70,
+			.addr_status_3         = 0x00003E74,
+			.debug_status_cfg      = 0x00003E78,
+			.debug_status_0        = 0x00003E7C,
+			.debug_status_1        = 0x00003E80,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_0,
+			.client_name           = "DS16",
+		},
+		/* BUS Client 13 AI-Y */
+		{
+			.cfg                   = 0x00003F00,
+			.image_addr            = 0x00003F04,
+			.frame_incr            = 0x00003F08,
+			.image_cfg_0           = 0x00003F0C,
+			.image_cfg_1           = 0x00003F10,
+			.image_cfg_2           = 0x00003F14,
+			.packer_cfg            = 0x00003F18,
+			.bw_limit              = 0x00003F1C,
+			.frame_header_addr     = 0x00003F20,
+			.frame_header_incr     = 0x00003F24,
+			.frame_header_cfg      = 0x00003F28,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00003F30,
+			.irq_subsample_pattern = 0x00003F34,
+			.framedrop_period      = 0x00003F38,
+			.framedrop_pattern     = 0x00003F3C,
+			.addr_status_0         = 0x00003F68,
+			.addr_status_1         = 0x00003F6C,
+			.addr_status_2         = 0x00003F70,
+			.addr_status_3         = 0x00003F74,
+			.debug_status_cfg      = 0x00003F78,
+			.debug_status_0        = 0x00003F7C,
+			.debug_status_1        = 0x00003F80,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_9,
+			.client_name           = "AI-Y",
+		},
+		/* BUS Client 14 AI-C */
+		{
+			.cfg                   = 0x00004000,
+			.image_addr            = 0x00004004,
+			.frame_incr            = 0x00004008,
+			.image_cfg_0           = 0x0000400C,
+			.image_cfg_1           = 0x00004010,
+			.image_cfg_2           = 0x00004014,
+			.packer_cfg            = 0x00004018,
+			.bw_limit              = 0x0000401C,
+			.frame_header_addr     = 0x00004020,
+			.frame_header_incr     = 0x00004024,
+			.frame_header_cfg      = 0x00004028,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00004030,
+			.irq_subsample_pattern = 0x00004034,
+			.framedrop_period      = 0x00004038,
+			.framedrop_pattern     = 0x0000403C,
+			.addr_status_0         = 0x00004068,
+			.addr_status_1         = 0x0000406C,
+			.addr_status_2         = 0x00004070,
+			.addr_status_3         = 0x00004074,
+			.debug_status_cfg      = 0x00004078,
+			.debug_status_0        = 0x0000407C,
+			.debug_status_1        = 0x00004080,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_9,
+			.client_name           = "AI-C",
+		},
+		/* BUS Client 15 Stats RS */
+		{
+			.cfg                   = 0x00004100,
+			.image_addr            = 0x00004104,
+			.frame_incr            = 0x00004108,
+			.image_cfg_0           = 0x0000410C,
+			.image_cfg_1           = 0x00004110,
+			.image_cfg_2           = 0x00004114,
+			.packer_cfg            = 0x00004118,
+			.bw_limit              = 0x0000411C,
+			.frame_header_addr     = 0x00004120,
+			.frame_header_incr     = 0x00004124,
+			.frame_header_cfg      = 0x00004128,
+			.line_done_cfg         = 0x00000000,
+			.irq_subsample_period  = 0x00004130,
+			.irq_subsample_pattern = 0x00004134,
+			.framedrop_period      = 0x00004138,
+			.framedrop_pattern     = 0x0000413C,
+			.addr_status_0         = 0x00004168,
+			.addr_status_1         = 0x0000416C,
+			.addr_status_2         = 0x00004170,
+			.addr_status_3         = 0x00004174,
+			.debug_status_cfg      = 0x00004178,
+			.debug_status_0        = 0x0000417C,
+			.debug_status_1        = 0x00004180,
+			.comp_group            = CAM_TFE_BUS_COMP_GRP_10,
+			.client_name           = "STATS RS",
+		},
+	},
+	.num_out  = 15,
+	.tfe_out_hw_info = {
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_RDI0,
+			.max_width        = -1,
+			.max_height       = -1,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_5,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_1,
+			.mid              = 23,
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_RDI1,
+			.max_width        = -1,
+			.max_height       = -1,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_6,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_2,
+			.mid              = 24,
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_RDI2,
+			.max_width        = -1,
+			.max_height       = -1,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_7,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_3,
+			.mid              = 25,
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_FULL,
+			.max_width        = 4096,
+			.max_height       = 4096,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_0,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 16,
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_RAW_DUMP,
+			.max_width        = 4096,
+			.max_height       = 4096,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_1,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 17,
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_PDAF,
+			.max_width        = 4096,
+			.max_height       = 4096,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_8,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 25, //TBD
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_STATS_HDR_BE,
+			.max_width        = -1,
+			.max_height       = -1,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_3,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 21,
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_STATS_HDR_BHIST,
+			.max_width        = -1,
+			.max_height       = -1,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_2,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 19,
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_STATS_TL_BG,
+			.max_width        = -1,
+			.max_height       = -1,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_2,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 18,
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_STATS_AWB_BG,
+			.max_width        = -1,
+			.max_height       = -1,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_3,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 20,
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_STATS_BF,
+			.max_width        = -1,
+			.max_height       = -1,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_4,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 22,
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_STATS_RS,
+			.max_width        = -1,
+			.max_height       = -1,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_10,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 22, //TBD
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_DS4,
+			.max_width        = -1, //TBD
+			.max_height       = -1, //TBD
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_0,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 22,  //TBD
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_DS16,
+			.max_width        = -1,  //TBD
+			.max_height       = -1,  //TBD
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_0,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 22,  //TBD
+		},
+		{
+			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_AI,
+			.max_width        = 1920,
+			.max_height       = 1920,
+			.composite_group  = CAM_TFE_BUS_COMP_GRP_9,
+			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
+			.mid              = 22, //TBD
+		},
+	},
+	.num_comp_grp             = 11,
+	.comp_done_shift          = 8,
+	.top_bus_wr_irq_shift     = 1,
+	.comp_buf_done_mask = 0x7FF00,
+	.comp_rup_done_mask = 0xF,
+	.bus_irq_error_mask = {
+		0xD0000000,
+		0x00000000,
+	},
+	.support_consumed_addr = true,
+	.pdaf_rdi2_mux_en = false,
+};
+
+struct cam_tfe_hw_info cam_tfe640 = {
+	.top_irq_mask = {
+		0x00001034,
+		0x00001038,
+		0x0000103C,
+	},
+	.top_irq_clear = {
+		0x00001040,
+		0x00001044,
+		0x00001048,
+	},
+	.top_irq_status = {
+		0x0000104C,
+		0x00001050,
+		0x00001054,
+	},
+	.top_irq_cmd                       = 0x00001030,
+	.global_clear_bitmask              = 0x00000001,
+
+	.bus_irq_mask = {
+		0x00001A18,
+		0x00001A1C,
+	},
+	.bus_irq_clear = {
+		0x00001A20,
+		0x00001A24,
+	},
+	.bus_irq_status = {
+		0x00001A28,
+		0x00001A2C,
+	},
+	.bus_irq_cmd = 0x00001A30,
+	.bus_violation_reg = 0x00001A64,
+	.bus_overflow_reg = 0x00001A68,
+	.bus_image_size_vilation_reg = 0x1A70,
+	.bus_overflow_clear_cmd = 0x1A60,
+	.debug_status_top = 0x1AD8,
+
+	.reset_irq_mask = {
+		0x00000001,
+		0x00000000,
+		0x00000000,
+	},
+	.error_irq_mask = {
+		0x000F0F00,
+		0x00000000,
+		0x0000003F,
+	},
+	.bus_reg_irq_mask = {
+		0x00000002,
+		0x00000000,
+	},
+	.bus_error_irq_mask = {
+		0xC0000000,
+		0x00000000,
+	},
+
+	.num_clc = 39,
+	.clc_hw_status_info            = tfe640_clc_hw_info,
+	.bus_version                   = CAM_TFE_BUS_1_0,
+	.bus_hw_info                   = &tfe640_bus_hw_info,
+
+	.top_version                   = CAM_TFE_TOP_1_0,
+	.top_hw_info                   = &tfe640_top_hw_info,
+};
+
+#endif /* _CAM_TFE640__H_ */

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_bus.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  */
 
 #include <linux/ratelimit.h>
@@ -74,6 +74,7 @@ struct cam_tfe_bus_common_data {
 	bool                                        support_consumed_addr;
 	cam_hw_mgr_event_cb_func                    event_cb;
 	bool                        rup_irq_enable[CAM_TFE_BUS_RUP_GRP_MAX];
+	bool                                        pdaf_rdi2_mux_en;
 };
 
 struct cam_tfe_bus_wm_resource_data {
@@ -152,6 +153,7 @@ struct cam_tfe_bus_priv {
 	struct cam_tfe_bus_common_data      common_data;
 	uint32_t                            num_client;
 	uint32_t                            num_out;
+	uint32_t                            num_comp_grp;
 	uint32_t                            top_bus_wr_irq_shift;
 
 	struct cam_isp_resource_node  bus_client[CAM_TFE_BUS_MAX_CLIENTS];
@@ -175,6 +177,9 @@ static bool cam_tfe_bus_can_be_secure(uint32_t out_id)
 	case CAM_TFE_BUS_TFE_OUT_RDI0:
 	case CAM_TFE_BUS_TFE_OUT_RDI1:
 	case CAM_TFE_BUS_TFE_OUT_RDI2:
+	case CAM_TFE_BUS_TFE_OUT_DS4:
+	case CAM_TFE_BUS_TFE_OUT_DS16:
+	case CAM_TFE_BUS_TFE_OUT_AI:
 		return true;
 
 	case CAM_TFE_BUS_TFE_OUT_STATS_HDR_BE:
@@ -182,6 +187,7 @@ static bool cam_tfe_bus_can_be_secure(uint32_t out_id)
 	case CAM_TFE_BUS_TFE_OUT_STATS_TL_BG:
 	case CAM_TFE_BUS_TFE_OUT_STATS_BF:
 	case CAM_TFE_BUS_TFE_OUT_STATS_AWB_BG:
+	case CAM_TFE_BUS_TFE_OUT_STATS_RS:
 	default:
 		return false;
 	}
@@ -213,6 +219,14 @@ static enum cam_tfe_bus_tfe_out_id
 		return CAM_TFE_BUS_TFE_OUT_STATS_BF;
 	case CAM_ISP_TFE_OUT_RES_STATS_AWB_BG:
 		return CAM_TFE_BUS_TFE_OUT_STATS_AWB_BG;
+	case CAM_ISP_TFE_OUT_RES_STATS_RS:
+		return CAM_TFE_BUS_TFE_OUT_STATS_RS;
+	case CAM_ISP_TFE_OUT_RES_DS4:
+		return CAM_TFE_BUS_TFE_OUT_DS4;
+	case CAM_ISP_TFE_OUT_RES_DS16:
+		return CAM_TFE_BUS_TFE_OUT_DS16;
+	case CAM_ISP_TFE_OUT_RES_AI:
+		return CAM_TFE_BUS_TFE_OUT_AI;
 	default:
 		return CAM_TFE_BUS_TFE_OUT_MAX;
 	}
@@ -283,6 +297,32 @@ static int cam_tfe_bus_get_num_wm(
 			break;
 		}
 		break;
+	case CAM_TFE_BUS_TFE_OUT_DS4:
+		switch (format) {
+		case CAM_FORMAT_PD10:
+			return 1;
+		default:
+			break;
+		}
+		break;
+	case CAM_TFE_BUS_TFE_OUT_DS16:
+		switch (format) {
+		case CAM_FORMAT_PD10:
+			return 1;
+		default:
+			break;
+		}
+		break;
+	case CAM_TFE_BUS_TFE_OUT_AI:
+		switch (format) {
+		case CAM_FORMAT_NV12:
+		case CAM_FORMAT_TP10:
+		case CAM_FORMAT_PD10:
+			return 2;
+		default:
+			break;
+		}
+		break;
 	case CAM_TFE_BUS_TFE_OUT_STATS_HDR_BE:
 	case CAM_TFE_BUS_TFE_OUT_STATS_HDR_BHIST:
 	case CAM_TFE_BUS_TFE_OUT_STATS_TL_BG:
@@ -295,6 +335,14 @@ static int cam_tfe_bus_get_num_wm(
 			break;
 		}
 		break;
+	case CAM_TFE_BUS_TFE_OUT_STATS_RS:
+		switch (format) {
+		case CAM_FORMAT_PLAIN32:
+			return 1;
+		default:
+			break;
+		}
+		break;
 	default:
 		break;
 	}
@@ -307,7 +355,8 @@ static int cam_tfe_bus_get_num_wm(
 
 static int cam_tfe_bus_get_wm_idx(
 	enum cam_tfe_bus_tfe_out_id tfe_out_res_id,
-	enum cam_tfe_bus_plane_type plane)
+	enum cam_tfe_bus_plane_type plane,
+	bool pdaf_rdi2_mux_en)
 {
 	int wm_idx = -1;
 
@@ -342,7 +391,10 @@ static int cam_tfe_bus_get_wm_idx(
 	case CAM_TFE_BUS_TFE_OUT_PDAF:
 		switch (plane) {
 		case PLANE_Y:
-			wm_idx = 9;
+			if (pdaf_rdi2_mux_en)
+				wm_idx = 9;
+			else
+				wm_idx = 10;
 			break;
 		default:
 			break;
@@ -412,7 +464,44 @@ static int cam_tfe_bus_get_wm_idx(
 			break;
 		}
 		break;
-
+	case CAM_TFE_BUS_TFE_OUT_STATS_RS:
+		switch (plane) {
+		case PLANE_Y:
+			wm_idx = 15;
+			break;
+		default:
+			break;
+		}
+		break;
+	case CAM_TFE_BUS_TFE_OUT_DS4:
+		switch (plane) {
+		case PLANE_Y:
+			wm_idx = 11;
+			break;
+		default:
+			break;
+		}
+		break;
+	case CAM_TFE_BUS_TFE_OUT_DS16:
+		switch (plane) {
+		case PLANE_Y:
+			wm_idx = 12;
+			break;
+		default:
+			break;
+		}
+		break;
+	case CAM_TFE_BUS_TFE_OUT_AI:
+		switch (plane) {
+		case PLANE_Y:
+			wm_idx = 13;
+			break;
+		case PLANE_C:
+			wm_idx = 14;
+		default:
+			break;
+		}
+		break;
 	default:
 		break;
 	}
@@ -608,7 +697,8 @@ static int cam_tfe_bus_acquire_wm(
 
 	*wm_res = NULL;
 	/* No need to allocate for BUS TFE OUT to WM is fixed. */
-	wm_idx = cam_tfe_bus_get_wm_idx(tfe_out_res_id, plane);
+	wm_idx = cam_tfe_bus_get_wm_idx(tfe_out_res_id, plane,
+		bus_priv->common_data.pdaf_rdi2_mux_en);
 	if (wm_idx < 0 || wm_idx >= bus_priv->num_client) {
 		CAM_ERR(CAM_ISP, "Unsupported TFE out %d plane %d",
 			tfe_out_res_id, plane);
@@ -1696,7 +1786,7 @@ static int cam_tfe_bus_bufdone_bottom_half(
 
 	common_data = &bus_priv->common_data;
 
-	for (i = 0; i < CAM_TFE_BUS_COMP_GRP_MAX; i++) {
+	for (i = 0; i < bus_priv->num_comp_grp; i++) {
 		if (!(evt_payload->bus_irq_val[0] &
 			bus_priv->comp_buf_done_mask))
 			break;
@@ -1773,7 +1863,7 @@ static void cam_tfe_bus_error_bottom_half(
 		CAM_INFO(CAM_ISP, "IMAGE_SIZE_VIOLATION val :0x%x",
 			evt_payload->image_size_violation_status);
 
-		for (i = 0; i < CAM_TFE_BUS_MAX_CLIENTS; i++) {
+		for (i = 0; i < bus_priv->num_client; i++) {
 			if (!(evt_payload->image_size_violation_status >> i))
 				break;
 
@@ -1801,7 +1891,7 @@ static void cam_tfe_bus_error_bottom_half(
 	}
 
 	if (overflow_status) {
-		for (i = 0; i < CAM_TFE_BUS_MAX_CLIENTS; i++) {
+		for (i = 0; i < bus_priv->num_client; i++) {
 
 			if (!(evt_payload->overflow_status >> i))
 				break;
@@ -2199,7 +2289,7 @@ static int cam_tfe_bus_dump_bus_info(
 			wm_data->stride);
 	}
 
-	for (i = 0; i < CAM_TFE_BUS_MAX_CLIENTS; i++) {
+	for (i = 0; i < bus_priv->num_client; i++) {
 		wm_data = bus_priv->bus_client[i].res_priv;
 		/* disable WM */
 			cam_io_w_mb(0, common_data->mem_base +
@@ -2271,6 +2361,7 @@ static int cam_tfe_bus_process_cmd(void *priv,
 	int rc = -EINVAL;
 	uint32_t i, val;
 	bool *support_consumed_addr;
+	bool *pdaf_rdi2_mux_en;
 
 	if (!priv || !cmd_args) {
 		CAM_ERR_RATE_LIMIT(CAM_ISP, "Invalid input arguments");
@@ -2314,6 +2405,11 @@ static int cam_tfe_bus_process_cmd(void *priv,
 	case CAM_ISP_HW_CMD_DUMP_BUS_INFO:
 		rc = cam_tfe_bus_dump_bus_info(priv, cmd_args, arg_size);
 		break;
+	case CAM_ISP_HW_CMD_IS_PDAF_RDI2_MUX_EN:
+		bus_priv = (struct cam_tfe_bus_priv  *) priv;
+		pdaf_rdi2_mux_en = (bool *)cmd_args;
+		*pdaf_rdi2_mux_en = bus_priv->common_data.pdaf_rdi2_mux_en;
+		break;
 	default:
 		CAM_ERR_RATE_LIMIT(CAM_ISP, "Invalid camif process command:%d",
 			cmd_type);
@@ -2361,6 +2457,7 @@ int cam_tfe_bus_init(
 
 	bus_priv->num_client                   = hw_info->num_client;
 	bus_priv->num_out                      = hw_info->num_out;
+	bus_priv->num_comp_grp                 = hw_info->num_comp_grp;
 	bus_priv->top_bus_wr_irq_shift         = hw_info->top_bus_wr_irq_shift;
 	bus_priv->common_data.comp_done_shift  = hw_info->comp_done_shift;
 
@@ -2376,6 +2473,7 @@ int cam_tfe_bus_init(
 	bus_priv->comp_rup_done_mask      = hw_info->comp_rup_done_mask;
 	bus_priv->common_data.support_consumed_addr =
 		hw_info->support_consumed_addr;
+	bus_priv->common_data.pdaf_rdi2_mux_en = hw_info->pdaf_rdi2_mux_en;
 
 	for (i = 0; i < CAM_TFE_BUS_IRQ_REGISTERS_MAX; i++)
 		bus_priv->bus_irq_error_mask[i] =
@@ -2404,7 +2502,7 @@ int cam_tfe_bus_init(
 		}
 	}
 
-	for (i = 0; i < CAM_TFE_BUS_COMP_GRP_MAX; i++) {
+	for (i = 0; i < bus_priv->num_comp_grp; i++) {
 		rc = cam_tfe_bus_init_comp_grp(i, soc_info,
 			bus_priv, bus_hw_info,
 			&bus_priv->comp_grp[i]);
@@ -2446,7 +2544,7 @@ deinit_tfe_out:
 
 deinit_comp_grp:
 	if (i < 0)
-		i = CAM_TFE_BUS_COMP_GRP_MAX;
+		i = bus_priv->num_comp_grp;
 	for (--i; i >= 0; i--)
 		cam_tfe_bus_deinit_comp_grp(&bus_priv->comp_grp[i]);
 
@@ -2493,7 +2591,7 @@ int cam_tfe_bus_deinit(
 				"Deinit WM failed rc=%d", rc);
 	}
 
-	for (i = 0; i < CAM_TFE_BUS_COMP_GRP_MAX; i++) {
+	for (i = 0; i < bus_priv->num_comp_grp; i++) {
 		rc = cam_tfe_bus_deinit_comp_grp(&bus_priv->comp_grp[i]);
 		if (rc < 0)
 			CAM_ERR(CAM_ISP,

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_bus.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  */
 
 
@@ -11,7 +11,7 @@
 #include "cam_isp_hw.h"
 #include "cam_tfe_hw_intf.h"
 
-#define CAM_TFE_BUS_MAX_CLIENTS            10
+#define CAM_TFE_BUS_MAX_CLIENTS            16
 #define CAM_TFE_BUS_MAX_SUB_GRPS            4
 #define CAM_TFE_BUS_MAX_PERF_CNT_REG        8
 #define CAM_TFE_BUS_MAX_IRQ_REGISTERS       2
@@ -57,6 +57,9 @@ enum cam_tfe_bus_comp_grp_id {
 	CAM_TFE_BUS_COMP_GRP_5,
 	CAM_TFE_BUS_COMP_GRP_6,
 	CAM_TFE_BUS_COMP_GRP_7,
+	CAM_TFE_BUS_COMP_GRP_8,
+	CAM_TFE_BUS_COMP_GRP_9,
+	CAM_TFE_BUS_COMP_GRP_10,
 	CAM_TFE_BUS_COMP_GRP_MAX,
 };
 
@@ -80,6 +83,10 @@ enum cam_tfe_bus_tfe_out_id {
 	CAM_TFE_BUS_TFE_OUT_STATS_TL_BG,
 	CAM_TFE_BUS_TFE_OUT_STATS_AWB_BG,
 	CAM_TFE_BUS_TFE_OUT_STATS_BF,
+	CAM_TFE_BUS_TFE_OUT_STATS_RS,
+	CAM_TFE_BUS_TFE_OUT_DS4,
+	CAM_TFE_BUS_TFE_OUT_DS16,
+	CAM_TFE_BUS_TFE_OUT_AI,
 	CAM_TFE_BUS_TFE_OUT_MAX,
 };
 
@@ -178,12 +185,14 @@ struct cam_tfe_bus_tfe_out_hw_info {
  * @num_client:            Total number of write clients
  * @bus_client_reg:        Bus client register info
  * @tfe_out_hw_info:       TFE output capability
+ * @num_comp_grp:          Number of composite group
  * @comp_done_shift:       Mask shift for comp done mask
  * @top_bus_wr_irq_shift:  Mask shift for top level BUS WR irq
  * @comp_buf_done_mask:    Composite buf done bits mask
  * @comp_rup_done_mask:    Reg update done mask
  * @bus_irq_error_mask:    Bus irq error mask bits
  * @support_consumed_addr: Indicate if bus support consumed address
+ * @pdaf_rdi2_mux_en:      Indicate is PDAF is muxed with RDI2
  */
 struct cam_tfe_bus_hw_info {
 	struct cam_tfe_bus_reg_offset_common common_reg;
@@ -193,12 +202,14 @@ struct cam_tfe_bus_hw_info {
 	uint32_t num_out;
 	struct cam_tfe_bus_tfe_out_hw_info
 		tfe_out_hw_info[CAM_TFE_BUS_TFE_OUT_MAX];
+	uint32_t num_comp_grp;
 	uint32_t comp_done_shift;
 	uint32_t top_bus_wr_irq_shift;
 	uint32_t comp_buf_done_mask;
 	uint32_t comp_rup_done_mask;
 	uint32_t bus_irq_error_mask[CAM_TFE_BUS_IRQ_REGISTERS_MAX];
 	bool support_consumed_addr;
+	bool pdaf_rdi2_mux_en;
 };
 
 /*

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_core.c

@@ -337,42 +337,37 @@ static void cam_tfe_log_error_irq_status(
 		top_priv->eof_ts.tv_sec,
 		top_priv->eof_ts.tv_nsec/1000);
 
-	val_0 = cam_io_r(mem_base  +
-		top_priv->common_data.common_reg->debug_0);
-	val_1 = cam_io_r(mem_base  +
-		top_priv->common_data.common_reg->debug_1);
-	val_2 = cam_io_r(mem_base  +
-		top_priv->common_data.common_reg->debug_2);
-	val_3 = cam_io_r(mem_base  +
-		top_priv->common_data.common_reg->debug_3);
-
 	CAM_INFO(CAM_ISP, "TOP IRQ[0]:0x%x IRQ[1]:0x%x IRQ[2]:0x%x",
 		evt_payload->irq_reg_val[0], evt_payload->irq_reg_val[1],
 		evt_payload->irq_reg_val[2]);
 
-	CAM_INFO(CAM_ISP, "Top debug [0]:0x%x [1]:0x%x [2]:0x%x [3]:0x%x",
-		val_0, val_1, val_2, val_3);
+	for (i = 0; i < top_priv->common_data.common_reg->num_debug_reg; i++) {
+		val_0 = cam_io_r(mem_base  +
+			top_priv->common_data.common_reg->debug_reg[i]);
+		CAM_INFO(CAM_ISP, "Top debug [i]:0x%x", i, val_0);
+	}
 
 	cam_cpas_reg_read(soc_private->cpas_handle,
 		CAM_CPAS_REG_CAMNOC, 0x20, true, &val_0);
 	CAM_INFO(CAM_ISP, "tfe_niu_MaxWr_Low offset 0x20 val 0x%x",
 		val_0);
+	for (i = 0; i < top_priv->common_data.common_reg->num_perf_cfg; i++) {
+		val_0 = cam_io_r(mem_base  +
+			top_priv->common_data.common_reg->perf_cfg[i].perf_pixel_count);
 
-	val_0 = cam_io_r(mem_base  +
-		top_priv->common_data.common_reg->perf_pixel_count);
-
-	val_1 = cam_io_r(mem_base  +
-		top_priv->common_data.common_reg->perf_line_count);
+		val_1 = cam_io_r(mem_base  +
+			top_priv->common_data.common_reg->perf_cfg[i].perf_line_count);
 
-	val_2 = cam_io_r(mem_base  +
-		top_priv->common_data.common_reg->perf_stall_count);
+		val_2 = cam_io_r(mem_base  +
+			top_priv->common_data.common_reg->perf_cfg[i].perf_stall_count);
 
-	val_3 = cam_io_r(mem_base  +
-		top_priv->common_data.common_reg->perf_always_count);
+		val_3 = cam_io_r(mem_base  +
+			top_priv->common_data.common_reg->perf_cfg[i].perf_always_count);
 
-	CAM_INFO(CAM_ISP,
-		"Top perf cnt pix:0x%x line:0x%x stall:0x%x always:0x%x",
-		val_0, val_1, val_2, val_3);
+		CAM_INFO(CAM_ISP,
+			"Top perf cnt [%d] pix:0x%x line:0x%x stall:0x%x always:0x%x",
+			i, val_0, val_1, val_2, val_3);
+	}
 
 	clc_hw_status = hw_info->clc_hw_status_info;
 	for (i = 0; i < hw_info->num_clc; i++) {
@@ -1973,6 +1968,8 @@ static int cam_tfe_camif_resource_start(
 	uint32_t                             epoch1_irq_mask;
 	uint32_t                             computed_epoch_line_cfg;
 	uint32_t                             camera_hw_version = 0;
+	struct cam_hw_intf                  *tfe_device;
+	bool                                 pdaf_rdi2_mux_en = false;
 
 	if (!camif_res || !core_info) {
 		CAM_ERR(CAM_ISP, "Error Invalid input arguments");
@@ -2007,7 +2004,14 @@ static int cam_tfe_camif_resource_start(
 			rsrc_data->reg_data->dual_tfe_sync_sel_shift);
 	}
 
-	if (!rsrc_data->camif_pd_enable)
+	tfe_device = rsrc_data->hw_intf;
+
+	tfe_device->hw_ops.process_cmd(tfe_device->hw_priv,
+		CAM_ISP_HW_CMD_IS_PDAF_RDI2_MUX_EN,
+		&pdaf_rdi2_mux_en,
+		sizeof(pdaf_rdi2_mux_en));
+
+	if (pdaf_rdi2_mux_en && !rsrc_data->camif_pd_enable)
 		val |= (1 << rsrc_data->reg_data->camif_pd_rdi2_src_sel_shift);
 
 	/* enables the Delay Line CLC in the pixel pipeline */
@@ -2086,7 +2090,8 @@ static int cam_tfe_camif_resource_start(
 		(1 << rsrc_data->reg_data->perf_window_start_shift) |
 		(2 << rsrc_data->reg_data->perf_window_end_shift);
 	cam_io_w_mb(val,
-		rsrc_data->mem_base + rsrc_data->common_reg->perf_cnt_cfg);
+		rsrc_data->mem_base +
+		rsrc_data->common_reg->perf_cfg[0].perf_cnt_cfg);
 	CAM_DBG(CAM_ISP, "TFE:%d perf_cfg val:%d", core_info->core_index,
 		val);
 
@@ -2893,6 +2898,7 @@ int cam_tfe_process_cmd(void *hw_priv, uint32_t cmd_type,
 	case CAM_ISP_HW_CMD_IS_CONSUMED_ADDR_SUPPORT:
 	case CAM_ISP_HW_CMD_GET_RES_FOR_MID:
 	case CAM_ISP_HW_CMD_DUMP_BUS_INFO:
+	case CAM_ISP_HW_CMD_IS_PDAF_RDI2_MUX_EN:
 		rc = core_info->tfe_bus->hw_ops.process_cmd(
 			core_info->tfe_bus->bus_priv, cmd_type, cmd_args,
 			arg_size);

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_core.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  */
 
 
@@ -25,8 +25,10 @@
 #define CAM_TFE_MAX_REG_DUMP_ENTRIES  20
 #define CAM_TFE_MAX_LUT_DUMP_ENTRIES  10
 
-#define CAM_TFE_MAX_CLC               30
+#define CAM_TFE_MAX_CLC               40
 #define CAM_TFE_CLC_NAME_LENGTH_MAX   32
+#define CAM_TFE_MAX_DEBUG_REG         10
+#define CAM_TFE_MAX_PERF_CNT           2
 
 /*we take each word as uint32_t, for dumping uint64_t count as 2 words
  * soc index
@@ -67,6 +69,15 @@ struct cam_tfe_reg_dump_data {
 		lut_entry[CAM_TFE_MAX_LUT_DUMP_ENTRIES];
 };
 
+struct cam_tfe_top_reg_perf_cfg {
+	uint32_t perf_cnt_cfg;
+	uint32_t perf_pixel_count;
+	uint32_t perf_line_count;
+	uint32_t perf_stall_count;
+	uint32_t perf_always_count;
+	uint32_t perf_count_status;
+};
+
 struct cam_tfe_top_reg_offset_common {
 	uint32_t hw_version;
 	uint32_t hw_capability;
@@ -86,17 +97,11 @@ struct cam_tfe_top_reg_offset_common {
 	uint32_t violation_status;
 	uint32_t stats_throttle_cnt_cfg_0;
 	uint32_t stats_throttle_cnt_cfg_1;
-	uint32_t debug_0;
-	uint32_t debug_1;
-	uint32_t debug_2;
-	uint32_t debug_3;
+	uint32_t num_debug_reg;
+	uint32_t debug_reg[CAM_TFE_MAX_DEBUG_REG];
 	uint32_t debug_cfg;
-	uint32_t perf_cnt_cfg;
-	uint32_t perf_pixel_count;
-	uint32_t perf_line_count;
-	uint32_t perf_stall_count;
-	uint32_t perf_always_count;
-	uint32_t perf_count_status;
+	uint32_t num_perf_cfg;
+	struct   cam_tfe_top_reg_perf_cfg perf_cfg[CAM_TFE_MAX_PERF_CNT];
 
 	/*reg data */
 	uint32_t diag_min_hbi_error_shift;

include/uapi/camera/media/cam_isp_tfe.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
 /*
- * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  */
 
 #ifndef __UAPI_CAM_ISP_TFE_H__
@@ -20,7 +20,11 @@
 #define CAM_ISP_TFE_OUT_RES_STATS_TL_BG        (CAM_ISP_TFE_OUT_RES_BASE + 8)
 #define CAM_ISP_TFE_OUT_RES_STATS_BF           (CAM_ISP_TFE_OUT_RES_BASE + 9)
 #define CAM_ISP_TFE_OUT_RES_STATS_AWB_BG       (CAM_ISP_TFE_OUT_RES_BASE + 10)
-#define CAM_ISP_TFE_OUT_RES_MAX                (CAM_ISP_TFE_OUT_RES_BASE + 11)
+#define CAM_ISP_TFE_OUT_RES_STATS_RS           (CAM_ISP_TFE_OUT_RES_BASE + 11)
+#define CAM_ISP_TFE_OUT_RES_DS4                (CAM_ISP_TFE_OUT_RES_BASE + 12)
+#define CAM_ISP_TFE_OUT_RES_DS16               (CAM_ISP_TFE_OUT_RES_BASE + 13)
+#define CAM_ISP_TFE_OUT_RES_AI                 (CAM_ISP_TFE_OUT_RES_BASE + 14)
+#define CAM_ISP_TFE_OUT_RES_MAX                (CAM_ISP_TFE_OUT_RES_BASE + 15)
 
 
 /* TFE input port resource type */