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qcacmn: Configure DP interrupt mitigation values based on ring type

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Currently interrupt mitigation values are configured for per-packet interrupts.
Change this for core DP rings (REO Destination and WBM Tx Completions) to reduce
CPU overhead of interrupt processing

Change-Id: I7bf0f6e78c52b5678ad3c8cc4d829444e410fad3
CRs-Fixed: 2064113
This commit is contained in:
Pamidipati, Vijay
2017-06-21 03:20:25 +05:30
committed by snandini
parent be23decc06
commit 45b1df25fc
4 changed files with 163 additions and 21 deletions
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9
hal/wifi3.0/hal_srng.c
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@@ -866,10 +866,17 @@ static inline void hal_srng_src_hw_init(struct hal_soc *hal,
* if level mode is required
*/
reg_val = 0;
/*
* WAR - Hawkeye v1 has a hardware bug which requires timer value to be
* programmed in terms of 1us resolution instead of 8us resolution as
* given in MLD.
*/
if (srng->intr_timer_thres_us) {
reg_val |= SRNG_SM(SRNG_SRC_FLD(CONSUMER_INT_SETUP_IX0,
INTERRUPT_TIMER_THRESHOLD),
srng->intr_timer_thres_us >> 3);
srng->intr_timer_thres_us);
/* For HK v2 this should be (srng->intr_timer_thres_us >> 3) */
}
if (srng->intr_batch_cntr_thres_entries) {