qcacmn: Restore Umac registers for hard reset

Restore Umac registers in case of hard umac reset

Change-Id: I7718a97d8351558c58e804e9be0b43b09c2a1ca0
CRs-Fixed: 3267247

dp/inc/cdp_txrx_cmn_struct.h

@@ -1491,6 +1491,7 @@ enum cdp_vdev_param_type {
 #endif
 	CDP_UPDATE_DSCP_TO_TID_MAP,
 	CDP_SET_MCAST_VDEV,
+	CDP_SET_MCAST_VDEV_HW_UPDATE,
 	CDP_DROP_3ADDR_MCAST,
 	CDP_ENABLE_WRAP,
 #ifdef DP_TRAFFIC_END_INDICATION

dp/wifi3.0/be/dp_be.c

@@ -1590,6 +1590,62 @@ void dp_print_mlo_ast_stats_be(struct dp_soc *soc)
 
 #endif
 
+#if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
+static void dp_reconfig_tx_vdev_mcast_ctrl_be(struct dp_soc *soc,
+					      struct dp_vdev *vdev)
+{
+	struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
+	struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
+	hal_soc_handle_t hal_soc = soc->hal_soc;
+	uint8_t vdev_id = vdev->vdev_id;
+
+	if (vdev->opmode == wlan_op_mode_sta) {
+		if (vdev->pdev->isolation)
+			hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
+						HAL_TX_MCAST_CTRL_FW_EXCEPTION);
+		else
+			hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
+						HAL_TX_MCAST_CTRL_MEC_NOTIFY);
+	} else if (vdev->opmode == wlan_op_mode_ap) {
+		if (vdev->mlo_vdev) {
+			if (be_vdev->mcast_primary) {
+				hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
+					   HAL_TX_MCAST_CTRL_NO_SPECIAL);
+				hal_tx_vdev_mcast_ctrl_set(hal_soc,
+						vdev_id + 128,
+						HAL_TX_MCAST_CTRL_FW_EXCEPTION);
+				dp_mcast_mlo_iter_ptnr_soc(be_soc,
+					dp_tx_mcast_mlo_reinject_routing_set,
+					(void *)&be_vdev->mcast_primary);
+			} else {
+				hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
+							HAL_TX_MCAST_CTRL_DROP);
+			}
+		} else {
+			hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
+						   vdev_id,
+						   HAL_TX_MCAST_CTRL_FW_EXCEPTION);
+		}
+	}
+}
+
+static void dp_bank_reconfig_be(struct dp_soc *soc, struct dp_vdev *vdev)
+{
+	struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
+	struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
+	union hal_tx_bank_config *bank_config;
+
+	if (!be_vdev || be_vdev->bank_id == DP_BE_INVALID_BANK_ID)
+		return;
+
+	bank_config = &be_soc->bank_profiles[be_vdev->bank_id].bank_config;
+
+	hal_tx_populate_bank_register(be_soc->soc.hal_soc, bank_config,
+				      be_vdev->bank_id);
+}
+
+#endif
+
 #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
 	defined(WLAN_MCAST_MLO)
 static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
@@ -1844,6 +1900,12 @@ void dp_initialize_arch_ops_be(struct dp_arch_ops *arch_ops)
 					dp_peer_rx_reorder_queue_setup_be;
 	arch_ops->txrx_print_peer_stats = dp_print_peer_txrx_stats_be;
 	arch_ops->dp_find_peer_by_destmac = dp_find_peer_by_destmac_be;
+#if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
+	arch_ops->dp_bank_reconfig = dp_bank_reconfig_be;
+	arch_ops->dp_reconfig_tx_vdev_mcast_ctrl =
+					dp_reconfig_tx_vdev_mcast_ctrl_be;
+	arch_ops->dp_cc_reg_cfg_init = dp_cc_reg_cfg_init;
+#endif
 	dp_init_near_full_arch_ops_be(arch_ops);
 	arch_ops->get_rx_hash_key = dp_get_rx_hash_key_be;
 	arch_ops->print_mlo_ast_stats = dp_print_mlo_ast_stats_be;

dp/wifi3.0/dp_main.c

@@ -13046,6 +13046,61 @@ void dp_register_notify_umac_pre_reset_fw_callback(struct dp_soc *soc)
 	soc->notify_fw_callback = dp_check_n_notify_umac_prereset_done;
 }
 
+#ifdef DP_UMAC_HW_HARD_RESET
+/**
+ * dp_set_umac_regs(): Reinitialize host umac registers
+ * @soc: dp soc handle
+ *
+ * Return: void
+ */
+static void dp_set_umac_regs(struct dp_soc *soc)
+{
+	int i;
+	struct hal_reo_params reo_params;
+
+	qdf_mem_zero(&reo_params, sizeof(reo_params));
+
+	if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
+		if (dp_reo_remap_config(soc, &reo_params.remap0,
+					&reo_params.remap1,
+					&reo_params.remap2))
+
+			reo_params.rx_hash_enabled = true;
+		else
+			reo_params.rx_hash_enabled = false;
+	}
+
+	hal_reo_setup(soc->hal_soc, &reo_params, 0);
+
+	soc->arch_ops.dp_cc_reg_cfg_init(soc, true);
+
+	for (i = 0; i < PCP_TID_MAP_MAX; i++)
+		hal_tx_update_pcp_tid_map(soc->hal_soc, soc->pcp_tid_map[i], i);
+
+	for (i = 0; i < MAX_PDEV_CNT; i++) {
+		struct dp_vdev *vdev = NULL;
+		struct dp_pdev *pdev = soc->pdev_list[i];
+
+		if (!pdev)
+			continue;
+
+		for (i = 0; i < soc->num_hw_dscp_tid_map; i++)
+			hal_tx_set_dscp_tid_map(soc->hal_soc,
+						pdev->dscp_tid_map[i], i);
+
+		TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
+			soc->arch_ops.dp_bank_reconfig(soc, vdev);
+			soc->arch_ops.dp_reconfig_tx_vdev_mcast_ctrl(soc,
+								      vdev);
+		}
+	}
+}
+#else
+static void dp_set_umac_regs(struct dp_soc *soc)
+{
+}
+#endif
+
 /**
  * dp_reinit_rings(): Reinitialize host managed rings
  * @soc: dp soc handle
@@ -13101,6 +13156,8 @@ static QDF_STATUS dp_umac_reset_handle_post_reset(struct dp_soc *soc)
 {
 	qdf_nbuf_t *nbuf_list = &soc->umac_reset_ctx.nbuf_list;
 
+	dp_set_umac_regs(soc);
+
 	dp_reinit_rings(soc);
 
 	dp_rx_desc_reuse(soc, nbuf_list);

dp/wifi3.0/dp_types.h

@@ -1934,6 +1934,13 @@ struct dp_arch_ops {
 	struct dp_peer *(*dp_find_peer_by_destmac)(struct dp_soc *soc,
 						   uint8_t *dest_mac_addr,
 						   uint8_t vdev_id);
+	void (*dp_bank_reconfig)(struct dp_soc *soc, struct dp_vdev *vdev);
+
+	void (*dp_reconfig_tx_vdev_mcast_ctrl)(struct dp_soc *soc,
+					       struct dp_vdev *vdev);
+
+	void (*dp_cc_reg_cfg_init)(struct dp_soc *soc, bool is_4k_align);
+
 	QDF_STATUS
 	(*dp_tx_compute_hw_delay)(struct dp_soc *soc,
 				  struct dp_vdev *vdev,