qcacmn: Expose WMI command in tgt_if
Expose the API to send WMI_SET_TPC_POWER_CMDID within the target_if module. Register the callback under tx_ops. Change-Id: I1d075df717cff997e7ac85884fe587ed298cbb28 CRs-fixed: 2849695
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@@ -662,6 +662,19 @@ target_if_register_master_ext_handler(struct wlan_lmac_if_reg_tx_ops *reg_ops)
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}
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}
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#endif
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#endif
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static QDF_STATUS
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tgt_if_regulatory_set_tpc_power(struct wlan_objmgr_psoc *psoc,
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uint8_t vdev_id,
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struct reg_tpc_power_info *param)
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{
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wmi_unified_t wmi_handle = get_wmi_unified_hdl_from_psoc(psoc);
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if (!wmi_handle)
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return QDF_STATUS_E_FAILURE;
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return wmi_unified_send_set_tpc_power_cmd(wmi_handle, vdev_id, param);
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}
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QDF_STATUS target_if_register_regulatory_tx_ops(
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QDF_STATUS target_if_register_regulatory_tx_ops(
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struct wlan_lmac_if_tx_ops *tx_ops)
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struct wlan_lmac_if_tx_ops *tx_ops)
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{
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{
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@@ -711,5 +724,7 @@ QDF_STATUS target_if_register_regulatory_tx_ops(
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reg_ops->get_pdev_id_from_phy_id =
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reg_ops->get_pdev_id_from_phy_id =
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tgt_if_regulatory_get_pdev_id_from_phy_id;
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tgt_if_regulatory_get_pdev_id_from_phy_id;
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reg_ops->set_tpc_power = tgt_if_regulatory_set_tpc_power;
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return QDF_STATUS_SUCCESS;
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return QDF_STATUS_SUCCESS;
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}
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}
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@@ -822,6 +822,7 @@ struct wlan_lmac_if_ftm_rx_ops {
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* @register_11d_new_cc_handler: pointer to register 11d cc event handler
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* @register_11d_new_cc_handler: pointer to register 11d cc event handler
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* @unregister_11d_new_cc_handler: pointer to unregister 11d cc event handler
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* @unregister_11d_new_cc_handler: pointer to unregister 11d cc event handler
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* @send_ctl_info: call-back function to send CTL info to firmware
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* @send_ctl_info: call-back function to send CTL info to firmware
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* @set_tpc_power: send transmit power control info to firmware
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*/
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*/
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struct wlan_lmac_if_reg_tx_ops {
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struct wlan_lmac_if_reg_tx_ops {
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QDF_STATUS (*register_master_handler)(struct wlan_objmgr_psoc *psoc,
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QDF_STATUS (*register_master_handler)(struct wlan_objmgr_psoc *psoc,
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@@ -861,6 +862,9 @@ struct wlan_lmac_if_reg_tx_ops {
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uint8_t pdev_id, uint8_t *phy_id);
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uint8_t pdev_id, uint8_t *phy_id);
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QDF_STATUS (*get_pdev_id_from_phy_id)(struct wlan_objmgr_psoc *psoc,
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QDF_STATUS (*get_pdev_id_from_phy_id)(struct wlan_objmgr_psoc *psoc,
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uint8_t phy_id, uint8_t *pdev_id);
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uint8_t phy_id, uint8_t *pdev_id);
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QDF_STATUS (*set_tpc_power)(struct wlan_objmgr_psoc *psoc,
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uint8_t vdev_id,
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struct reg_tpc_power_info *param);
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};
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};
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/**
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/**
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@@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2018-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
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*
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* purpose with or without fee is hereby granted, provided that the above
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@@ -553,6 +553,7 @@ struct vdev_mlme_ops {
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* @vdev: Pointer to vdev objmgr
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* @vdev: Pointer to vdev objmgr
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* @ops: VDEV MLME callback table
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* @ops: VDEV MLME callback table
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* @ext_vdev_ptr: VDEV MLME legacy pointer
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* @ext_vdev_ptr: VDEV MLME legacy pointer
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* @reg_tpc_obj: Regulatory transmit power info
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* @vdev_rt: VDEV response timer
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* @vdev_rt: VDEV response timer
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* @vdev_wakelock: vdev wakelock sub structure
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* @vdev_wakelock: vdev wakelock sub structure
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*/
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*/
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@@ -570,6 +571,7 @@ struct vdev_mlme_obj {
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struct wlan_objmgr_vdev *vdev;
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struct wlan_objmgr_vdev *vdev;
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struct vdev_mlme_ops *ops;
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struct vdev_mlme_ops *ops;
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mlme_vdev_ext_t *ext_vdev_ptr;
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mlme_vdev_ext_t *ext_vdev_ptr;
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struct reg_tpc_power_info reg_tpc_obj;
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};
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};
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/**
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/**
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@@ -80,6 +80,8 @@
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#define BW_160_MHZ 160
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#define BW_160_MHZ 160
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#define BW_40_MHZ 40
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#define BW_40_MHZ 40
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#define MAX_NUM_PWR_LEVEL 16
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/**
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/**
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* enum dfs_reg - DFS region
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* enum dfs_reg - DFS region
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* @DFS_UNINIT_REGION: un-initialized region
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* @DFS_UNINIT_REGION: un-initialized region
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@@ -1313,4 +1315,38 @@ enum reg_phymode {
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REG_PHYMODE_MAX,
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REG_PHYMODE_MAX,
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};
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};
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/**
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* struct chan_power_info - TPE containing power info per channel chunk
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* @chan_cfreq: channel center freq (MHz)
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* @tx_power: transmit power (dBm)
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*/
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struct chan_power_info {
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qdf_freq_t chan_cfreq;
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uint8_t tx_power;
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};
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/**
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* struct reg_tpc_power_info - regulatory TPC power info
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* @is_psd_power: is PSD power or not
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* @eirp_power: Maximum EIRP power (dBm), valid only if power is PSD
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* @power_type_6g: type of power (SP/LPI/VLP)
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* @num_pwr_levels: number of power levels
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* @reg_max: Array of maximum TX power (dBm) per PSD value
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* @ap_constraint_power: AP constraint power (dBm)
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* @frequency: Array of operating frequency
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* @tpe: TPE values processed from TPE IE
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* @chan_power_info: power info to send to FW
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*/
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struct reg_tpc_power_info {
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bool is_psd_power;
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uint8_t eirp_power;
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uint8_t power_type_6g;
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uint8_t num_pwr_levels;
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uint8_t reg_max[MAX_NUM_PWR_LEVEL];
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uint8_t ap_constraint_power;
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qdf_freq_t frequency[MAX_NUM_PWR_LEVEL];
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uint8_t tpe[MAX_NUM_PWR_LEVEL];
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struct chan_power_info chan_power_info[MAX_NUM_PWR_LEVEL];
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};
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#endif
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#endif
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