disp: msm: sde: remove inline prefill properties

Don't expose the prefill requirements for inline rotation.
These values are not used within the driver, so move these
settings to user-space.

Change-Id: Ie1038c5804047fafe0ee3129b993d83d4d31b386
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This commit is contained in:
Steve Cohen
2019-11-26 17:25:32 -05:00
parent 60133f5ebb
commit 2f6b16af77
3 changed files with 0 additions and 33 deletions

View File

@@ -1271,12 +1271,6 @@ static void _sde_sspp_setup_vig(struct sde_mdss_cfg *sde_cfg,
sde_cfg->true_inline_dwnscale_nrt; sde_cfg->true_inline_dwnscale_nrt;
sblk->in_rot_maxheight = sblk->in_rot_maxheight =
MAX_PRE_ROT_HEIGHT_INLINE_ROT_DEFAULT; MAX_PRE_ROT_HEIGHT_INLINE_ROT_DEFAULT;
sblk->in_rot_prefill_fudge_lines =
sde_cfg->true_inline_prefill_fudge_lines;
sblk->in_rot_prefill_lines_nv12 =
sde_cfg->true_inline_prefill_lines_nv12;
sblk->in_rot_prefill_lines =
sde_cfg->true_inline_prefill_lines;
} }
if (IS_SDE_INLINE_ROT_REV_200(sde_cfg->true_inline_rot_rev)) { if (IS_SDE_INLINE_ROT_REV_200(sde_cfg->true_inline_rot_rev)) {
@@ -4327,9 +4321,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_DENOMINATOR; MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_DENOMINATOR;
sde_cfg->true_inline_dwnscale_nrt = sde_cfg->true_inline_dwnscale_nrt =
MAX_DOWNSCALE_RATIO_INROT_NRT_DEFAULT; MAX_DOWNSCALE_RATIO_INROT_NRT_DEFAULT;
sde_cfg->true_inline_prefill_fudge_lines = 2;
sde_cfg->true_inline_prefill_lines_nv12 = 32;
sde_cfg->true_inline_prefill_lines = 48;
sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0; sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0;
sde_cfg->inline_disable_const_clr = true; sde_cfg->inline_disable_const_clr = true;
} else if (IS_SAIPAN_TARGET(hw_rev)) { } else if (IS_SAIPAN_TARGET(hw_rev)) {
@@ -4358,9 +4349,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_DENOMINATOR; MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_DENOMINATOR;
sde_cfg->true_inline_dwnscale_nrt = sde_cfg->true_inline_dwnscale_nrt =
MAX_DOWNSCALE_RATIO_INROT_NRT_DEFAULT; MAX_DOWNSCALE_RATIO_INROT_NRT_DEFAULT;
sde_cfg->true_inline_prefill_fudge_lines = 2;
sde_cfg->true_inline_prefill_lines_nv12 = 32;
sde_cfg->true_inline_prefill_lines = 48;
sde_cfg->inline_disable_const_clr = true; sde_cfg->inline_disable_const_clr = true;
} else if (IS_SDMTRINKET_TARGET(hw_rev)) { } else if (IS_SDMTRINKET_TARGET(hw_rev)) {
sde_cfg->has_cwb_support = true; sde_cfg->has_cwb_support = true;
@@ -4414,9 +4402,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
MAX_DOWNSCALE_RATIO_INROT_PD_RT_DENOMINATOR; MAX_DOWNSCALE_RATIO_INROT_PD_RT_DENOMINATOR;
sde_cfg->true_inline_dwnscale_nrt = sde_cfg->true_inline_dwnscale_nrt =
MAX_DOWNSCALE_RATIO_INROT_NRT_DEFAULT; MAX_DOWNSCALE_RATIO_INROT_NRT_DEFAULT;
sde_cfg->true_inline_prefill_fudge_lines = 2;
sde_cfg->true_inline_prefill_lines_nv12 = 32;
sde_cfg->true_inline_prefill_lines = 48;
sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0; sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0;
sde_cfg->vbif_disable_inner_outer_shareable = true; sde_cfg->vbif_disable_inner_outer_shareable = true;
} else { } else {

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@@ -627,9 +627,6 @@ struct sde_qos_lut_tbl {
* @in_rot_minpredwnscale_num: min downscale ratio to enable pre-downscale * @in_rot_minpredwnscale_num: min downscale ratio to enable pre-downscale
* @in_rot_minpredwnscale_denom: min downscale ratio to enable pre-downscale * @in_rot_minpredwnscale_denom: min downscale ratio to enable pre-downscale
* @in_rot_maxheight: max pre rotated height for inline rotation * @in_rot_maxheight: max pre rotated height for inline rotation
* @in_rot_prefill_fudge_lines: prefill fudge lines for inline rotation
* @in_rot_prefill_lines_mv12: prefill lines for nv12 format inline rotation
* @in_rot_prefill_lines: prefill lines for inline rotation
* @llcc_scid: scid for the system cache * @llcc_scid: scid for the system cache
* @llcc_slice size: slice size of the system cache * @llcc_slice size: slice size of the system cache
*/ */
@@ -668,9 +665,6 @@ struct sde_sspp_sub_blks {
u32 in_rot_minpredwnscale_num; u32 in_rot_minpredwnscale_num;
u32 in_rot_minpredwnscale_denom; u32 in_rot_minpredwnscale_denom;
u32 in_rot_maxheight; u32 in_rot_maxheight;
u32 in_rot_prefill_fudge_lines;
u32 in_rot_prefill_lines_nv12;
u32 in_rot_prefill_lines;
int llcc_scid; int llcc_scid;
size_t llcc_slice_size; size_t llcc_slice_size;
}; };
@@ -1282,9 +1276,6 @@ struct sde_limit_cfg {
* @true_inline_dwnscale_rt_denom true inline rot downscale ratio for rt * @true_inline_dwnscale_rt_denom true inline rot downscale ratio for rt
* - denominator * - denominator
* @true_inline_dwnscale_nrt true inline rotator downscale ratio for nrt * @true_inline_dwnscale_nrt true inline rotator downscale ratio for nrt
* @true_inline_prefill_fudge_lines true inline rotator prefill fudge lines
* @true_inline_prefill_lines_nv12 true inline prefill lines for nv12 format
* @true_inline_prefill_lines true inline prefill lines
* @macrotile_mode UBWC parameter for macro tile channel distribution * @macrotile_mode UBWC parameter for macro tile channel distribution
* @pipe_order_type indicate if it is required to specify pipe order * @pipe_order_type indicate if it is required to specify pipe order
* @delay_prg_fetch_start indicates if throttling the fetch start is required * @delay_prg_fetch_start indicates if throttling the fetch start is required
@@ -1345,9 +1336,6 @@ struct sde_mdss_cfg {
u32 true_inline_dwnscale_rt_num; u32 true_inline_dwnscale_rt_num;
u32 true_inline_dwnscale_rt_denom; u32 true_inline_dwnscale_rt_denom;
u32 true_inline_dwnscale_nrt; u32 true_inline_dwnscale_nrt;
u32 true_inline_prefill_fudge_lines;
u32 true_inline_prefill_lines_nv12;
u32 true_inline_prefill_lines;
u32 macrotile_mode; u32 macrotile_mode;
u32 pipe_order_type; u32 pipe_order_type;
bool delay_prg_fetch_start; bool delay_prg_fetch_start;

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@@ -3668,12 +3668,6 @@ static void _sde_plane_install_properties(struct drm_plane *plane,
psde->pipe_sblk->in_rot_maxdwnscale_nrt); psde->pipe_sblk->in_rot_maxdwnscale_nrt);
sde_kms_info_add_keyint(info, "true_inline_max_height", sde_kms_info_add_keyint(info, "true_inline_max_height",
psde->pipe_sblk->in_rot_maxheight); psde->pipe_sblk->in_rot_maxheight);
sde_kms_info_add_keyint(info, "true_inline_prefill_fudge_lines",
psde->pipe_sblk->in_rot_prefill_fudge_lines);
sde_kms_info_add_keyint(info, "true_inline_prefill_lines_nv12",
psde->pipe_sblk->in_rot_prefill_lines_nv12);
sde_kms_info_add_keyint(info, "true_inline_prefill_lines",
psde->pipe_sblk->in_rot_prefill_lines);
inline_rot_fmt_list = psde->pipe_sblk->in_rot_format_list; inline_rot_fmt_list = psde->pipe_sblk->in_rot_format_list;