asoc: add the initial tambora driver files
Add the initial tambora driver files. Change-Id: Ic6bebd953f031549e7cf72874cebd4fae05deae3 Signed-off-by: Yuhui Zhao <quic_yuhuzhao@quicinc.com>
Этот коммит содержится в:
229
asoc/codecs/wcd9378/internal.h
Обычный файл
229
asoc/codecs/wcd9378/internal.h
Обычный файл
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _WCD9378_INTERNAL_H
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#define _WCD9378_INTERNAL_H
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#include <asoc/wcd-mbhc-v2.h>
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#include <asoc/wcd-irq.h>
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#include <asoc/wcd-clsh.h>
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#include <soc/soundwire.h>
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#include "wcd9378-mbhc.h"
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#include "wcd9378.h"
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#define SWR_SCP_CONTROL 0x44
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#define SWR_SCP_HOST_CLK_DIV2_CTL_BANK 0xE0
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#define WCD9378_MAX_MICBIAS 3
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#define SIM_MIC_NUM 3
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/* Convert from vout ctl to micbias voltage in mV */
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#define WCD_VOUT_CTL_TO_MICB(v) (1000 + v * 50)
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#define MAX_PORT 8
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#define MAX_CH_PER_PORT 8
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#define TX_ADC_MAX 3
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#define SWR_NUM_PORTS 4
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enum {
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TX_HDR12 = 0,
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TX_HDR34,
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TX_HDR_MAX,
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};
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enum {
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SIM_MIC0,
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SIM_MIC1,
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SIM_MIC2,
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SIM_JACK,
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MICB_VAL_NUM,
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};
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extern struct regmap_config wcd9378_regmap_config;
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struct codec_port_info {
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u32 slave_port_type;
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u32 master_port_type;
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u32 ch_mask;
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u32 num_ch;
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u32 ch_rate;
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};
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enum {
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RX_CLK_9P6MHZ,
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RX_CLK_12P288MHZ,
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RX_CLK_11P2896MHZ,
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};
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enum {
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RX_PATH,
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TX_PATH,
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};
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struct wcd9378_priv {
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struct device *dev;
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u32 sys_usage;
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u32 wcd_mode;
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int variant;
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struct snd_soc_component *component;
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struct device_node *rst_np;
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struct regmap *regmap;
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struct swr_device *rx_swr_dev;
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struct swr_device *tx_swr_dev;
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s32 micb_ref[WCD9378_MAX_MICBIAS];
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s32 pullup_ref[WCD9378_MAX_MICBIAS];
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u32 micb_sel[SIM_MIC_NUM];
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u32 micb_val[MICB_VAL_NUM];
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struct device_node *wcd_rst_np;
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struct mutex micb_lock;
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struct mutex wakeup_lock;
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s32 dmic_0_1_clk_cnt;
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s32 dmic_2_3_clk_cnt;
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s32 dmic_4_5_clk_cnt;
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int hdr_en[TX_HDR_MAX];
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/* class h specific info */
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struct wcd_clsh_cdc_info clsh_info;
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/* mbhc module */
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struct wcd9378_mbhc *mbhc;
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u32 hph_mode;
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u16 hph_gain;
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u32 rx2_clk_mode;
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u32 tx_mode[TX_ADC_MAX];
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s32 adc_count;
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bool comp1_enable;
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bool comp2_enable;
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bool va_amic_en;
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bool ear_enable;
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bool aux_enable;
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bool ldoh;
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bool bcs_dis;
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bool dapm_bias_off;
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struct irq_domain *virq;
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struct wcd_irq_info irq_info;
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u32 rx_clk_cnt;
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int num_irq_regs;
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/* to track the status */
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unsigned long status_mask;
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u8 num_tx_ports;
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u8 num_rx_ports;
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struct codec_port_info
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tx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
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struct codec_port_info
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rx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
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struct swr_port_params tx_port_params[SWR_UC_MAX][SWR_NUM_PORTS];
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struct swr_dev_frame_config swr_tx_port_params[SWR_UC_MAX];
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struct regulator_bulk_data *supplies;
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struct notifier_block nblock;
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/* wcd callback to bolero */
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void *handle;
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int (*update_wcd_event)(void *handle, u16 event, u32 data);
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int (*register_notifier)(void *handle,
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struct notifier_block *nblock,
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bool enable);
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int (*wakeup)(void *handle, bool enable);
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u32 version;
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/* Entry for version info */
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struct snd_info_entry *entry;
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struct snd_info_entry *version_entry;
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struct snd_info_entry *variant_entry;
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int flyback_cur_det_disable;
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int ear_rx_path;
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int aux_rx_path;
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bool dev_up;
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u8 tx_master_ch_map[WCD9378_MAX_SLAVE_CH_TYPES];
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bool usbc_hs_status;
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/* wcd to swr dmic notification */
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bool notify_swr_dmic;
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u8 swr_base_clk;
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u8 swr_clk_scale;
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struct blocking_notifier_head notifier;
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};
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struct wcd9378_micbias_setting {
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u8 ldoh_v;
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u32 cfilt1_mv;
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u32 micb1_mv;
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u32 micb2_mv;
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u32 micb3_mv;
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u32 micb1_usage_val;
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u32 micb2_usage_val;
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u32 micb3_usage_val;
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u8 bias1_cfilt_sel;
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};
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struct wcd9378_pdata {
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struct device_node *rst_np;
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struct device_node *rx_slave;
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struct device_node *tx_slave;
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struct wcd9378_micbias_setting micbias;
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struct cdc_regulator *regulator;
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int num_supplies;
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};
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struct wcd_ctrl_platform_data {
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void *handle;
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int (*update_wcd_event)(void *handle, u16 event, u32 data);
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int (*register_notifier)(void *handle,
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struct notifier_block *nblock,
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bool enable);
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};
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enum {
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WCD_RX1,
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WCD_RX2,
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WCD_RX3
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};
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enum {
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/* INTR_CTRL_INT_MASK_0 */
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WCD9378_IRQ_MBHC_BUTTON_PRESS_DET = 0,
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WCD9378_IRQ_MBHC_BUTTON_RELEASE_DET,
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WCD9378_IRQ_MBHC_ELECT_INS_REM_DET,
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WCD9378_IRQ_MBHC_ELECT_INS_REM_LEG_DET,
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WCD9378_IRQ_MBHC_SW_DET,
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WCD9378_IRQ_HPHR_OCP_INT,
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WCD9378_IRQ_HPHR_CNP_INT,
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WCD9378_IRQ_HPHL_OCP_INT,
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/* INTR_CTRL_INT_MASK_1 */
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WCD9378_IRQ_HPHL_CNP_INT,
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WCD9378_IRQ_EAR_CNP_INT,
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WCD9378_IRQ_EAR_SCD_INT,
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WCD9378_IRQ_AUX_CNP_INT,
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WCD9378_IRQ_AUX_SCD_INT,
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WCD9378_IRQ_HPHL_PDM_WD_INT,
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WCD9378_IRQ_HPHR_PDM_WD_INT,
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WCD9378_IRQ_AUX_PDM_WD_INT,
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/* INTR_CTRL_INT_MASK_2 */
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WCD9378_IRQ_LDORT_SCD_INT,
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WCD9378_IRQ_MBHC_MOISTURE_INT,
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WCD9378_IRQ_HPHL_SURGE_DET_INT,
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WCD9378_IRQ_HPHR_SURGE_DET_INT,
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WCD9378_IRQ_SAPU_PROT_MODE_CHG,
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WCD9378_NUM_IRQS,
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};
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extern struct wcd9378_mbhc *wcd9378_soc_get_mbhc(
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struct snd_soc_component *component);
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extern void wcd9378_disable_bcs_before_slow_insert(
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struct snd_soc_component *component,
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bool bcs_disable);
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extern int wcd9378_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
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int volt, int micb_num);
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extern int wcd9378_get_micb_vout_ctl_val(u32 micb_mv);
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extern int wcd9378_micbias_control(struct snd_soc_component *component,
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int micb_num, int req, bool is_dapm);
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#endif /* _WCD9378_INTERNAL_H */
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