disp: msm: sde: use device tree node to enable INTF TE capability

Set the INTF TE capability bit only on interfaces which have a non-zero
value in the device tree node qcom,sde-intf-tear-irq-off instead of
enabling it for all interfaces based only on the HW version. The HW
doesn't support TE programming for non-TE enabled interfaces, so this
patch only populates the TE ops for those which support it.

Change-Id: I00518e846dc44e1e0808a049625dc14099656e11
Signed-off-by: Steve Cohen <[email protected]>

msm/sde/sde_encoder_phys_cmd.c

@@ -1801,6 +1801,15 @@ static void sde_encoder_phys_cmd_init_ops(struct sde_encoder_phys_ops *ops)
 	ops->collect_misr = sde_encoder_helper_collect_misr;
 }
 
+static inline bool sde_encoder_phys_cmd_intf_te_supported(
+		const struct sde_mdss_cfg *sde_cfg, enum sde_intf idx)
+{
+	if (sde_cfg && ((idx - INTF_0) < sde_cfg->intf_count))
+		return test_bit(SDE_INTF_TE,
+				&(sde_cfg->intf[idx - INTF_0].features));
+	return false;
+}
+
 struct sde_encoder_phys *sde_encoder_phys_cmd_init(
 		struct sde_enc_phys_init_params *p)
 {
@@ -1841,10 +1850,8 @@ struct sde_encoder_phys *sde_encoder_phys_cmd_init(
 	sde_encoder_phys_cmd_init_ops(&phys_enc->ops);
 	phys_enc->comp_type = p->comp_type;
 
-	if (sde_hw_intf_te_supported(phys_enc->sde_kms->catalog))
-		phys_enc->has_intf_te = true;
-	else
-		phys_enc->has_intf_te = false;
+	phys_enc->has_intf_te = sde_encoder_phys_cmd_intf_te_supported(
+			phys_enc->sde_kms->catalog, phys_enc->intf_idx);
 
 	for (i = 0; i < INTR_IDX_MAX; i++) {
 		irq = &phys_enc->irq[i];

msm/sde/sde_hw_catalog.c

@@ -2058,10 +2058,9 @@ static int sde_intf_parse_dt(struct device_node *np,
 					intf->id, intf->te_irq_offset);
 			if (rc)
 				goto end;
-		}
 
-		if (sde_cfg->has_intf_te)
 			set_bit(SDE_INTF_TE, &intf->features);
+		}
 	}
 
 end:
@@ -4222,7 +4221,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		sde_cfg->has_qos_fl_nocalc = true;
 		sde_cfg->has_3d_merge_reset = true;
 		sde_cfg->has_decimation = true;
-		sde_cfg->has_intf_te = true;
 		sde_cfg->vbif_disable_inner_outer_shareable = true;
 	} else if (IS_SDMSHRIKE_TARGET(hw_rev)) {
 		sde_cfg->has_wb_ubwc = true;
@@ -4234,7 +4232,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		sde_cfg->has_decimation = true;
 		sde_cfg->has_hdr = true;
 		sde_cfg->has_vig_p010 = true;
-		sde_cfg->has_intf_te = true;
 	} else if (IS_SM6150_TARGET(hw_rev)) {
 		sde_cfg->has_cwb_support = true;
 		sde_cfg->has_qsync = true;
@@ -4252,7 +4249,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		sde_cfg->has_3d_merge_reset = true;
 		sde_cfg->has_hdr = true;
 		sde_cfg->has_vig_p010 = true;
-		sde_cfg->has_intf_te = true;
 		sde_cfg->vbif_disable_inner_outer_shareable = true;
 	} else if (IS_SDMMAGPIE_TARGET(hw_rev)) {
 		sde_cfg->has_cwb_support = true;
@@ -4269,7 +4265,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		sde_cfg->has_sui_blendstage = true;
 		sde_cfg->has_qos_fl_nocalc = true;
 		sde_cfg->has_3d_merge_reset = true;
-		sde_cfg->has_intf_te = true;
 		sde_cfg->vbif_disable_inner_outer_shareable = true;
 	} else if (IS_KONA_TARGET(hw_rev)) {
 		sde_cfg->has_cwb_support = true;
@@ -4301,7 +4296,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		sde_cfg->true_inline_prefill_lines_nv12 = 32;
 		sde_cfg->true_inline_prefill_lines = 48;
 		sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0;
-		sde_cfg->has_intf_te = true;
 		sde_cfg->inline_disable_const_clr = true;
 	} else if (IS_SAIPAN_TARGET(hw_rev)) {
 		sde_cfg->has_cwb_support = true;
@@ -4332,7 +4326,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		sde_cfg->true_inline_prefill_fudge_lines = 2;
 		sde_cfg->true_inline_prefill_lines_nv12 = 32;
 		sde_cfg->true_inline_prefill_lines = 48;
-		sde_cfg->has_intf_te = true;
 		sde_cfg->inline_disable_const_clr = true;
 	} else if (IS_SDMTRINKET_TARGET(hw_rev)) {
 		sde_cfg->has_cwb_support = true;
@@ -4347,7 +4340,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		sde_cfg->sui_block_xin_mask = 0xC61;
 		sde_cfg->has_hdr = false;
 		sde_cfg->has_sui_blendstage = true;
-		sde_cfg->has_intf_te = true;
 		sde_cfg->vbif_disable_inner_outer_shareable = true;
 	} else if (IS_BENGAL_TARGET(hw_rev)) {
 		sde_cfg->has_cwb_support = false;
@@ -4362,7 +4354,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		sde_cfg->sui_block_xin_mask = 0xC01;
 		sde_cfg->has_hdr = false;
 		sde_cfg->has_sui_blendstage = true;
-		sde_cfg->has_intf_te = true;
 		sde_cfg->vbif_disable_inner_outer_shareable = true;
 	} else if (IS_LAHAINA_TARGET(hw_rev)) {
 		sde_cfg->has_cwb_support = true;
@@ -4392,7 +4383,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		sde_cfg->true_inline_prefill_lines_nv12 = 32;
 		sde_cfg->true_inline_prefill_lines = 48;
 		sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0;
-		sde_cfg->has_intf_te = true;
 		sde_cfg->vbif_disable_inner_outer_shareable = true;
 	} else {
 		SDE_ERROR("unsupported chipset id:%X\n", hw_rev);

msm/sde/sde_hw_catalog.h

@@ -1283,7 +1283,6 @@ struct sde_limit_cfg {
  * @has_decimation     Supports decimation
  * @has_qos_fl_nocalc  flag to indicate QoS fill level needs no calculation
  * @has_mixer_combined_alpha     Mixer has single register for FG & BG alpha
- * @has_intf_te        TE logic resides in INTF block
  * @vbif_disable_inner_outer_shareable     VBIF requires disabling shareables
  * @inline_disable_const_clr     Disable constant color during inline rotate
  * @sc_cfg: system cache configuration
@@ -1347,7 +1346,6 @@ struct sde_mdss_cfg {
 	bool has_decimation;
 	bool has_qos_fl_nocalc;
 	bool has_mixer_combined_alpha;
-	bool has_intf_te;
 	bool vbif_disable_inner_outer_shareable;
 	bool inline_disable_const_clr;
 
@@ -1515,9 +1513,4 @@ static inline bool sde_hw_sspp_multirect_enabled(const struct sde_sspp_cfg *cfg)
 			 test_bit(SDE_SSPP_SMART_DMA_V2, &cfg->features) ||
 			 test_bit(SDE_SSPP_SMART_DMA_V2p5, &cfg->features);
 }
-
-static inline bool sde_hw_intf_te_supported(const struct sde_mdss_cfg *sde_cfg)
-{
-	return test_bit(SDE_INTF_TE, &(sde_cfg->intf[0].features));
-}
 #endif /* _SDE_HW_CATALOG_H */