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@@ -29,6 +29,7 @@
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#define WCD938X_VERSION_1_0 1
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#define WCD938X_VERSION_ENTRY_SIZE 32
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+#define EAR_RX_PATH_AUX 1
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#define ADC_MODE_VAL_HIFI 0x01
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#define ADC_MODE_VAL_LO_HIF 0x02
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@@ -629,6 +630,8 @@ static int wcd938x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
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/* 100 usec delay as per HW requirement */
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usleep_range(100, 110);
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set_bit(HPH_PA_DELAY, &wcd938x->status_mask);
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+ snd_soc_component_update_bits(component,
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+ WCD938X_DIGITAL_PDM_WD_CTL1, 0x17, 0x13);
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break;
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case SND_SOC_DAPM_POST_PMU:
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/*
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@@ -666,6 +669,8 @@ static int wcd938x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
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case SND_SOC_DAPM_POST_PMD:
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/* 7 msec delay as per HW requirement */
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usleep_range(7000, 7010);
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+ snd_soc_component_update_bits(component,
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+ WCD938X_DIGITAL_PDM_WD_CTL1, 0x17, 0x00);
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blocking_notifier_call_chain(&wcd938x->mbhc->notifier,
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WCD_EVENT_POST_HPHR_PA_OFF,
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&wcd938x->mbhc->wcd_mbhc);
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@@ -706,6 +711,8 @@ static int wcd938x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
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/* 100 usec delay as per HW requirement */
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usleep_range(100, 110);
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set_bit(HPH_PA_DELAY, &wcd938x->status_mask);
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+ snd_soc_component_update_bits(component,
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+ WCD938X_DIGITAL_PDM_WD_CTL0, 0x17, 0x13);
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break;
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case SND_SOC_DAPM_POST_PMU:
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/*
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@@ -743,6 +750,8 @@ static int wcd938x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
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case SND_SOC_DAPM_POST_PMD:
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/* 7 msec delay as per HW requirement */
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usleep_range(7000, 7010);
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+ snd_soc_component_update_bits(component,
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+ WCD938X_DIGITAL_PDM_WD_CTL0, 0x17, 0x00);
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blocking_notifier_call_chain(&wcd938x->mbhc->notifier,
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WCD_EVENT_POST_HPHL_PA_OFF,
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&wcd938x->mbhc->wcd_mbhc);
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@@ -775,6 +784,8 @@ static int wcd938x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
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ret = swr_slvdev_datapath_control(wcd938x->rx_swr_dev,
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wcd938x->rx_swr_dev->dev_num,
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true);
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+ snd_soc_component_update_bits(component,
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+ WCD938X_DIGITAL_PDM_WD_CTL2, 0x05, 0x05);
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break;
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case SND_SOC_DAPM_POST_PMU:
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/* 1 msec delay as per HW requirement */
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@@ -798,6 +809,8 @@ static int wcd938x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
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case SND_SOC_DAPM_POST_PMD:
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/* 1 msec delay as per HW requirement */
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usleep_range(1000, 1010);
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+ snd_soc_component_update_bits(component,
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+ WCD938X_DIGITAL_PDM_WD_CTL2, 0x05, 0x00);
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wcd_cls_h_fsm(component, &wcd938x->clsh_info,
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WCD_CLSH_EVENT_POST_PA,
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WCD_CLSH_STATE_AUX,
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@@ -831,6 +844,21 @@ static int wcd938x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
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ret = swr_slvdev_datapath_control(wcd938x->rx_swr_dev,
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wcd938x->rx_swr_dev->dev_num,
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true);
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+ /*
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+ * Enable watchdog interrupt for HPHL or AUX
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+ * depending on mux value
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+ */
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+ wcd938x->ear_rx_path =
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+ snd_soc_component_read32(
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+ component, WCD938X_DIGITAL_CDC_EAR_PATH_CTL);
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+ if (wcd938x->ear_rx_path & EAR_RX_PATH_AUX)
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+ snd_soc_component_update_bits(component,
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+ WCD938X_DIGITAL_PDM_WD_CTL2,
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+ 0x05, 0x05);
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+ else
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+ snd_soc_component_update_bits(component,
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+ WCD938X_DIGITAL_PDM_WD_CTL0,
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+ 0x17, 0x13);
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break;
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case SND_SOC_DAPM_POST_PMU:
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/* 6 msec delay as per HW requirement */
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@@ -854,6 +882,14 @@ static int wcd938x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
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case SND_SOC_DAPM_POST_PMD:
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/* 7 msec delay as per HW requirement */
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usleep_range(7000, 7010);
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+ if (wcd938x->ear_rx_path & EAR_RX_PATH_AUX)
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+ snd_soc_component_update_bits(component,
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+ WCD938X_DIGITAL_PDM_WD_CTL2,
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+ 0x05, 0x00);
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+ else
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+ snd_soc_component_update_bits(component,
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+ WCD938X_DIGITAL_PDM_WD_CTL0,
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+ 0x17, 0x00);
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wcd_cls_h_fsm(component, &wcd938x->clsh_info,
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WCD_CLSH_EVENT_POST_PA,
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WCD_CLSH_STATE_EAR,
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@@ -2717,6 +2753,13 @@ struct wcd938x_pdata *wcd938x_populate_dt_data(struct device *dev)
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return pdata;
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}
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+static irqreturn_t wcd938x_wd_handle_irq(int irq, void *data)
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+{
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+ pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
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+ __func__, irq);
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+ return IRQ_HANDLED;
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+}
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+
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static int wcd938x_bind(struct device *dev)
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{
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int ret = 0, i = 0;
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@@ -2780,6 +2823,18 @@ static int wcd938x_bind(struct device *dev)
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}
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wcd938x->tx_swr_dev->slave_irq = wcd938x->virq;
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+ /* Request for watchdog interrupt */
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+ wcd_request_irq(&wcd938x->irq_info, WCD938X_IRQ_HPHR_PDM_WD_INT,
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+ "HPHR PDM WD INT", wcd938x_wd_handle_irq, NULL);
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+ wcd_request_irq(&wcd938x->irq_info, WCD938X_IRQ_HPHL_PDM_WD_INT,
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+ "HPHL PDM WD INT", wcd938x_wd_handle_irq, NULL);
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+ wcd_request_irq(&wcd938x->irq_info, WCD938X_IRQ_AUX_PDM_WD_INT,
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+ "AUX PDM WD INT", wcd938x_wd_handle_irq, NULL);
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+ /* Enable watchdog interrupt for HPH and AUX */
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+ wcd_enable_irq(&wcd938x->irq_info, WCD938X_IRQ_HPHR_PDM_WD_INT);
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+ wcd_enable_irq(&wcd938x->irq_info, WCD938X_IRQ_HPHL_PDM_WD_INT);
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+ wcd_enable_irq(&wcd938x->irq_info, WCD938X_IRQ_AUX_PDM_WD_INT);
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+
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ret = snd_soc_register_component(dev, &soc_codec_dev_wcd938x,
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NULL, 0);
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if (ret) {
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