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qcacmn: Hal related changes for QCA5332

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1. Changes to move hal_tx_config_rbm_mapping_be function from common to
device specific as it has ppe related snippets.
2. Changes to remove all PPE related codes in QCA5332 hal code.
3. Changes to correct macros according to fw_hrs.
4. Changes to move functions with device specific Macros to header files
so that it gets compiled with respective device's FW headers and gets
correct Macros

Change-Id: I479b406f318aa42d2b1032349aaf42d95b8c18e5
CRs-Fixed: 3235966
This commit is contained in:
Hariharan Ramanathan
2022-06-28 16:41:07 +05:30
committed by Madan Koyyalamudi
parent 7e799fcbae
commit 16630d2422
14 changed files with 755 additions and 797 deletions
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65
hal/wifi3.0/kiwi/hal_kiwi_tx.h
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@@ -1,6 +1,6 @@
/*
* Copyright (c) 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -145,3 +145,66 @@ hal_tx_init_cmd_credit_ring_kiwi(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl)
{
}
#ifdef DP_TX_IMPLICIT_RBM_MAPPING
#define RBM_MAPPING_BMSK HWIO_TCL_R0_RBM_MAPPING0_SW2TCL1_RING_BMSK
#define RBM_MAPPING_SHFT HWIO_TCL_R0_RBM_MAPPING0_SW2TCL2_RING_SHFT
#define RBM_PPE2TCL_OFFSET \
(HWIO_TCL_R0_RBM_MAPPING0_PPE2TCL1_RING_SHFT >> 2)
#define RBM_TCL_CMD_CREDIT_OFFSET \
(HWIO_TCL_R0_RBM_MAPPING0_SW2TCL_CREDIT_RING_SHFT >> 2)
/**
* hal_tx_config_rbm_mapping_be() - Update return buffer manager ring id
* @hal_soc: HAL SoC context
* @hal_ring_hdl: Source ring pointer
* @rbm_id: return buffer manager ring id
*
* Return: void
*/
static inline void
hal_tx_config_rbm_mapping_be_kiwi(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl,
uint8_t rbm_id)
{
struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl;
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
uint32_t reg_addr = 0;
uint32_t reg_val = 0;
uint32_t val = 0;
uint8_t ring_num;
enum hal_ring_type ring_type;
ring_type = srng->ring_type;
ring_num = hal_soc->hw_srng_table[ring_type].start_ring_id;
ring_num = srng->ring_id - ring_num;
reg_addr = HWIO_TCL_R0_RBM_MAPPING0_ADDR(MAC_TCL_REG_REG_BASE);
if (ring_type == PPE2TCL)
ring_num = ring_num + RBM_PPE2TCL_OFFSET;
else if (ring_type == TCL_CMD_CREDIT)
ring_num = ring_num + RBM_TCL_CMD_CREDIT_OFFSET;
/* get current value stored in register address */
val = HAL_REG_READ(hal_soc, reg_addr);
/* mask out other stored value */
val &= (~(RBM_MAPPING_BMSK << (RBM_MAPPING_SHFT * ring_num)));
reg_val = val | ((RBM_MAPPING_BMSK & rbm_id) <<
(RBM_MAPPING_SHFT * ring_num));
/* write rbm mapped value to register address */
HAL_REG_WRITE(hal_soc, reg_addr, reg_val);
}
#else
static inline void
hal_tx_config_rbm_mapping_be_kiwi(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl,
uint8_t rbm_id)
{
}
#endif