qcacmn: Hal related changes for QCA5332

1. Changes to move hal_tx_config_rbm_mapping_be function from common to
device specific as it has ppe related snippets.
2. Changes to remove all PPE related codes in QCA5332 hal code.
3. Changes to correct macros according to fw_hrs.
4. Changes to move functions with device specific Macros to header files
so that it gets compiled with respective device's FW headers and gets
correct Macros

Change-Id: I479b406f318aa42d2b1032349aaf42d95b8c18e5
CRs-Fixed: 3235966
This commit is contained in:
Hariharan Ramanathan
2022-06-28 16:41:07 +05:30
committed by Madan Koyyalamudi
parent 7e799fcbae
commit 16630d2422
14 changed files with 755 additions and 797 deletions

View File

@@ -199,91 +199,6 @@ void hal_reo_qdesc_setup_be(hal_soc_handle_t hal_soc_hdl, int tid,
qdf_export_symbol(hal_reo_qdesc_setup_be);
/**
* hal_get_ba_aging_timeout_be - Get BA Aging timeout
*
* @hal_soc: Opaque HAL SOC handle
* @ac: Access category
* @value: window size to get
*/
void hal_get_ba_aging_timeout_be(hal_soc_handle_t hal_soc_hdl, uint8_t ac,
uint32_t *value)
{
struct hal_soc *soc = (struct hal_soc *)hal_soc_hdl;
switch (ac) {
case WME_AC_BE:
*value = HAL_REG_READ(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(
REO_REG_REG_BASE)) / 1000;
break;
case WME_AC_BK:
*value = HAL_REG_READ(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(
REO_REG_REG_BASE)) / 1000;
break;
case WME_AC_VI:
*value = HAL_REG_READ(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(
REO_REG_REG_BASE)) / 1000;
break;
case WME_AC_VO:
*value = HAL_REG_READ(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(
REO_REG_REG_BASE)) / 1000;
break;
default:
QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
"Invalid AC: %d\n", ac);
}
}
qdf_export_symbol(hal_get_ba_aging_timeout_be);
/**
* hal_set_ba_aging_timeout_be - Set BA Aging timeout
*
* @hal_soc: Opaque HAL SOC handle
* @ac: Access category
* ac: 0 - Background, 1 - Best Effort, 2 - Video, 3 - Voice
* @value: Input value to set
*/
void hal_set_ba_aging_timeout_be(hal_soc_handle_t hal_soc_hdl, uint8_t ac,
uint32_t value)
{
struct hal_soc *soc = (struct hal_soc *)hal_soc_hdl;
switch (ac) {
case WME_AC_BE:
HAL_REG_WRITE(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(
REO_REG_REG_BASE),
value * 1000);
break;
case WME_AC_BK:
HAL_REG_WRITE(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(
REO_REG_REG_BASE),
value * 1000);
break;
case WME_AC_VI:
HAL_REG_WRITE(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(
REO_REG_REG_BASE),
value * 1000);
break;
case WME_AC_VO:
HAL_REG_WRITE(soc,
HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(
REO_REG_REG_BASE),
value * 1000);
break;
default:
QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
"Invalid AC: %d\n", ac);
}
}
qdf_export_symbol(hal_set_ba_aging_timeout_be);
static void
hal_reo_cmd_set_descr_addr_be(uint32_t *reo_desc,
enum hal_reo_cmd_type type,