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@@ -1258,27 +1258,33 @@ static void _sde_sspp_setup_vig(struct sde_mdss_cfg *sde_cfg,
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sblk->format_list = sde_cfg->vig_formats;
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sblk->format_list = sde_cfg->vig_formats;
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sblk->virt_format_list = sde_cfg->virt_vig_formats;
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sblk->virt_format_list = sde_cfg->virt_vig_formats;
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- if (IS_SDE_INLINE_ROT_REV_100(sde_cfg->true_inline_rot_rev) ||
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- IS_SDE_INLINE_ROT_REV_200(
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- sde_cfg->true_inline_rot_rev)) {
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+
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+ if (sde_cfg->true_inline_rot_rev > 0) {
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set_bit(SDE_SSPP_TRUE_INLINE_ROT, &sspp->features);
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set_bit(SDE_SSPP_TRUE_INLINE_ROT, &sspp->features);
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sblk->in_rot_format_list = sde_cfg->inline_rot_formats;
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sblk->in_rot_format_list = sde_cfg->inline_rot_formats;
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- sblk->in_rot_maxdwnscale_rt_num =
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- sde_cfg->true_inline_dwnscale_rt_num;
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- sblk->in_rot_maxdwnscale_rt_denom =
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- sde_cfg->true_inline_dwnscale_rt_denom;
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- sblk->in_rot_maxdwnscale_nrt =
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- sde_cfg->true_inline_dwnscale_nrt;
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sblk->in_rot_maxheight =
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sblk->in_rot_maxheight =
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- MAX_PRE_ROT_HEIGHT_INLINE_ROT_DEFAULT;
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+ MAX_PRE_ROT_HEIGHT_INLINE_ROT_DEFAULT;
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}
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}
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if (IS_SDE_INLINE_ROT_REV_200(sde_cfg->true_inline_rot_rev)) {
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if (IS_SDE_INLINE_ROT_REV_200(sde_cfg->true_inline_rot_rev)) {
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set_bit(SDE_SSPP_PREDOWNSCALE, &sspp->features);
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set_bit(SDE_SSPP_PREDOWNSCALE, &sspp->features);
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+ sblk->in_rot_maxdwnscale_rt_num =
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+ MAX_DOWNSCALE_RATIO_INROT_PD_RT_NUMERATOR;
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+ sblk->in_rot_maxdwnscale_rt_denom =
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+ MAX_DOWNSCALE_RATIO_INROT_PD_RT_DENOMINATOR;
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+ sblk->in_rot_maxdwnscale_nrt =
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+ MAX_DOWNSCALE_RATIO_INROT_NRT_DEFAULT;
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sblk->in_rot_minpredwnscale_num =
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sblk->in_rot_minpredwnscale_num =
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MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_NUMERATOR;
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MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_NUMERATOR;
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sblk->in_rot_minpredwnscale_denom =
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sblk->in_rot_minpredwnscale_denom =
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MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_DENOMINATOR;
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MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_DENOMINATOR;
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+ } else if (IS_SDE_INLINE_ROT_REV_100(sde_cfg->true_inline_rot_rev)) {
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+ sblk->in_rot_maxdwnscale_rt_num =
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+ MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_NUMERATOR;
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+ sblk->in_rot_maxdwnscale_rt_denom =
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+ MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_DENOMINATOR;
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+ sblk->in_rot_maxdwnscale_nrt =
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+ MAX_DOWNSCALE_RATIO_INROT_NRT_DEFAULT;
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}
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}
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if (sde_cfg->sc_cfg.has_sys_cache) {
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if (sde_cfg->sc_cfg.has_sys_cache) {
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@@ -4315,12 +4321,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
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set_bit(SDE_MDP_DHDR_MEMPOOL, &sde_cfg->mdp[0].features);
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set_bit(SDE_MDP_DHDR_MEMPOOL, &sde_cfg->mdp[0].features);
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sde_cfg->has_vig_p010 = true;
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sde_cfg->has_vig_p010 = true;
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sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_1_0_0;
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sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_1_0_0;
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- sde_cfg->true_inline_dwnscale_rt_num =
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- MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_NUMERATOR;
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- sde_cfg->true_inline_dwnscale_rt_denom =
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- MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_DENOMINATOR;
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- sde_cfg->true_inline_dwnscale_nrt =
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- MAX_DOWNSCALE_RATIO_INROT_NRT_DEFAULT;
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sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0;
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sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0;
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sde_cfg->inline_disable_const_clr = true;
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sde_cfg->inline_disable_const_clr = true;
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} else if (IS_SAIPAN_TARGET(hw_rev)) {
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} else if (IS_SAIPAN_TARGET(hw_rev)) {
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@@ -4343,12 +4343,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
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set_bit(SDE_MDP_DHDR_MEMPOOL, &sde_cfg->mdp[0].features);
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set_bit(SDE_MDP_DHDR_MEMPOOL, &sde_cfg->mdp[0].features);
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sde_cfg->has_vig_p010 = true;
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sde_cfg->has_vig_p010 = true;
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sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_1_0_0;
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sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_1_0_0;
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- sde_cfg->true_inline_dwnscale_rt_num =
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- MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_NUMERATOR;
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- sde_cfg->true_inline_dwnscale_rt_denom =
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- MAX_DOWNSCALE_RATIO_INROT_NOPD_RT_DENOMINATOR;
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- sde_cfg->true_inline_dwnscale_nrt =
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- MAX_DOWNSCALE_RATIO_INROT_NRT_DEFAULT;
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sde_cfg->inline_disable_const_clr = true;
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sde_cfg->inline_disable_const_clr = true;
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} else if (IS_SDMTRINKET_TARGET(hw_rev)) {
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} else if (IS_SDMTRINKET_TARGET(hw_rev)) {
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sde_cfg->has_cwb_support = true;
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sde_cfg->has_cwb_support = true;
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@@ -4396,12 +4390,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
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set_bit(SDE_MDP_DHDR_MEMPOOL, &sde_cfg->mdp[0].features);
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set_bit(SDE_MDP_DHDR_MEMPOOL, &sde_cfg->mdp[0].features);
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sde_cfg->has_vig_p010 = true;
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sde_cfg->has_vig_p010 = true;
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sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_2_0_0;
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sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_2_0_0;
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- sde_cfg->true_inline_dwnscale_rt_num =
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- MAX_DOWNSCALE_RATIO_INROT_PD_RT_NUMERATOR;
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- sde_cfg->true_inline_dwnscale_rt_denom =
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- MAX_DOWNSCALE_RATIO_INROT_PD_RT_DENOMINATOR;
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- sde_cfg->true_inline_dwnscale_nrt =
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- MAX_DOWNSCALE_RATIO_INROT_NRT_DEFAULT;
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sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0;
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sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0;
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sde_cfg->vbif_disable_inner_outer_shareable = true;
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sde_cfg->vbif_disable_inner_outer_shareable = true;
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} else {
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} else {
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