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@@ -23,6 +23,8 @@
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#include "cam_debug_util.h"
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#include "cam_cpas_api.h"
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#include "cam_trace.h"
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+#include "cam_smmu_api.h"
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+#include "cam_common_util.h"
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static const char drv_name[] = "vfe_bus";
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@@ -2894,15 +2896,22 @@ static void cam_vfe_bus_ver3_update_ubwc_meta_addr(
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dma_addr_t image_buf)
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{
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struct cam_vfe_bus_ver3_reg_offset_ubwc_client *ubwc_regs;
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+ uint32_t temp = cam_smmu_is_expanded_memory() ?
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+ CAM_36BIT_INTF_GET_IOVA_BASE(image_buf) : image_buf;
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+
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+ if (cam_smmu_is_expanded_memory() &&
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+ CAM_36BIT_INTF_GET_IOVA_OFFSET(image_buf)) {
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+ CAM_ERR(CAM_ISP, "Error, address not aligned! offset:0x%x",
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+ CAM_36BIT_INTF_GET_IOVA_OFFSET(image_buf));
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+ }
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if (!regs || !reg_val_pair || !j) {
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CAM_ERR(CAM_ISP, "Invalid args");
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goto end;
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}
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- ubwc_regs = (struct cam_vfe_bus_ver3_reg_offset_ubwc_client *)regs;
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- CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, *j,
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- ubwc_regs->meta_addr, image_buf);
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+ ubwc_regs = (struct cam_vfe_bus_ver3_reg_offset_ubwc_client *) regs;
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+ CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, *j, ubwc_regs->meta_addr, temp);
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end:
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return;
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@@ -2993,12 +3002,14 @@ static int cam_vfe_bus_ver3_update_wm(void *priv, void *cmd_args,
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struct cam_cdm_utils_ops *cdm_util_ops;
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uint32_t *reg_val_pair;
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uint32_t num_regval_pairs = 0;
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- uint32_t i, j, k, size = 0;
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- uint32_t frame_inc = 0, val;
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+ uint32_t i, j, k, size = 0;
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+ uint32_t frame_inc = 0, val;
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uint32_t loop_size = 0;
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+ uint32_t iova_addr, iova_offset, image_buf_offset = 0;
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+ dma_addr_t iova;
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bus_priv = (struct cam_vfe_bus_ver3_priv *) priv;
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- update_buf = (struct cam_isp_hw_get_cmd_update *) cmd_args;
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+ update_buf = (struct cam_isp_hw_get_cmd_update *) cmd_args;
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vfe_out_data = (struct cam_vfe_bus_ver3_vfe_out_data *)
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update_buf->res->res_priv;
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@@ -3036,22 +3047,34 @@ static int cam_vfe_bus_ver3_update_wm(void *priv, void *cmd_args,
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wm_data->en_cfg &= ~(1 << 2);
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if (update_buf->wm_update->frame_header &&
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- !update_buf->wm_update->fh_enabled) {
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- if (wm_data->hw_regs->frame_header_addr) {
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- wm_data->en_cfg |= 1 << 2;
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- update_buf->wm_update->fh_enabled = true;
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- CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
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- wm_data->hw_regs->frame_header_addr,
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- update_buf->wm_update->frame_header);
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- CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
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- wm_data->hw_regs->frame_header_cfg,
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- update_buf->wm_update->local_id);
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- CAM_DBG(CAM_ISP,
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- "WM: %d en_cfg 0x%x frame_header %pK local_id %u",
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- wm_data->index, wm_data->en_cfg,
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- update_buf->wm_update->frame_header,
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- update_buf->wm_update->local_id);
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+ !update_buf->wm_update->fh_enabled &&
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+ wm_data->hw_regs->frame_header_addr) {
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+
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+ wm_data->en_cfg |= 1 << 2;
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+ update_buf->wm_update->fh_enabled = true;
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+ if (cam_smmu_is_expanded_memory()) {
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+ iova_addr = CAM_36BIT_INTF_GET_IOVA_BASE(
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+ update_buf->wm_update->frame_header);
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+ iova_offset = CAM_36BIT_INTF_GET_IOVA_OFFSET(
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+ update_buf->wm_update->frame_header);
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+ } else {
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+ iova_addr = update_buf->wm_update->frame_header;
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+ iova_offset = 0;
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}
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+
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+ if (iova_offset)
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+ CAM_ERR(CAM_ISP, "Error, address not aligned! offset:0x%x",
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+ iova_offset);
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+ CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
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+ wm_data->hw_regs->frame_header_addr, iova_addr);
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+ CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
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+ wm_data->hw_regs->frame_header_cfg,
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+ update_buf->wm_update->local_id);
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+ CAM_DBG(CAM_ISP,
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+ "WM: %d en_cfg 0x%x frame_header %pK local_id %u",
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+ wm_data->index, wm_data->en_cfg,
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+ update_buf->wm_update->frame_header,
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+ update_buf->wm_update->local_id);
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}
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CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
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@@ -3107,7 +3130,7 @@ static int cam_vfe_bus_ver3_update_wm(void *priv, void *cmd_args,
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if (wm_data->en_ubwc) {
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frame_inc = ALIGNUP(io_cfg->planes[i].plane_stride *
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- io_cfg->planes[i].slice_height, 4096);
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+ io_cfg->planes[i].slice_height, 4096);
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frame_inc += io_cfg->planes[i].meta_size;
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CAM_DBG(CAM_ISP,
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"WM:%d frm %d: ht: %d stride %d meta: %d",
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@@ -3133,35 +3156,43 @@ static int cam_vfe_bus_ver3_update_wm(void *priv, void *cmd_args,
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else
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loop_size = 1;
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+ if (wm_data->en_ubwc)
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+ image_buf_offset = io_cfg->planes[i].meta_size;
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+ else if (wm_data->en_cfg & (0x3 << 16))
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+ image_buf_offset = wm_data->offset;
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+ else
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+ image_buf_offset = 0;
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+
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/* WM Image address */
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for (k = 0; k < loop_size; k++) {
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- if (wm_data->en_ubwc) {
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+ iova = update_buf->wm_update->image_buf[i] +
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+ image_buf_offset + (k * frame_inc);
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+
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+ if (cam_smmu_is_expanded_memory()) {
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+ iova_addr = CAM_36BIT_INTF_GET_IOVA_BASE(iova);
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+ iova_offset = CAM_36BIT_INTF_GET_IOVA_OFFSET(iova);
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+
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CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
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- wm_data->hw_regs->image_addr,
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- update_buf->wm_update->image_buf[i] +
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- io_cfg->planes[i].meta_size +
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- k * frame_inc);
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- update_buf->wm_update->image_buf_offset[i] =
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- io_cfg->planes[i].meta_size;
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- } else if (wm_data->en_cfg & (0x3 << 16)) {
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+ wm_data->hw_regs->image_addr, iova_addr);
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+
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CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
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- wm_data->hw_regs->image_addr,
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- (update_buf->wm_update->image_buf[i] +
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- wm_data->offset + k * frame_inc));
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- update_buf->wm_update->image_buf_offset[i] =
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- wm_data->offset;
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+ wm_data->hw_regs->addr_cfg, iova_offset);
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+
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+ CAM_DBG(CAM_ISP, "WM:%d image address 0x%X 0x%X",
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+ wm_data->index, reg_val_pair[j-2], reg_val_pair[j-1]);
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} else {
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+ iova_addr = iova;
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+
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CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
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- wm_data->hw_regs->image_addr,
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- (update_buf->wm_update->image_buf[i] +
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- k * frame_inc));
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- update_buf->wm_update->image_buf_offset[i] = 0;
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- }
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+ wm_data->hw_regs->image_addr, iova_addr);
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- CAM_DBG(CAM_ISP, "WM:%d image address 0x%X",
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- wm_data->index, reg_val_pair[j-1]);
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+ CAM_DBG(CAM_ISP, "WM:%d image address 0x%X",
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+ wm_data->index, reg_val_pair[j-1]);
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+ }
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}
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+ update_buf->wm_update->image_buf_offset[i] = image_buf_offset;
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+
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CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
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wm_data->hw_regs->frame_incr, frame_inc);
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CAM_DBG(CAM_ISP, "WM:%d frame_inc %d",
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